Showing papers in "Solid-state Electronics in 2018"

Digital and analog TFET circuits: Design and benchmark

Abstract: In this work, we investigate by means of simulations the performance of basic digital, analog, and mixed-signal circuits employing tunnel-FETs (TFETs). The analysis reviews and complements our previous papers on these topics. By considering the same devices for all the analysis, we are able to draw consistent conclusions for a wide variety of circuits. A virtual complementary TFET technology consisting of III-V heterojunction nanowires is considered. Technology Computer Aided Design (TCAD) models are calibrated against the results of advanced full-quantum simulation tools and then used to generate look-up-tables suited for circuit simulations. The virtual complementary TFET technology is benchmarked against predictive technology models (PTM) of complementary silicon FinFETs for the 10 nm node over a wide range of supply voltages (VDD) in the sub-threshold voltage domain considering the same footprint between the vertical TFETs and the lateral FinFETs and the same static power. In spite of the asymmetry between p- and n-type transistors, the results show clear advantages of TFET technology over FinFET for VDD lower than 0.4 V. Moreover, we highlight how differences in the I-V characteristics of FinFETs and TFETs suggest to adapt the circuit topologies used to implement basic digital and analog blocks with respect to the most common CMOS solutions.

Tunable-Sensitivity flexible pressure sensor based on graphene transparent electrode

Abstract: Tunable-sensitivity and flexibility are considered as two crucial characteristics for future pressure sensors or electronic skins. By the theoretical calculation model, we simulated the relationship curve between the sensitivity and PDMS pyramids with different spacings, and found that the spacing of pyramids is a main factor to affect the sensitivity of the capacitance pressure sensor. Furthermore, we fabricated the capacitance pressure sensors using graphene electrodes and the PDMS pyramid dielectric layers with different spacings. The measurement data were consistent with the simulation results that the sensitivity increases with the spacing of pyramids. In addition, graphene electrode exhibits prefect flexibility and reliability, while the ITO electrode would be destroyed rapidly after bending. These graphene pressure sensors exhibit the potential in the application in the wearable products for monitoring breath, pulse, and other physiological signals.

Graphene/black phosphorus heterostructured photodetector

Abstract: Graphene photodetectors exhibit a low photoresponsivity due to their weak light absorbance. In this study, we fabricated a graphene/black phosphorus (BP) heterostructure, in which the multilayer BP flake with a ∼0.3 eV direct band gap functions as an enhanced light-absorption material. Further, the photoexcited electrons are trapped in the trap states of the BP, which creates a photogating effect and causes holes to flow into the graphene layer driven by the built-in potential between BP and graphene. The photocarrier lifetime is therefore prolonged by trapping, and as a result of the high carrier mobility of graphene, the holes that transfer into the graphene channel can travel through the circuit before they recombine with trapped electrons. These combined effects result in a high photoresponsivity: 55.75 A/W at λ = 655 nm, 1.82 A/W at λ = 785 nm, and 0.66 A/W at λ = 980 nm.

The photovoltaic impact of atomic layer deposited TiO 2 interfacial layer on Si-based photodiodes

Abstract: In present work, photocurrent, current-voltage (I-V) and capacitance/conductance-voltage-frequency (C/G-V-f) measurements were analyzed for the photodiode and diode parameters of Al/TiO2/p-Si structure. The TiO2 thin film structure was deposited on p-Si by using atomic layer deposition technique (ALD) and its thickness was about 10 nm. The surface morphology of TiO2 coated on p-Si structure was observed via atomic force microscope (AFM). Barrier height (Φb) and ideality factor (n) values of device were found to be 0.80 eV, 0.70 eV, 0.56 eV and 1.04, 2.24, 10.27 under dark, 10 and 100 mW/cm2, respectively. Some photodiodes parameters such as fill factor (FF), power efficiency (%η), open circuit voltage (Voc), short circuit current (Isc) were obtained from I-V measurement under different light intensity. FF and η were accounted 49.2, 39,0 and 0.05, 0.45 under 10 and 100 mW/cm2 light power intensity, respectively. C−2-V graph was plotted from C-V-f measurements and zero bias voltage (V0), donor concentration (Nd), Fermi energy (EF), barrier height (Φb) and maximum electric field (Em) were determined from C−2-V data for different frequencies. The electrical and photocurrent values demonstrated that it can be used for photodiode, photo detector and photo sensing applications.

Palladium (Pd) sensitized molybdenum trioxide (MoO3) nanobelts for nitrogen dioxide (NO2) gas detection

Abstract: The MoO3 nanobelts have been grown onto the glass substrates using chemical spray pyrolysis (CSP) deposition technique at optimized substrate temperature of 400 °C XRD study shows that the film is polycrystalline in nature and possesses an orthorhombic crystal structure The FE-SEM micrographs show the formation of nanobelts-like morphology of MoO3 The presence of Pd and its oxidation states in Pd-sensitized MoO3 film is confirmed using EDAX and XPS study, respectively The percentage gas response is defined as | R g - R a | R a × 100 % where, Ra and Rg are the film resistances in presence of air and analyte gas, respectively Before Pd sensitization, MoO3 nanobelts show NO2 gas response of 68% for 100 ppm concentration at operating temperature of 200 °C with response and recovery times of 15 s and 150 s, respectively Selectivity coefficient study shows that the Pd-sensitized MoO3 nanobelts are more sensitive and selective towards NO2 gas among various gases such as NH3, H2S, CO, CO2 and SO2 The Pd-sensitized MoO3 nanobelts shows the enhanced response of 953% towards 100 ppm NO2 gas concentration with response and recovery times of 74 s and 297 s, respectively The lower detection limit is found to be 5 ppm which is four times less than immediately dangerous to life or health (IDLH) value of 20 ppm Finally, the proposed NO2 gas sensing mechanism based on chemisorption model is discussed

Low voltage operation of GaN vertical nanowire MOSFET

Abstract: GaN gate-all-around (GAA) vertical nanowire MOSFET (VNWMOSFET) with channel length of 300 nm and diameter of 120 nm, the narrowest GaN-based vertical nanowire transistor ever achieved from the top-down approach, was fabricated by utilizing anisotropic side-wall wet etching in TMAH solution and photoresist etch-back process. The VNWMOSFET exhibited output characteristics with very low saturation drain voltage of less than 0.5 V, which is hardly observed from the wide bandgap-based devices. Simulation results indicated that the narrow diameter of the VNWMOSFET with relatively short channel length is responsible for the low voltage operation. The VNWMOSFET also demonstrated normally-off mode with threshold voltage (VTH) of 0.7 V, extremely low leakage current of ∼10−14 A, low drain-induced barrier lowering (DIBL) of 125 mV/V, and subthreshold swing (SS) of 66–122 mV/decade. The GaN GAA VNWMOSFET with narrow channel diameter investigated in this work would be promising for new low voltage logic application.

Thermal coupling and effect of subharmonic synchronization in a system of two VO2 based oscillators

Abstract: We explore a prototype of an oscillatory neural network (ONN) based on vanadium dioxide switching devices. The model system under study represents two oscillators based on thermally coupled VO2 switches. Numerical simulation shows that the effective action radius RTC of coupling depends both on the total energy released during switching and on the average power. It is experimentally and numerically proved that the temperature change ΔT commences almost synchronously with the released power peak and T-coupling reveals itself up to a frequency of about 10 kHz. For the studied switching structure configuration, the RTC value varies over a wide range from 4 to 45 μm, depending on the external circuit capacitance C and resistance Ri, but the variation of Ri is more promising from the practical viewpoint. In the case of a “weak” coupling, synchronization is accompanied by attraction effect and decrease of the main spectra harmonics width. In the case of a “strong” coupling, the number of effects increases, synchronization can occur on subharmonics resulting in multilevel stable synchronization of two oscillators. An advanced algorithm for synchronization efficiency and subharmonic ratio calculation is proposed. It is shown that of the two oscillators the leading one is that with a higher main frequency, and, in addition, the frequency stabilization effect is observed. Also, in the case of a strong thermal coupling, the limit of the supply current parameters, for which the oscillations exist, expands by ∼10%. The obtained results have a universal character and open up a new kind of coupling in ONNs, namely, T-coupling, which allows for easy transition from 2D to 3D integration. The effect of subharmonic synchronization hold promise for application in classification and pattern recognition.

Role of AlGaN/GaN interface traps on negative threshold voltage shift in AlGaN/GaN HEMT

Abstract: This article reports negative shift in the threshold-voltage in AlGaN/GaN high electron mobility transistor (HEMT) with application of reverse gate bias stress. The device is biased in strong pinch-off and low drain to source voltage condition for a fixed time duration (reverse gate bias stress), followed by measurement of transfer characteristics. Negative threshold voltage shift after application of reverse gate bias stress indicates the presence of more carriers in channel as compared to the unstressed condition. We propose the presence of AlGaN/GaN interface states to be the reason of negative threshold voltage shift, and developed a process to electrically characterize AlGaN/GaN interface states. We verified the results with Technology Computer Aided Design (TCAD) ATLAS simulation and got a good match with experimental measurements.

Low-voltage electric-double-layer MoS2 transistor gated via water solution

Abstract: Two-dimensional (2D) molybdenum disulfide (MoS2) has attracted growing interests due to its intriguing electrical, optical, and scalable properties. Exploring 2D MoS2-based electronic devices which are compatible with the biological systems are of great significance. Herein, a proof-of-concept water-gated multilayer MoS2 transistor is successfully demonstrated by using a side-gated device architecture. Electric-double-layer (EDL) effect is observed in such water-gated multilayer MoS2 transistor. The device exhibits a good performance with a high current on/off ratio of 4 × 103, a small subthreshold swing of 0.27 V/dec, and a low operation voltage of ∼1.5 V, respectively. Furthermore, an ion-contributed quasi-EDL model can be further confirmed by the frequency-dependent capacitance and phase angle measurements. Such merits of water-containing systems coupled with MoS2 opens new opportunities to harness the excellent physical and electrical properties of 2D MoS2 for the potential bioelectronic devices integrated in biological systems for monitoring, diagnostic, and medical applications.

Effect of MgO doping on the BiVO4 sensing electrode performance for YSZ-based potentiometric ammonia sensor

Abstract: In order to improve the microstructure and sensing property for electrode material BiVO4 of potentiometric ammonia sensor, different MgO-doped (0, 1, 3, 5 and 8 at.%) BiVO4 powders were synthesized by solid-state reaction method. There is no significant difference in XRD spectrum for the different powders, but the particle size of the sensing electrode has an obvious refinement with the doping of MgO. The NH3 sensitivity of the sensor had a enhancement from 41.7 mV/decade to the highest value of 61.8 mV/decade when Mg-content reaches 5 at.%. The interfacial resistance Ri between the electrode and YSZ decreases with the increment of NH3 concentration and the Mg-doping based on impedance spectroscopy. The reduction of interface resistance is due to the enhancement of electrode reactions. The dopant MgO improves the conductivity of BiVO4 and the TPB area, and leads to a greater charge exchange rate for the electrode electrochemical reactions. The increased specific surface area due to the grain size refinement gets more NH3 involved in the reactions. This eventually leads to the increased sensitivity and decreased interface resistance. The optimal operating temperature is 600 °C based on the synthetical effects of various factors such as conductivity, the catalytic and gas adsorption performances of the sensing material.

Modeling of thermal coupling in VO2-based oscillatory neural networks

Abstract: In this study, we have demonstrated the possibility of using the thermal coupling to control the dynamics of operation of coupled VO 2 oscillators Based on the example of a ‘switch-microheater’ pair, we have explored the synchronization and dissynchronization modes of a single oscillator with respect to an external harmonic heat impact The features of changes in the spectra are shown, in particular, the effect of the natural frequency attraction to the affecting signal frequency and the self-oscillation noise reduction effects at synchronization The time constant of the temperature effect for the considered system configuration is in the range 7–140 μs, which allows operation in the oscillation frequency range of up to ∼70 kHz A model estimate of the minimum temperature sensitivity of the switch is δ T switch ∼ 02 K, and the effective action radius R TC of the switch-to-switch thermal coupling is not less than 25 μm Nevertheless, as the simulation shows, the frequency range can be significantly extended up to the values of 1–30 GHz if using nanometer-scale switches (heaters)

A review on terahertz photogalvanic spectroscopy of Bi2Te3- and Sb2Te3-based three dimensional topological insulators

Abstract: The paper overviews experimental and theoretical studies of photogalvanic effects induced in BiSbTe-based three dimensional topological insulators by polarized terahertz radiation. We present the state-of-the-art of this subject, including most recent and well-established results. We discuss a phenomenological theory based on symmetry arguments and models illustrating the photocurrents origin. We give a brief glimpse of the underlying microscopic theory, as well as an overview of the main experimental results.

Solution processed thin film transistor from liquid phase exfoliated MoS2 flakes

Abstract: Two dimensional layers of dichalcogenide materials have attracted a lot of interests due to their potential applications in optoelectronics and energy storage. Hence, there is a large interest in establishing cheap, scalable processes for the production of low dimensional semiconducting dichalcogenide based films. In this work, well exfoliated MoS2 dispersions were prepared through a two-step liquid phase exfoliation process with N-methyl-pyrrolidone (NMP) and Isopropanol (IPA). The quality of the obtained MoS2 flakes was characterized by transmission electron microscopy, scanning electron microscopy, UV–Vis spectroscopy and Raman spectroscopy. For charge transport analysis, bottom-gate thin film transistors (TFTs) based on exfoliated MoS2 films were fabricated via spray coating technique. Electrical characterization of the obtained TFTs showed that adding a PMMA layer on top of the semiconductor lead to considerable improvements in the electrical performance. The analysis of the electrical characteristics suggests that the additional PMMA layer improves the charge transfer between adjacent flakes. Electrical measurements on TFTs with different channel length were used to separate the impact of the contact resistance and the channel resistance on the charge transport. The TFTs output curves showed non-linear current–voltage (I-V) characteristic. The non-linear behavior was attributed to the formation of Schottky barriers at the inter-flakes connection. In this work, we show a low-cost and scalable solution-based fabrication process that could boost the application of dichalcogenides in modern nanoelectronic devices.

Gradual switching and self-rectifying characteristics of Cu/α-IGZO/p + -Si RRAM for synaptic device application

Abstract: In this work, we investigated the gradual switching and self-rectifying characteristics of Cu/α-IGZO/p+-Si resistive-switching random-access memory (RRAM) device. We fabricated the RRAM cells with Cu as the top electrode (TE) and heavily doped p-type silicon as the bottom electrode (BE), and amorphous indium gallium zinc oxide (α-IGZO) film as the switching layer. In particular, we developed a bilayer IGZO film consisting of an oxygen-deficient layer and an oxygen-rich one by controlling the oxygen concentrations in the respective switching layers in the expectation of gradual switching owing to an oxygen vacancy reservoir. Fabricated RRAM cells successfully showed the typical hysteretic I–V curves including SET and RESET operations in the DC sweep mode. Furthermore, gradual switching and self-rectifying performances were observed. These characteristics are suitable to applications for synaptic devices toward the advanced neuromorphic systems.

Light-controlled resistive switching characteristics in ZnO/BiFeO3/ZnO thin film

Abstract: ZnO/BiFeO3/ZnO multilayer was fabricated on silicon (Si) substrate by radio-frequency magnetron sputtering system. The resistive switching characteristics in ZnO/BiFeO3/ZnO devices are observed, and the resistive switching behavior can be modulated by white light.

Design, fabrication and characterization of SAW devices on LiNbO3 bulk and ZnO thin film substrates

Abstract: In this paper, surface acoustic wave (SAW) devices with various designs were fabricated on two types of piezoelectric substrates of LiNbO3 bulk material and thin piezoelectric ZnO film on silicon. Different sizes, orientation and types of SAW devices were laid out on the same mask to compare their RF performance with a same fabrication. Devices were fabricated using lift-off technology with a double photoresist technique to achieve a steeper and narrower SAW pattern with a depth-to-width ratio of 1.27 and a steep resist angle of 85°. The devices were then characterized using RF probe station together with vector network analyzer. RF performance was also verified by 2D computer simulation implementing both electrical and piezoelectric physics models using the same device dimensions in the mask layout. RF response of 128°Y LiNbO3 from experiments agrees with simulation fairly well while the devices on ZnO/Si have larger frequency distribution due to process variation of the ZnO thin film on silicon wafer. Quality factor of 34,000 was obtained from the SAW device fabricated in LiNO3 substrate and this Q value has a strong dependency on the numbers electrodes of IDT fingers and reflectors. Temperature dependency was also measured for future wireless sensor application. The temperature coefficient of frequency of 16 μm wavelength devices of LiNbO3 substrate was −87.5 ppm/°C and was −72.41 ppm/°C for 12 μm wavelength devices.

Effect of substrate thinning on the electronic transport characteristics of AlGaN/GaN HEMTs

Abstract: We studied how substrate thinning affected the electronic transport characteristics of AlGaN/GaN HEMTs. By thinning their sapphire substrate from 460 µm to 80 µm, we varied the residual stress in these HEMTs. The thinned sample showed decreased drain–source current and occurrence of kink effect. Furthermore, shown by current transient measurements and time constant analysis, the detrapping behaviors of trap states shifted toward a larger time constant, and the detrapping behavior under the gate and in the gate–drain access region showed increased amplitude. By using pulsed current-voltage measurements, the thinned sample showed a positive shift of the threshold voltage, a decrease in peak transconductance, and an aggravation in current collapse, as compared with the thick one. The degradation of electrical behavior were associated with the structural degradation, as confirmed by the increase of pit density on the thinned sample surface.

Ferroelectric field-effect transistors based on solution-processed electrochemically exfoliated graphene

Abstract: Memories based on graphene that could be mass produced using low-cost methods have not yet received much attention. Here we demonstrate graphene ferroelectric (dual-gate) field effect transistors. The graphene has been obtained using electrochemical exfoliation of graphite. Field-effect transistors are realized using a monolayer of graphene flakes deposited by the Langmuir-Blodgett protocol. Ferroelectric field effect transistor memories are realized using a random ferroelectric copolymer poly(vinylidenefluoride-co-trifluoroethylene) in a top gated geometry. The memory transistors reveal ambipolar behaviour with both electron and hole accumulation channels. We show that the non-ferroelectric bottom gate can be advantageously used to tune the on/off ratio.

Effect of traps on the charge transport in semiconducting polymer PCDTBT

Abstract: Organic semiconductors (OSCs) are nowadays called upon as promising candidates for next generation electronics devices. Due to disorder structure of these materials, a high density of traps are present in their energy band gap which affect the performance of these devices. In the present manuscript, we have investigated the role of traps on charge transport in PCDTBT thin film by measuring the temperature dependent J(V) characteristics in hole only device configuration. The obtained results were analyzed by space charge limited (SCL) conduction model. It has been found that the room temperature J(V) characteristics follow Mott-Gurney square law for trap-free SCL conduction. But below 278 K, the current increases according to trap-filling SCL law with traps distributed exponentially in the band gap of semiconductor. Furthermore, after reaching a crossover voltage of VC ∽ 12 V, all the traps filled by injected carriers and the trap-filling SCL current switch to trap-free SCL current. The hole mobility of trap-free SCL current is about one order higher as compared trap-filling SCL current and remains constant with temperature.

Low-power logic computing realized in a single electric-double-layer MoS 2 transistor gated with polymer electrolyte

Abstract: Due to its mechanical flexibility, large bandgap and carrier mobility, atomically thin molybdenum disulphide (MoS2) has attracted widespread attention. However, it still lacks a facile route to fabricate a low-power high-performance logic gates/circuits before it gets the real application. Herein, we reported a facile and environment-friendly method to establish the low-power logic function in a single MoS2 field-effect transistor (FET) configuration gated with a polymer electrolyte. Such low-power and high-performance MoS2 FET can be implemented by using water-soluble polyvinyl alcohol (PVA) polymer as proton-conducting electric-double-layer (EDL) dielectric layer. It exhibited an ultra-low voltage (1.5 V) and a good performance with a high current on/off ratio (Ion/off) of 1 × 105, a large electron mobility (µ) of 47.5 cm2/V s, and a small subthreshold swing (S) of 0.26 V/dec, respectively. The inverter can be realized by using such a single MoS2 EDL FET with a gain of ∼4 at the operation voltage of only ∼1 V. Most importantly, the neuronal AND logic computing can be also demonstrated by using such a double-lateral-gate single MoS2 EDL transistor. These results show an effective step for future applications of 2D MoS2 FETs for integrated electronic engineering and low-energy environment-friendly green electronics.

Detailed characterisation of Si Gate-All-Around Nanowire MOSFETs at cryogenic temperatures

Abstract: In this work, Gate-All-Around Nanowire MOSFETs have been studied at very low temperatures. DC behaviors have been investigated in the linear operation and saturation regions, giving access to several analog parameters. Static characteristics at 4.2 K and low polarization exhibit step- like variations of the drain current, which can be linked to energy subband scattering. First results on the impact of quantum transport mechanism on the low frequency noise are shown. Finally the low frequency noise spectroscopy has led to the identification of silicon film traps.

Design and fabrication of very small MEMS microphone with silicon diaphragm supported by Z-shape arms using SOI wafer

Abstract: This paper will focus on design, fabrication and characterization of a new MEMS capacitive microphone with the perforated diaphragm supported by Z-shape arms using SOI wafer. The aim is to fabricate a new microphone with the smallest size, simple and low cost. The novelty is making Z-shape arms around of diaphragm on SOI wafer using only a mask to decrease diaphragm stiffness and air damping and thus improve microphone performances. The fabricated structure has a diaphragm thickness of 5 µm, a diaphragm size of 0.3 mm × 0.3 mm, and an air gap of 1 µm. The results show that the pull-in voltage is 10.3 V, open circuit sensitivity of 2.46 mV/Pa, and resonance frequency of 60 kHz. The fabrication process uses minimal number of layers and masks due to using SOI wafer to reduce fabrication time and cost. The specific geometry of the proposed diaphragm causes the new fabricated microphone has low bias voltage, good sensitivity and smallest size compared with previous works.

Effect of defect creation and migration on hump characteristics of a-InGaZnO thin film transistors under long-term drain bias stress with light illumination

Abstract: We investigated the mechanism of formation of the hump that occurs in the current-voltage I-V characteristics of amorphous InGaZnO (a-IGZO) thin film transistors (TFTs) that are exposed to long-term drain bias stress under illumination. Transfer characteristics showed two-stage degradation under the stress. At the beginning of the stress, the I-V characteristics shifted in the negative direction with a degradation of subthreshold slope, but the hump phenomenon developed over time in the I-V characteristics. The development of the hump was related to creation of defects, especially ionized oxygen vacancies which act as shallow donor-like states near the conduction-band minimum in a-IGZO. To further investigate the hump phenomenon we measured a capacitance-voltage C-V curve and performed two-dimensional device simulation. Stretched-out C-V for the gate-to-drain capacitance and simulated electric field distribution which exhibited large electric field near the drain side of TFT indicated that VO2+ were generated near the drain side of TFT, but the hump was not induced when VO2+ only existed near the drain side. Therefore, the degradation behavior under DBITS occurred because VO2+ were created near the drain side, then were migrated to the source side of the TFT.

A novel charge recycle read write assist technique for energy efficient and fast 20 nm 8T-SRAM array

Abstract: The read instability of conventional 6T-SRAM cell has made the 8T-SRAM cell a substitute for high data reliability. But the single ended nature of read operation demands a complete Vdd swing of high capacitive read bit lines leading to large energy consumption. A novel assist technique using charge recycling concept is proposed here which reduces the read and write energy by reducing the voltage swing. Mathematical analysis of the proposed technique, theoretically predicts the read and write energy to reduce by 75% and 25% respectively compare to that of the conventional 8T-SRAM array. Experimental simulation using predictive technology model demonstrates these two energy consumptions to be reduced by 58% and 27% respectively. The proposed technique also reduces the leakage current flow in the standby cells and hence the energy consumption. The dummy read current flow in the half-selected cells is also controlled significantly in the proposed technique. The stability of the SRAM cell remains unchanged by the insertion of the proposed assist technique.

Ti/Al/Ti/TiW Au-free low temperature ohmic contacts for un-doped AlGaN/GaN HEMTs

Abstract: We demonstrated an Au-free ohmic contact for un-doped AlGaN/GaN HEMTs with Ti/Al/Ti/TiW metal structure. The Au-free ohmic contact was fabricated by pre-ohmic recess etching and low annealing temperature. The contact characteristics of the Ti/Al/Ti/TiW Au-free ohmic contacts including current-voltage, contact resistivity, and microstructure are systematically investigated. The contact resistivity of Ti/Al/Ti/TiW ohmic contact with 22-nm recessed depth and 600 °C annealing temperature is 5.44 × 10−5 Ω⋅cm2, which is comparable with conventional Ti/Al/Ni/Au ohmic contact. In addition, the Ti/Al/Ti/TiW ohmic contact shows smooth surface morphology with an excellent surface roughness of 3.69 nm. Besides, AlGaN/GaN MISHEMTs based on Ti/Al/Ti/TiW Au-free low temperature ohmic contacts were fabricated and exhibited good DC characteristics. The reported Au-free AlGaN/GaN HEMT fabrication process can be used in standard Si fabs without the risk of contamination.

Design optimization and fabrication of a novel structural piezoresistive pressure sensor for micro-pressure measurement

Abstract: This paper presents a novel structural piezoresistive pressure sensor with a four-beams-bossed-membrane (FBBM) structure that consisted of four short beams and a central mass to measure micro-pressure. The proposed structure can alleviate the contradiction between sensitivity and linearity to realize the micro measurement with high accuracy. In this study, the design, fabrication and test of the sensor are involved. By utilizing the finite element analysis (FEA) to analyze the stress distribution of sensitive elements and subsequently deducing the relationships between structural dimensions and mechanical performance, the optimization process makes the sensor achieve a higher sensitivity and a lower pressure nonlinearity. Based on the deduced equations, a series of optimized FBBM structure dimensions are ultimately determined. The designed sensor is fabricated on a silicon wafer by using traditional MEMS bulk-micromachining and anodic bonding technology. Experimental results show that the sensor achieves the sensitivity of 4.65 mV/V/kPa and pressure nonlinearity of 0.25% FSS in the operating range of 0–5 kPa at room temperature, indicating that this novel structure sensor can be applied in measuring the absolute micro pressure lower than 5 kPa.

Performance analysis and simulation of vertical gallium nitride nanowire transistors

Abstract: Gallium nitride (GaN) nanowire transistors are analyzed using hydrodynamic simulation. Both p-body and n-body devices are compared in terms of threshold voltage, saturation behavior and transconductance. The calculations are calibrated using experimental data. The threshold voltage can be tuned from enhancement to depletion mode with wire doping. Surface states cause a shift of threshold voltage and saturation current. The saturation current depends on the gate design, with a composite gate acting as field plate in the p-body device.

Al2O3 thin film multilayer structure for application in RRAM devices

Abstract: This study investigated the effect of resistive switching on Pt/Al2O3/Cu/Al2O3/ITO multilayer structures grown by RF/DC magnetron sputtering. A reproducible unipolar switching free forming was found only for the negative voltage. The SET and RESET processes occurred at very low voltage values, which may be advantageous for practical applications. The ON/OFF ratio was approximately five orders of magnitude for more than 103 s, which is desirable for nonvolatile memories such as resistive random-access memories (RRAMs). We explain the unipolar behavior of the characteristic (I–V) curves in terms of the formation and rupture of conductive filaments, connected via a Cu metal layer.

Integrated on-chip solid state capacitor based on vertically aligned carbon nanofibers, grown using a CMOS temperature compatible process

Abstract: Complete miniaturized on-chip integrated solid-state capacitors have been fabricated based on conformal coating of vertically aligned carbon nanofibers (VACNFs), using a CMOS temperature compatible micro-fabrication processes. The 5 mu m long VACNFs, operating as electrode, are grown on a silicon substrate and conformally coated by aluminum oxide dielectric using atomic layer deposition (ALD) technique. The areal (footprint) capacitance density value of 11-15 nF/mm(2) is realized with high reproducibility. The CMOS temperature compatible microfabrication, ultra-low profile (less than 7 mu m thickness) and high capacitance density would enables direct integration of micro energy storage devices on the active CMOS chip, multi-chip package and passives on silicon or glass interposer. A model is developed to calculate the surface area of VACNFs and the effective capacitance from the devices. It is thereby shown that 71% of surface area of the VACNFs has contributed to the measured capacitance, and by using the entire area the capacitance can potentially be increased.

Gate-induced drain leakage current characteristics of p-type polycrystalline silicon thin film transistors aged by off-state stress

Abstract: Thin film transistors have become crucial components of several electronic display devices. However, high leakage current is a frustrating impediment to increasing the efficiency of these transistors. We have performed an experimental and quantitative study on the effects of off-state bias stress on the characteristics of a p-type polycrystalline silicon (poly-Si) thin film transistor (TFT). The gate-induced drain leakage (GIDL) current under off-state bias stress conditions was investigated by changing gate-source voltage (Vgs) and drain-source voltage (Vds). Off-state bias stress was found to dramatically increase the threshold Vgs from 1 to 11 V, thereby increasing the voltage needed to turn off the TFT, without causing significant changes in on-state current or subthreshold swing. We developed local defect creation and charge trapping models for a technology computer-aided design simulation platform to understand the mechanisms underlying these observed effects. Using the model, we showed that off-state stress induces charge trapping within the local defects of a high electric field region in the TFT channel near the drain. This reduces the electric field and thermionic field-emission current, which in turn lowers the GIDL current by increasing threshold voltage Vgs.