Vlsi Design 

About: Vlsi Design is an academic journal published by Hindawi Publishing Corporation. The journal publishes majorly in the area(s): Monte Carlo method & Very-large-scale integration. It has an ISSN identifier of 1026-7123. It is also open access. Over the lifetime, 787 publications have been published receiving 6503 citations. The journal is also known as: Very large scale integration design.

Multilevel k-way Hypergraph Partitioning

Abstract: In this paper, we present a new multilevel k-way hypergraph partitioning algorithm that substantially outperforms the existing state-of-the-art K-PM/LR algorithm for multi-way partitioning, both for optimizing local as well as global objectives. Experiments on the ISPD98 benchmark suite show that the partitionings produced by our scheme are on the average 15% to 23% better than those produced by the K-PM/LR algorithm, both in terms of the hyperedge cut as well as the (K – 1) metric. Furthermore, our algorithm is significantly faster, requiring 4 to 5 times less time than that required by K-PM/LR.

Numerically Absorbing Boundary Conditions for Quantum Evolution Equations

Abstract: Transparent boundary conditions for the transient Schrodinger equation on a domain Ω can be derived explicitly under the assumption that the given potential V is constant outside of this domain. In 1D these boundary conditions are non-local in time (of memory type). For the Crank-Nicolson finite difference scheme, discrete transparent boundary conditions are derived, and the resulting scheme is proved to be unconditionally stable. A numerical example illustrates the superiority of discrete transparent boundary conditions over existing ad-hoc discretizations of the differential transparent boundary conditions. As an application of these boundary conditions to the modeling of quantum devices, a transient 1D scattering model for mixed quantum states is presented.

A synthesizable VHDL model of the exact solution for three-dimensional hyperbolic positioning system

Abstract: This paper presents a synthesizable VHDL model of a three-dimensional hyperbolic positioning system algorithm. The algorithm obtains an exact solution for the three-dimensional location of a mobile given the locations of four fixed stations (like a global positioning system [GPS] satellite or a base station in a cell) and the signal time of arrival (TOA) from the mobile to each station. The detailed derivation of the steps required in the algorithm is presented. A VHDL model of the algorithm was implemented and simulated using the IEEE numeric_std package. Signals were described by a 32-bit vector. Simulation results predict location of the mobile is off by 1 m for best case and off by 36 m for worst case. A Cþþ program using real numbers was used as a benchmark for the accuracy and precision of the VHDL model. The model can be easily synthesized for low power hardware implementation.

Online Reconfigurable Self-Timed Links for Fault Tolerant NoC

Abstract: We propose link structures for NoC that have properties for tolerating efficiently transient, intermittent, and permanent errors. This is a necessary step to be taken in order to implement reliable systems in future nanoscale technologies. The protection against transient errors is realized using Hamming coding and interleaving for error detection and retransmission as the recovery method. We introduce two approaches for tackling the intermittent and permanent errors. In the first approach, spare wires are introduced together with reconfiguration circuitry. The other approach uses time redundancy, the transmission is split into two parts, where the data is doubled. In both structures the presence of permanent or intermittent errors is monitored by analyzing previous error syndromes. The links are based on self-timed signaling in which the handshake signals are protected using triple modular redundancy. We present the structures, operation, and designs for the different components of the links. The fault tolerance properties are analyzed using a fault model containing temporary, intermittent, and permanent faults that occur both as bursts and as single faults. The results show a considerable enhancement in the fault tolerance at the cost of performance and area, and with only a slight increase in power consumption.