15 kV-Class Implantation-Free 4H-SiC BJTs With Record High Current Gain
01 Jan 2018-IEEE Electron Device Letters (Institute of Electrical and Electronics Engineers (IEEE))-Vol. 39, Iss: 1, pp 63-66
TL;DR: In this paper, a mesa-etched ultra-high-voltage (0.08 mm2) 4H-SiC bipolar junction transistors with record current gain of 139 were fabricated, measured, and analyzed by device simulation.
Abstract: Implantation-free mesa-etched ultra-high-voltage (0.08 mm2) 4H-SiC bipolar junction transistors (BJTs) with record current gain of 139 are fabricated, measured, and analyzed by device simulation. High current gain is achieved by optimized surface passivation and optimal cell geometries. The area-optimized junction termination extension is utilized to obtain a high and stable breakdown voltage without ion implantation. The open-base blocking voltage of 15.8 kV at a leakage current density of 0.1 mA/cm2 is achieved. Different cell geometries (single finger, square, and hexagon cell geometries) are also compared.
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116 citations
TL;DR: In this article, the first implementation of a hydrogen-plasma-based edge termination technique (HPET) in vertical GaN p-n power diodes grown on bulk GaN substrates using metalorganic chemical vapor deposition was reported.
Abstract: This letter reports the first implementation of a hydrogen-plasma-based edge termination technique (HPET) in vertical GaN p-n power diodes grown on bulk GaN substrates using metalorganic chemical vapor deposition. The device with a 9- $\mu \text{m}$ -thick drift layer exhibited a high breakdown voltage ( ${V}_{\textsf {bd}}$ ) of 1.57 kV, a low ON-resistance ( ${R}_{\mathrm{ ON}}$ ) of 0.45 $\text{m}\Omega ~ \cdot $ cm2 (or 0.70 $\text{m}\Omega ~\cdot $ cm2 with current spreading considered) and a high Baliga’s figure-of-merit ( ${V}^{\textsf {2}}_{\textsf {bd}}/{R}_{\mathrm{ ON}}$ ) of 5.5 GW/cm2 (or 3.6 GW/cm2) without passivation or field plate, which are close to the theoretical limit of GaN. This technique enabled a significant reduction in leakage current (~106 times at −300 V) and a huge enhancement in ${V}_{\textsf {bd}}$ (from ~300 V to 1.57 kV). Furthermore, the device showed good forward characteristics with a turn-ON voltage of 3.5 V, an ON-current of ~2 kA/cm2 (or 1.3 kA/cm2), an ON/OFF ratio of ~109, and an ideality factor of 1.4. This work shows the HPET can serve as an effective, low cost, and easy-to-implement edge termination technique for high voltage and high power GaN p-n power diodes.
46 citations
Cites background from "15 kV-Class Implantation-Free 4H-Si..."
...However, energetic ion bombardments during the ion-implantation process induce tremendous damages and the devices need a high-temperature (>1500 °C) thermal activation and annealing process [29], [30] that often results in unwanted defects [31], [32]....
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TL;DR: In this paper, a comprehensive review summarizes the current progress, understanding, and challenges in vertical GaN power devices, which can serve as not only a gateway for those interested in the field but also a critical reference for researchers in the wide bandgap semiconductor and power electronics community.
Abstract: Vertical gallium nitride (GaN) power devices are enabling next-generation power electronic devices and systems with higher energy efficiency, higher power density, faster switching, and smaller form factor. In Part I of this review, we have reviewed the basic design principles and physics of building blocks of vertical GaN power devices, i.e., Schottky barrier diodes and p-n diodes. Key topics such as materials engineering, device engineering, avalanche breakdown, and leakage mechanisms are discussed. In Part II of this review, several more advanced power rectifiers are discussed, including junction barrier Schottky (JBS) rectifiers, merged p-n/Schottky (MPS) rectifiers, and trench metal–insulator–semiconductor barrier Schottky (TMBS) rectifiers. Normally- OFF GaN power transistors have been realized in various advanced device structures, including current aperture vertical electron transistors (CAVETs), junction field-effect transistors (JFETs), metal–oxide–semiconductor field-effect transistors (MOSFETs), and fin field-effect transistors (FinFETs). A detailed analysis on their performance metrics is provided, with special emphasis on the impacts of key fabrication processes such as etching, ion implantation, and surface treatment. Lastly, exciting progress has been made on selective area doping and regrowth, a critical process for the fabrication of vertical GaN power devices. Various materials characterization techniques and surface treatments have proven to be beneficial in aiding this rapid development. This timely and comprehensive review summarizes the current progress, understanding, and challenges in vertical GaN power devices, which can serve as not only a gateway for those interested in the field but also a critical reference for researchers in the wide bandgap semiconductor and power electronics community.
31 citations
TL;DR: A general review of the critical processing steps for manufacturing silicon carbide (SiC) MOSFETs and power applications based on SiC power devices are covered in this article . But, the reliability issues of SiC MOS FETs are also briefly summarized.
Abstract: Owing to the superior properties of silicon carbide (SiC), such as higher breakdown voltage, higher thermal conductivity, higher operating frequency, higher operating temperature, and higher saturation drift velocity, SiC has attracted much attention from researchers and the industry for decades. With the advances in material science and processing technology, many power applications such as new smart energy vehicles, power converters, inverters, and power supplies are being realized using SiC power devices. In particular, SiC MOSFETs are generally chosen to be used as a power device due to their ability to achieve lower on-resistance, reduced switching losses, and high switching speeds than the silicon counterpart and have been commercialized extensively in recent years. A general review of the critical processing steps for manufacturing SiC MOSFETs, types of SiC MOSFETs, and power applications based on SiC power devices are covered in this paper. Additionally, the reliability issues of SiC power MOSFET are also briefly summarized.
27 citations
TL;DR: In this article, the performance of theoretical ultra-highvoltage power semiconductor devices has been predicted by means of numerical simulations using the Sentaurus technology computer-aided design tool.
Abstract: The performance of theoretical ultrahigh-voltage power semiconductor devices has been predicted by means of numerical simulations using the Sentaurus technology computer-aided design tool. A general silicon carbide punch-through insulated-gate bipolar transistor (IGBT) structure has been implemented with suitable physics-based models and parameters to reflect the device characteristics in a wide range of device blocking voltages from 20 to 50 kV. The models for 20 kV class IGBTs have been implicitly validated by means of published experimental results. Mixed-mode simulations were performed that predicted total switching energy loss densities of 335, 629, 906, and 999 mJ/cm2 for 20, 30, 40, and 50 kV class devices, respectively, at 25 °C, JC = 20 A/cm2, and an ambipolar carrier lifetime of 20 μs. While the IGBT on -state forward voltage drop reduces, the switching losses increase with higher charge-carrier lifetime for a given current density (e.g., 20 A/cm2). The large span of simulation results will be used as an input support to the design of future high-power converters.
19 citations
Cites background from "15 kV-Class Implantation-Free 4H-Si..."
...In the scientific literature, SiC-based high-voltage diodes [9], [10], bipolar junction transistors [11], [12], MOSFETs [13], [14], IGBTs [10], [15]–[24], and thyristors [25], [26] have been experimentally demonstrated with various degrees of technological...
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References
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05 Sep 2008
TL;DR: In this article, the fundamental physics of power semiconductor devices are discussed and an analytical model for explaining the operation of all power Semiconductor devices is presented, focusing on silicon devices.
Abstract: Fundamentals of Power Semiconductor Devices provides an in-depth treatment of the physics of operation of power semiconductor devices that are commonly used by the power electronics industry. Analytical models for explaining the operation of all power semiconductor devices are shown. The treatment focuses on silicon devicesandincludes the unique attributes and design requirements for emerging silicon carbide devices.
1,730 citations
"15 kV-Class Implantation-Free 4H-Si..." refers background in this paper
...ULTRA-HIGH-VOLTAGE (>10 kV) bipolar junction transistors (BJTs) based on 4H-SiC are attractive candidates for high-voltage switching due to their excellent characteristics such as low ON-resistance (RON) at high current density, high breakdown voltage, negative coefficient of the current gain (β), normally-off switching behavior, and absence of gate-oxide reliability problems [1], [2]....
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TL;DR: The first high voltage npn bipolar junction transistors (BJTs) in 4H-SiC have been demonstrated in this article, where the BJTs were able to block 1800 V in common emitter mode and showed a peak current gain of 20 and an on-resistance of 10.8 m/spl Omega/spl middot/cm/sup 2/ at room temperature (I/sub C/=2.7 A @ V/sub CE/= 2 V for a 1 mm/spl times/1.4 mm active area).
Abstract: The first high voltage npn bipolar junction transistors (BJTs) in 4H-SiC have been demonstrated. The BJTs were able to block 1800 V in common emitter mode and showed a peak current gain of 20 and an on-resistance of 10.8 m/spl Omega//spl middot/cm/sup 2/ at room temperature (I/sub C/=2.7 A @ V/sub CE/=2 V for a 1 mm/spl times/1.4 mm active area), which outperforms all SiC power switching devices reported to date. Temperature-stable current gain was observed for these devices. This is due to the higher percent ionization of the deep level acceptor atoms in the base region at elevated temperatures, which offsets the effects of increased minority carrier lifetime at high temperatures. These transistors show a positive temperature coefficient in the on-resistance characteristics, which will enable easy paralleling of the devices.
155 citations
TL;DR: In this article, a 20kV-class small area (0.035 mm2) 4H-SiC bipolar junction transistors were implemented with edge termination techniques featuring two-zone junction termination extension and space-modulated rings.
Abstract: We report here 20-kV-class small-area (0.035 mm2) 4H-SiC bipolar junction transistors. We implemented edge termination techniques featuring two-zone junction termination extension and space-modulated rings. On-state characteristics showed a current gain of 63 and a specific on-resistance of 321 mΩ·cm2, which is slightly below the SiC unipolar limit. We achieved the open-base blocking voltage of 21 kV at a leakage current of 0.1 mA/cm2, which is the highest blocking voltage among any semiconductor switching devices.
101 citations
"15 kV-Class Implantation-Free 4H-Si..." refers background in this paper
...Although high current gain of (β = 257) has been reported for a low-voltage BJT [7], the β is in the range of 60-75 for highvoltage and ultra-high-voltage BJTs [18], [27]....
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Journal Article•
94 citations
TL;DR: In this article, the performance of bipolar junction transistor (BJT) is compared experimentally and by device simulation for 4H-SiC BJTs passivated with different surface passivation layers.
Abstract: In this brief, the electrical performance in terms of maximum current gain and breakdown voltage is compared experimentally and by device simulation for 4H-SiC BJTs passivated with different surface-passivation layers. Variation in bipolar junction transistor (BJT) performance has been correlated to densities of interface traps and fixed oxide charge, as evaluated through MOS capacitors. Six different methods were used to fabricate SiO2 surface passivation on BJT samples from the same wafer. The highest current gain was obtained for plasma-deposited SiO2 which was annealed in N2O ambient at 1100°C for 3 h. Variations in breakdown voltage for different surface passivations were also found, and this was attributed to differences in fixed oxide charge that can affect the optimum dose of the high-voltage junction-termination extension (JTE). The dependence of breakdown voltage on the dose was also evaluated through nonimplanted BJTs with etched JTE.
73 citations