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Proceedings ArticleDOI

93.5∼109.4GHz CMOS injection-locked frequency divider with 15.3% locking range

TL;DR: In this paper, a distributed LC injection-locked frequency divider is proposed, where the core area is 0.036 mm2 and the measured operation range is 93.5~109.4 GHz.
Abstract: A distributed-LC injection-locked frequency divider is proposed. This frequency divider has been realized in 65 nm CMOS technology. The core area is 0.036 mm2. The measured operation range is 93.5~109.4 GHz. Its center frequency is 102 GHz and the locking range is 15.3%. Its power is 5.5 mW from the supply of 1.1 V.
Citations
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Journal ArticleDOI
TL;DR: In this paper, two divide-by-2 (D2) and divideby-4 (D4) FDs were proposed to achieve the widest locking range reported to date by using a dual-mixing technique.
Abstract: A millimeter-wave (MMW) frequency synthesizer needs a low-power frequency divider (FD) with a wide input locking range to ensure reliability and lower power operation. In this paper, the design and analysis of low-power wide locking range MMW FDs are presented. Proposed are two divide-by-2 (D2) and divide-by-4 (D4) FDs that achieve the widest locking range reported to date by using a dual-mixing technique. Both FDs are fabricated in 90-nm CMOS and are demonstrated to achieve very wide input locking ranges without any tuning mechanism. At an input power of 0 dBm, the D2 FD has a locking range of 51-74 GHz, and that of the D4 FD is 82.5-89 GHz. The power consumption is only 3 mW for both the D2 FD and the D4 FD, from a 0.5 V supply. The proposed D2 and D4 FDs may facilitate incorporation into a product of a MMW phase-locked loop that is smaller, consumes less power, and is more reliable than the conventional approach.

52 citations


Cites background from "93.5∼109.4GHz CMOS injection-locked..."

  • ...While some other D2 FDs can indeed operate at higher frequencies [14], [18], [19], [21], and have small chip sizes [15]–[17], [20], the input locking ranges are still not wide enough to provide robust tracking between the MMW VCO and FD [14]–[21]....

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Proceedings ArticleDOI
29 May 2009
TL;DR: A 96GHz PLL, implemented in 65nm CMOS, is presented that targets W-band applications.
Abstract: Advances in nanoscale CMOS technology have made it feasible to implement W-Band circuits in CMOS. Recently, CMOS implementation of high-frequency circuits for applications such as 77GHz anti-collision systems, 94GHz imaging systems, and 100Gb/s Ethernet transceivers has attracted a lot of attention. In high-speed wireless and wireline communication systems, PLLs are one of the key building blocks and are extensively used to generate a stable reference frequency/clock. In this paper, a 96GHz PLL, implemented in 65nm CMOS, is presented that targets W-band applications.

36 citations


Cites background or methods from "93.5∼109.4GHz CMOS injection-locked..."

  • ...From (2) and [8], the locking range of the first ILFD is strongly dependent on the bias voltage (Vbias) of the injection MOS transistor, Minj....

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  • ...The locking range (Δω) of the first divider is derived as [8,9]:...

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Proceedings ArticleDOI
29 May 2009
TL;DR: In this work, a 128.24-to-137.00GHz CMOS ILFD with split-injection and split-cross-coupled pair is presented for D-Band applications.
Abstract: Owing to the nanoscale CMOS technology, mm-wave circuits have been recently attracting a lot of attention for communication, sensing and imaging systems. Several mm-wave components with operation frequencies around or more than 100GHz have been reported [1–7]. The frequency divider is one of the key building blocks in wireless transceivers. Several W-Band (75 to 110GHz) and D-Band (90 to 140GHz) ILFDs [3–6] and static dividers [7] have been presented. In this work, a 128.24-to-137.00GHz CMOS ILFD with split-injection and split-cross-coupled pair is presented for D-Band applications.

34 citations


Cites background or methods from "93.5∼109.4GHz CMOS injection-locked..."

  • ...Several W-Band (75 to 110GHz) and D-Band (90 to 140GHz) ILFDs [3-6] and static dividers [7] have been presented....

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  • ...The ILFD performance summary and comparison with [3-7] are presented in Fig....

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  • ...Several mm-wave components with operation frequencies around or more than 100GHz have been reported [1-7]....

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Journal ArticleDOI
TL;DR: D-band (110-170 GHz) injection-locked frequency dividers (ILFDs) using the distributed-LC technique are presented and measurement results conform with the theoretical analysis.
Abstract: D-band (110-170 GHz) injection-locked frequency dividers (ILFDs) using the distributed-LC technique are presented. The input frequency, the locking range, and the design considerations for the D-band ILFDs are analyzed. Six ILFDs are fabricated in 65 nm CMOS process. Two of the ILFDs have locking ranges of 107.9-128.8 GHz and 153.3-162.8 GHz. Each ILFD consumes 6.27 mW from a 1.1 V power supply. The chip area is 0.49 × 0.475-mm2 including the pads. The measurement results conform with the theoretical analysis.

33 citations


Cites background from "93.5∼109.4GHz CMOS injection-locked..."

  • ...Many efforts are made to analyze the locking range of an ILFD [4]–[8], [13]–[25], while most of them focus on the ILFD with injection to a current source (for example, inject to the gate of in Fig....

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Proceedings ArticleDOI
01 Nov 2010
TL;DR: A 60-GHz injection-locked frequency divider fabricated in 65nm CMOS and operating at 1.2V consumes 1.65mW excluding buffers and biasing circuits, and has a measured locking range of 48.5–62.9GHz with 0dBm input power.
Abstract: A 60-GHz injection-locked frequency divider (ILFD) fabricated in 65nm CMOS and operating at 1.2V consumes 1.65mW excluding buffers and biasing circuits, and has a measured locking range of 48.5–62.9GHz (25.9%) with 0dBm input power. The core ILFD area is 0.0157mm2. The large locking range is attributed to the use of the multi-order LC oscillator topology.

30 citations


Cites background from "93.5∼109.4GHz CMOS injection-locked..."

  • ...The authors would like to thank William W. Walker, Magnus Wiklund and Pradip Thachile of Fujitsu Laboratories of America for their generous support....

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References
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Journal ArticleDOI
TL;DR: In this paper, a direct injection-locked frequency dividers (ILFDs) were designed and fabricated using a 0.13mum bulk CMOS process to verify the developed model and design guidelines.
Abstract: In this paper, direct injection-locked frequency dividers (ILFDs), which operate in the millimeter-wave (MMW) band, are analyzed. An analytically equivalent model of the direct ILFDs is developed, and important design guidelines for a large frequency locking range are obtained from it. These guidelines are: 1) maximize the quality factor of the passive load; 2) maintain low output amplitude; and 3) increase the dc overdrive voltage of the input device. A direct ILFD without varactors is designed and fabricated using a 0.13-mum bulk CMOS process to verify the developed model and design guidelines. A pMOS current source is used to restrict the output amplitude and to increase the dc overdrive voltage of the input device to achieve a large frequency locking range. The size of the input device is only 3.6 mum/0.12 mum and the measured frequency locking range is 13.6% at 70 GHz with a power consumption of 4.4 mW from a supply voltage of 1 V. In short, the proposed divider has the potential to be integrated into an MMW phase-locked loop system.

69 citations


"93.5∼109.4GHz CMOS injection-locked..." refers background in this paper

  • ...In [5], the injection current in I can be decomposed in to the in-phase and quadrature components ( ) cos( ) ( )sin( ) in i q I I t I t φ ω φ φ ω φ = + + + (1)...

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Proceedings ArticleDOI
18 Jun 2007
TL;DR: Two injection-locked 2:1 frequency dividers for automotive radar applications achieve locking ranges from 82 to 94 and from 34.3 to 42.1 GHz and consume 4mW and 8.4mW, respectively.
Abstract: Two injection-locked 2:1 frequency dividers for automotive radar applications achieve locking ranges from 82 to 94.1 GHz and from 34.3 to 42.1 GHz and consume 4mW and 8.4mW, respectively. The cascade of the two dividers can be locked from 79.7 to 81.6GHz. The 1mm2 chip is implemented in a 65nm CMOS process.

55 citations


"93.5∼109.4GHz CMOS injection-locked..." refers background in this paper

  • ...For CMOS clocking circuit more than 100GHz [1-3], the injection-locked frequency divider (ILFD) [1,3] is attractive for the maximum operation speed and low power consumption; however, the locking range is limited....

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Proceedings ArticleDOI
01 Feb 2008
TL;DR: To widen the lockingrange of an ILFD, the transconductance-enhancement technique is presented and two low-power ILFDs have a locking range of 85.1 to 96.3 GHz and 98.9 to 105.2 GHz, respectively.
Abstract: The frequency divider (FD) is one of the key components in very-high-frequency (VHF) PLLs. Conventionally, injection-locked frequency divider (ILFD) , Miller frequency divider, and CML static divider are widely used in various applications. Among these dividers, the ILFD has the highest operation frequency, but the locking range is limited. On the other hand, the static FD covers a wide locking range, but its operation frequency is low and the power consumption is usually high. Since a FD connected to a VCO operates at the highest frequency, the power dissipation and the locking range of a VHF FD should be carefully considered. In a PLL, due to the process and temperature variations, the locking range of the ILFD must be several times larger than the tuning range of the VCO. Thus, it is challenging to design a wide locking-range and low-power ILFD in the millimeter-wave applications. To achieve a higher operational frequency for an ILFD, the distributed LC oscillator is adopted. To widen the locking range of an ILFD, the transconductance-enhancement technique is presented. In this paper, two low-power ILFDs have a locking range of 85.1 to 96.3 GHz and 98.9 to 105.2 GHz, respectively.

53 citations


"93.5∼109.4GHz CMOS injection-locked..." refers background in this paper

  • ...The distributed inductors [3,4] L1 and L2 separate the capacitances Cin and Cout to raise the operation frequency and enhance the locking range....

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  • ...For CMOS clocking circuit more than 100GHz [1-3], the injection-locked frequency divider (ILFD) [1,3] is attractive for the maximum operation speed and low power consumption; however, the locking range is limited....

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Proceedings ArticleDOI
18 Jun 2007
TL;DR: A static CML divide-by-2 frequency divider is integrated in 65nm SOI CMOS for measurement of self-oscillation frequency at multiple bias conditions to estimation of the variation in threshold voltage, capacitance, and resistance.
Abstract: A static CML divide-by-2 frequency divider is integrated in 65nm SOI CMOS. The maximum operating frequency is 90GHz while dissipating 52.4mW. The self-oscillation frequency is 92GHz with 0.57pJ switching energy. Measurement of self-oscillation frequency at multiple bias conditions enables estimation of the variation in threshold voltage, capacitance, and resistance.

34 citations


"93.5∼109.4GHz CMOS injection-locked..." refers background in this paper

  • ...For CMOS clocking circuit more than 100GHz [1-3], the injection-locked frequency divider (ILFD) [1,3] is attractive for the maximum operation speed and low power consumption; however, the locking range is limited....

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Journal ArticleDOI
TL;DR: This brief presents the theoretical study of a novel oscillator that incorporates higher order LC filters to produce multiple oscillation frequencies that may be several octaves apart, thereby reducing the area of the circuit when being used for multistandard wireless applications.
Abstract: A conventional differential pair LC oscillator is capable of generating only a single fundamental oscillation frequency. This brief presents the theoretical study of a novel oscillator that incorporates higher order LC filters to produce multiple oscillation frequencies that may be several octaves apart. These multiple oscillation frequencies are obtained from a single oscillator, thereby reducing the area of the circuit when being used for multistandard wireless applications. Moreover, a multi-order oscillator does not suffer from large parasitic capacitances from switches, which is a common drawback in switched-inductor tuned oscillators. A detailed analysis is carried out, and useful design insights are provided

23 citations


"93.5∼109.4GHz CMOS injection-locked..." refers background in this paper

  • ...The distributed inductors [3,4] L1 and L2 separate the capacitances Cin and Cout to raise the operation frequency and enhance the locking range....

    [...]