A 1.0-V V/sub DD/ CMOS active-pixel sensor with complementary pixel architecture and pulsewidth modulation fabricated with a 0.25-/spl mu/m CMOS process
TL;DR: In this paper, a complementary active pixel sensor (CAPS) architecture is developed to operate at a voltage below 1 V V/sub DD/ without using bootstrapping techniques.
Abstract: In this paper, an architecture to design a CMOS active-pixel sensor (APS) in an extremely low-voltage environment imposed by advanced CMOS technology is proposed. A complementary active pixel sensor (CAPS) architecture is developed to allow a CMOS active pixel to operate at a voltage below 1 V V/sub DD/ without using bootstrapping techniques. A fixed voltage deference (FVD) method with correlated double sampling is used to increase the dynamic range of the readout circuit. Both the CAPS and FVD readout circuits together, with an 8-b analog-to-digital converter, are implemented in a commercially available 0.25-/spl mu/m, single-poly and five-metal CMOS process. Measurement results show that the circuit is functional at a V/sub DD/ below 1 V with 15-dB added dynamic range compared with a conventional CMOS APS architecture.
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TL;DR: In this paper, CMOS Image Sensors are reviewed, providing information on the latest advances achieved, their applications, the new challenges and their limitations, leading to the State-of-the-art of CMOS image sensors.
546 citations
Book•
22 Jul 2008
TL;DR: In this article, color theory is explained from its origin to the current state of the art, including image capture and display as well as the practical use of color in disciplines such as computer graphics, computer vision, photography, and film.
Abstract: This book provides the reader with an understanding of what color is, where color comes from, and how color can be used correctly in many different applications. The authors first treat the physics of light and its interaction with matter at the atomic level, so that the origins of color can be appreciated. The intimate relationship between energy levels, orbital states, and electromagnetic waves helps to explain why diamonds shimmer, rubies are red, and the feathers of the Blue Jay are blue. Then, color theory is explained from its origin to the current state of the art, including image capture and display as well as the practical use of color in disciplines such as computer graphics, computer vision, photography, and film.
182 citations
Cites background from "A 1.0-V V/sub DD/ CMOS active-pixel..."
...Examples of technologies that have been demonstrated include thin film on ASIC (TFA) pixel designs, which yield high sensitivity and dynamic range [707, 708], and complementary active pixel sensors (CAPS) [1264]....
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TL;DR: Analytical models and a universal figure of merit - image quality and dynamic range to energy complexity factor are proposed to quantitatively assess different PM imagers across the entire spectrum of PM architectures.
Abstract: In time-domain or pulse-modulation (PM) imaging, the incident light intensity is not encoded in amounts of charge, voltage, or current as it is in conventional image sensors. Instead, the image data are represented by the timing of pulses or pulse edges. This method of visual information encoding optimizes the phototransduction individually for each pixel by abstaining from imposing a fixed integration time for the entire array. Exceptionally high dynamic range (DR) and improved signal-to-noise ratio (SNR) are immediate benefits of this approach. In particular, DR is no longer limited by the power-supply rails as in conventional complementary metal-oxide semiconductor (CMOS) complementary metal-oxide semiconductor active pixel sensors, thus providing relative immunity to the supply-voltage scaling of modern CMOS technologies. In addition, PM imaging naturally supports pixel-parallel analog-to-digital conversion, thereby enabling high temporal resolution/frame rates or an asynchronous event-based array readout. The applications of PM imaging in emerging areas, such as sensor network, wireless endoscopy, retinal prosthesis, polarization imaging, and energy harvesting are surveyed to demonstrate the effectiveness of PM imaging in low-power, high-performance machine vision, and biomedical applications of the future. The evolving design innovations made in PM imaging, such as high-speed arbitration circuits and ultra-compact processing elements, are expected to have even wider impacts in disciplines beyond CMOS image sensors. This paper thoroughly reviews and classifies all common PM image sensor architectures. Analytical models and a universal figure of merit - image quality and dynamic range to energy complexity factor are proposed to quantitatively assess different PM imagers across the entire spectrum of PM architectures.
73 citations
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TL;DR: In contrast to other early designs of energy harvesting image sensors, this scheme uses the photodetector itself for power generation, which results in better utilization of the photosensitive area and more importantly an improved energy generation scheme.
Abstract: This paper proposes a novel energy harvesting technique based on an asynchronous pixel structure and an efficient energy generation scheme, referred to as avalanche energy generation (AEG). The key idea behind using an asynchronous type of pixel is to lower the power consumption by enabling only active pixels to be read-out after which they enter into a power generation mode. In this mode, the on-pixel photodetector itself will be used to harvest the light energy from the environment and make it available to active pixels. A very interesting feature about our proposed approach is that during a frame capture, critical energy is mainly required for starting-up activity. Once a group of pixels have been read-out, the available energy will rise and more array activity will contribute to the generation of more energy, hence creating an avalanche effect. In contrast to other early designs of energy harvesting image sensors, our scheme uses the photodetector itself for power generation. This results in better utilization of the photosensitive area and more importantly an improved energy generation scheme. Detailed power analysis and extensive simulation results are provided in this paper, which validate the proposed concept. Three test structures have been fabricated in AMIS 1-poly, 5-metal CMOS 0.35-m n-well process. The power generation process and event generation have been successfully verified experimentally.
40 citations
Cites background from "A 1.0-V V/sub DD/ CMOS active-pixel..."
...2028570 mobile devices [1], [2], while supporting increased complexity and higher image resolution....
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TL;DR: In this paper, the authors presented an ultra-low-power current-mode image sensor with energy harvesting capability, by biasing the in-pixel transconductance amplifier in triode region and using a pipelined 9-bit ADC.
Abstract: In this paper, we present an ultra-low-power current-mode image sensor with energy harvesting capability. By biasing the in-pixel transconductance amplifier in triode region and using a pipelined 9-bit current-mode analog-to-digital converter (ADC), a power consumption as low as 84 pW/frame per pixel is achieved. Besides the ultra-low-power feature, the proposed 6T pixel can also be used as a solar cell by reconfiguring the in-pixel P+/Nwell photodiode, which can generate several micro watt power at Klux illumination levels. As a result, this energy harvesting imager is very suitable for wireless image sensor network applications. The test chip with a 128 × 96 pixel array resolution is fabricated using a 0.35 μ m CMOS technology. The random noise and the fixed pattern noise (FPN) in dark are 0.4% and 1%, respectively. In the energy harvesting mode, 4.85 μW power can be harvested using the reconfigurable pixel array.
34 citations
Cites background from "A 1.0-V V/sub DD/ CMOS active-pixel..."
...It is expected that the next generation of CMOS mega-pixel image sensor will consume less than 1 mW of power to support the continuously increased demand for wireless devices [1]....
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References
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Journal Article•
TL;DR: In this article, the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.
Abstract: CMOS active pixel sensors (APS) have performance competitive with charge-coupled device (CCD) technology, and offer advantages in on-chip functionality, system power reduction, cost, and miniaturization. This paper discusses the requirements for CMOS image sensors and their historical development, CMOS devices and circuits for pixels, analog signal chain, and on-chip analog-to-digital conversion are reviewed and discussed.
693 citations
TL;DR: In this paper, a 352/spl times/288 pixel CMOS image sensor chip with per-pixel single-slope ADC and dynamic memory in a standard digital 0.18-/spl mu/m CMOS process is described.
Abstract: A 352/spl times/288 pixel CMOS image sensor chip with per-pixel single-slope ADC and dynamic memory in a standard digital 0.18-/spl mu/m CMOS process is described. The chip performs "snapshot" image acquisition, parallel 8-bit A/D conversion, and digital readout at continuous rate of 10000 frames/s or 1 Gpixels/s with power consumption of 50 mW. Each pixel consists of a photogate circuit, a three-stage comparator, and an 8-bit 3T dynamic memory comprising a total of 37 transistors in 9.4/spl times/9.4 /spl mu/m with a fill factor of 15%. The photogate quantum efficiency is 13.6%, and the sensor conversion gain is 13.1 /spl mu/V/e/sup -/. At 1000 frames/s, measured integral nonlinearity is 0.22% over a 1-V range, rms temporal noise with digital CDS is 0.15%, and rms FPN with digital CDS is 0.027%. When operated at low frame rates, on-chip power management circuits permit complete powerdown between each frame conversion and readout. The digitized pixel data is read out over a 64-bit (8-pixel) wide bus operating at 167 MHz, i.e., over 1.33 GB/s. The chip is suitable for general high-speed imaging applications as well as for the implementation of several still and standard video rate applications that benefit from high-speed capture, such as dynamic range enhancement, motion estimation and compensation, and image stabilization.
382 citations
10 Dec 1995
TL;DR: Recent advancements in CMOS image sensor technology are reviewed, including both passive pixel sensors and active pixel sensors that permit realization of an electronic camera-on-a-chip.
Abstract: Recent advancements in CMOS image sensor technology are reviewed, including both passive pixel sensors and active pixel sensors. On-chip analog to digital converters and on-chip timing and control circuits permit realization of an electronic camera-on-a-chip.
152 citations
IBM1
TL;DR: The device and process design considerations required to enable CMOS as an image sensor technology are highlighted and the impact of device scaling on the image sensing performance can be studied.
Abstract: This paper reports the experimental results of the first CMOS active pixel image sensors (APS) fabricated using a high-performance 1.8-V, 0.25-/spl mu/m CMOS logic technology. No process modifications were made to the CMOS logic technology so that the impact of device scaling on the image sensing performance can be studied. This paper highlights the device and process design considerations required to enable CMOS as an image sensor technology.
72 citations
16 May 1999
TL;DR: In this paper, a complementary metaloxide-semiconductor (CMOS) active pixel sensor (APS) camera chip with direct frame difference output is reported, where the pixel circuit occupies 32.2/spl times/32.2 /spl mu/m/sup 2/ with a fill factor of 33%.
Abstract: A complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) camera chip with direct frame difference output is reported in this paper. The proposed APS cell circuit has in-pixel storage for previous frame image data so that the current frame image and the previous frame image can be read out simultaneously in differential mode. The signal swing of the pixel circuit is maximized for low supply voltage operation. The pixel circuit occupies 32.2/spl times/32.2 /spl mu/m/sup 2/ of chip area with a fill factor of 33%. A 128/spl times/98 element prototype camera chip with an on-chip 8-bit analog-to-digital converter has been fabricated in a 0.5-/spl mu/m double-poly double-metal CMOS process and successfully tested. The camera chip consumes 56 mW at 30 frames/s with 3.3 V power supply.
70 citations