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Proceedings ArticleDOI

A 14 Bit Dual Channel Incremental Continuous-Time Delta Sigma Modulator for Multiplexed Data Acquisition

04 Jan 2016-pp 230-235
TL;DR: This work gives simple expressions for quantization and thermal noise of an incremental CTDSM that achieves a bandwidth of 6 6 kHz/channel and is used to design a two channel incrementalCTDSM.
Abstract: CTDSMs operated in the incremental mode can achieve sample-by-sample conversion in a power efficient manner, while relaxing the requirements of the buffer driving the ADC. This work gives simple expressions for quantization and thermal noise of an incremental CTDSM. These are used to design a two channel incremental CTDSM that achieves a bandwidth of 6 6 kHz/channel. The ADC, designed in a 180nm CMOS process, achieves 85.1dB SNDR while consuming 55uW/channel from a 1.8 V supply.
Citations
More filters
Proceedings ArticleDOI
13 Sep 2021
TL;DR: In this paper, a high-bandwidth, high-resolution continuous-time incremental ΣΔ-modulator employing a 6-tap finite impulse response (FIR) feedback digital-to-analog converter (DAC) for improved clock jitter immunity is presented.
Abstract: This paper presents a high-bandwidth, high-resolution continuous-time incremental ΣΔ-modulator employing a 6-tap finite impulse response (FIR) feedback digital-to-analog converter (DAC) for improved clock jitter immunity. Resetting the FIR filter internal states in the incremental mode introduces initial transient overshoots, which can cause instability at high input amplitudes. To solve this problem, we propose the use of a purely resistive feedthrough path from the overall input to the second integrator input. This additional path alleviates the large transient swings associated with the incremental operation and extends the modulator's dynamic range (DR). Furthermore, we introduce a novel implementation of a fully differential dual return-to-zero (RTZ) resistive FIR DAC that eliminates inter-symbol interference (ISI) signal-dependent errors and, thereby, improves modulator linearity. The presented design is fabricated in a 180-nm SOI CMOS technology and achieves a DR of 90.3 dB and a peak spurious-free DR of 93.1 dB at a Nyquist conversion rate of 1 MS/s. The power dissipated from a 1.8-V power supply is 8.06 mW, resulting in a Schreier FoM of 168.3 dB.

2 citations

Journal ArticleDOI
TL;DR: In this paper, a complementary metal oxide semiconductor wearable infrared (IR) light intensity digital converter was proposed for monitoring the unplanned self-extubation of patients. But the proposed converter could process the IR light intensity without limitations of the field of view and is immune to ambient optical noise.
Abstract: This paper proposes a complementary metal oxide semiconductor wearable infrared (IR) light intensity digital converter for monitoring the unplanned self-extubation of patients. The proposed converter could process the IR light intensity without limitations of the field-of-view and is immune to ambient optical noise. Furthermore, the output of the proposed converter can be easily transmitted to Internet of things devices. The sensing area of a monolithic photodiode was $120 \times 120\,\,\mu \text{m}^{2}$ , and the complete size of the chip was $1.21 \times 2.04\,\,\text {mm}^{2}$ . The measured distance between an IR light source and the proposed converter was 15–29 cm, and the measured signal-to-noise-distortion ratio was corresponding to 80.9–74.9 dB. Finally, an experiment was conducted for monitoring the unplanned self-extubation of patients. The results indicate that the proposed chip is suitable for usage in medical institutions.

2 citations

References
More filters
Journal ArticleDOI
TL;DR: It is shown how speed, resolution, and A/D complexity can be optimized for a given design, and how with some special digital filters improved speed/resolution ratio can be achieved.
Abstract: Analog-Digital (A/D) converters used in instrumentation and measurements often require high absolute accuracy, including very high linearity and negligible dc offset. The realization of high-resolution Nyquist-rate converters becomes very expensive when the resolution exceeds 16 bits. The conventional delta-sigma (/spl Delta//spl Sigma/) structures used in telecommunication and audio applications usually cannot satisfy the requirements of high absolute accuracy and very small offset. The incremental (or integrating) converter provides a solution for such measurement applications, as it has most advantages of the /spl Delta//spl Sigma/ converter, yet is capable of offset-free and accurate conversion. In this paper, theoretical and practical aspects of higher order incremental converters are discussed. The operating principles, topologies, specialized digital filter design methods, and circuit level issues are all addressed. It is shown how speed, resolution, and A/D complexity can be optimized for a given design, and how with some special digital filters improved speed/resolution ratio can be achieved. The theoretical results are verified by showing design examples and simulation results.

269 citations

Journal ArticleDOI
TL;DR: A low-power 22-bit incremental ADC, including an on-chip digital filter and a low-noise/low-drift oscillator, realized in a 0.6-mum CMOS process, incorporates a novel offset-cancellation scheme based on fractal sequences, a novel high-accuracy gain control circuit, and a novel reduced-complexity realization for the on- chip sinc filter.
Abstract: This paper describes a low-power 22-bit incremental ADC, including an on-chip digital filter and a low-noise/low-drift oscillator, realized in a 0.6-mum CMOS process. It incorporates a novel offset-cancellation scheme based on fractal sequences, a novel high-accuracy gain control circuit, and a novel reduced-complexity realization for the on-chip sinc filter. The measured output noise was 0.25 ppm (2.5 muVRMS), the DC offset 2 muV, the gain error 2 ppm, and the INL 4 ppm. The chip operates with a single 2.7-5 V supply, and draws only 120 muA current during conversion

134 citations

Journal ArticleDOI
TL;DR: The “assisted opamp” integrator is introduced, which is a way of achieving low distortion operation with low power consumption and circuit implementations of the technique for single-bit modulators using NRZ and switched-capacitor-resistor feedback DACs are presented.
Abstract: The opamp in the first integrator of a high resolution single-bit continuous-time modulator has stringent slew rate requirements, which increases power dissipation. We introduce the “assisted opamp” integrator, which is a way of achieving low distortion operation with low power consumption. We present circuit implementations of our technique for single-bit modulators using NRZ and switched-capacitor-resistor (SCR) feedback DACs. Audio modulators designed in a 0.18 μm CMOS technology are used as vehicles to demonstrate the effectiveness of our techniques. The modulator with an NRZ DAC achieves a dynamic range of 92.5 dB in a 24 kHz bandwidth and dissipates 110 μW from a 1.8 V supply. A second design, which employs an SCR-DAC, achieves a dynamic range of 91.5 dB and dissipates 122 μW. The figures of merit (FOM) of these modulators, 175.9 dB and 174.4 dB respectively, are comparable with those of state-of-the-art multibit designs.

84 citations


"A 14 Bit Dual Channel Incremental C..." refers methods in this paper

  • ...The linearity of the first integrator of the CTΔΣM was enhanced using opamp assistance [3]....

    [...]

  • ...The assistant transconductor that senses the input voltage and injects an appropriate current into the output of the first OTA is a class-AB design, similar to the one used in [3]....

    [...]

Journal Article
TL;DR: In this article, a 3 rd order single-loop continuous-time incremental sigma-delta analogue-to-digital con- verter (ADC) for time-multiplexed signals is proposed.
Abstract: This paper proposes a 3 rd order single-loop continuous-time incremental sigma-delta analogue-to-digital con- verter (ADC) for time-multiplexed signals. Incremental sigma- delta modulation is used to address medium to high resolution requirements of multi-channel applications, while a 3 rd order continuous-time implementation is investigated as an alternative for low-power solutions. A prototype of the proposed modulator, running at 320 kHz, has been fabricated in a 0.15-µm CMOS technology, while the synchronization circuitry to allow incre- mental operation was built on-board. Measurement results show that the ADC achieves 65.3 dB peak SNR, 64 dB peak SNDR and 68.2 dB dynamic range over a 2 kHz bandwidth. The modulator's power dissipation is 96 µW from a 1.6 V power supply. This translates into the best figure-of-merit when compared to recently published continuous-time alternatives, while being competitive with respect to state-of-the-art discrete-time counterparts. Index Terms—A/D conversion, incremental ADC, continuous-time.

55 citations

Journal ArticleDOI
TL;DR: This paper proposes a 3rd order single-loop continuous-time incremental sigma-delta analogue-to-digital converter (ADC) for time-multiplexed signals, being competitive with respect to state-of-the-art discrete-time counterparts.
Abstract: This paper proposes a 3rd order single-loop continuous-time incremental sigma-delta analogue-to-digital converter (ADC) for time-multiplexed signals. Incremental sigma-delta modulation is used to address medium to high resolution requirements of multi-channel applications, while a 3rd order continuous-time implementation is investigated as an alternative for low-power solutions. A prototype of the proposed modulator, running at 320 kHz, has been fabricated in a 0.15-μm CMOS technology, while the synchronization circuitry to allow incremental operation was built on-board. Measurement results show that the ADC achieves 65.3 dB peak SNR, 64 dB peak SNDR and 68.2 dB dynamic range over a 2 kHz bandwidth. The modulator's power dissipation is 96 μW from a 1.6 V power supply. This translates into the best figure-of-merit when compared to recently published continuous-time alternatives, while being competitive with respect to state-of-the-art discrete-time counterparts.

44 citations