A 160-kilobit molecular electronic memory patterned at 10 11 bits per square centimetre
TL;DR: A 160,000-bit molecular electronic memory circuit, fabricated at a density of 1011 bits cm-2 (pitch 33 nm; memory cell size 0.0011 μm2), that is, roughly analogous to the dimensions of a DRAM circuit projected to be available by 2020.
Abstract: The primary metric for gauging progress in the various semiconductor integrated circuit technologies is the spacing, or pitch, between the most closely spaced wires within a dynamic random access memory (DRAM) circuit. Modern DRAM circuits have 140 nm pitch wires and a memory cell size of 0.0408 mum(2). Improving integrated circuit technology will require that these dimensions decrease over time. However, at present a large fraction of the patterning and materials requirements that we expect to need for the construction of new integrated circuit technologies in 2013 have 'no known solution'. Promising ingredients for advances in integrated circuit technology are nanowires, molecular electronics and defect-tolerant architectures, as demonstrated by reports of single devices and small circuits. Methods of extending these approaches to large-scale, high-density circuitry are largely undeveloped. Here we describe a 160,000-bit molecular electronic memory circuit, fabricated at a density of 10(11) bits cm(-2) (pitch 33 nm; memory cell size 0.0011 microm2), that is, roughly analogous to the dimensions of a DRAM circuit projected to be available by 2020. A monolayer of bistable, [2]rotaxane molecules served as the data storage elements. Although the circuit has large numbers of defects, those defects could be readily identified through electronic testing and isolated using software coding. The working bits were then configured to form a fully functional random access memory circuit for storing and retrieving information.
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TL;DR: A coarse-grained classification into primarily thermal, electrical or ion-migration-induced switching mechanisms into metal-insulator-metal systems, and a brief look into molecular switching systems is taken.
Abstract: Many metal–insulator–metal systems show electrically induced resistive switching effects and have therefore been proposed as the basis for future non-volatile memories. They combine the advantages of Flash and DRAM (dynamic random access memories) while avoiding their drawbacks, and they might be highly scalable. Here we propose a coarse-grained classification into primarily thermal, electrical or ion-migration-induced switching mechanisms. The ion-migration effects are coupled to redox processes which cause the change in resistance. They are subdivided into cation-migration cells, based on the electrochemical growth and dissolution of metallic filaments, and anion-migration cells, typically realized with transition metal oxides as the insulator, in which electronically conducting paths of sub-oxides are formed and removed by local redox processes. From this insight, we take a brief look into molecular switching systems. Finally, we discuss chip architecture and scaling issues.
4,547 citations
TL;DR: A nanoscale silicon-based memristor device is experimentally demonstrated and it is shown that a hybrid system composed of complementary metal-oxide semiconductor neurons and Memristor synapses can support important synaptic functions such as spike timing dependent plasticity.
Abstract: A memristor is a two-terminal electronic device whose conductance can be precisely modulated by charge or flux through it. Here we experimentally demonstrate a nanoscale silicon-based memristor device and show that a hybrid system composed of complementary metal−oxide semiconductor neurons and memristor synapses can support important synaptic functions such as spike timing dependent plasticity. Using memristors as synapses in neuromorphic circuits can potentially offer both high connectivity and high density required for efficient computing.
3,650 citations
TL;DR: This work reviews the first progress in the resulting field, molecular spintronics, which will enable the manipulation of spin and charges in electronic devices containing one or more molecules, and discusses the advantages over more conventional materials, and the potential applications in information storage and processing.
Abstract: A revolution in electronics is in view, with the contemporary evolution of the two novel disciplines of spintronics and molecular electronics. A fundamental link between these two fields can be established using molecular magnetic materials and, in particular, single-molecule magnets. Here, we review the first progress in the resulting field, molecular spintronics, which will enable the manipulation of spin and charges in electronic devices containing one or more molecules. We discuss the advantages over more conventional materials, and the potential applications in information storage and processing. We also outline current challenges in the field, and propose convenient schemes to overcome them.
2,694 citations
TL;DR: Bipolar voltage-actuated switches, a family of nonlinear dynamical memory devices, can execute material implication (IMP), which is a fundamental Boolean logic operation on two variables p and q such that pIMPq is equivalent to (NOTp)ORq.
Abstract: The authors of the International Technology Roadmap for Semiconductors-the industry consensus set of goals established for advancing silicon integrated circuit technology-have challenged the computing research community to find new physical state variables (other than charge or voltage), new devices, and new architectures that offer memory and logic functions beyond those available with standard transistors. Recently, ultra-dense resistive memory arrays built from various two-terminal semiconductor or insulator thin film devices have been demonstrated. Among these, bipolar voltage-actuated switches have been identified as physical realizations of 'memristors' or memristive devices, combining the electrical properties of a memory element and a resistor. Such devices were first hypothesized by Chua in 1971 (ref. 15), and are characterized by one or more state variables that define the resistance of the switch depending upon its voltage history. Here we show that this family of nonlinear dynamical memory devices can also be used for logic operations: we demonstrate that they can execute material implication (IMP), which is a fundamental Boolean logic operation on two variables p and q such that pIMPq is equivalent to (NOTp)ORq. Incorporated within an appropriate circuit, memristive switches can thus perform 'stateful' logic operations for which the same devices serve simultaneously as gates (logic) and latches (memory) that use resistance instead of voltage or charge as the physical state variable.
1,642 citations
TL;DR: This review presents a brief summary of bottom-up and hybrid bottom- up/top-down strategies for nanoelectronics with an emphasis on memories based on the crossbar motif, including experimental demonstrations of key concepts such lithography-independent, chemically coded stochastic demultipluxers.
Abstract: Electronics obtained through the bottom-up approach of molecular-level control of material composition and structure may lead to devices and fabrication strategies not possible with top-down methods. This review presents a brief summary of bottom-up and hybrid bottom-up/top-down strategies for nanoelectronics with an emphasis on memories based on the crossbar motif. First, we will discuss representative electromechanical and resistance-change memory devices based on carbon nanotube and core-shell nanowire structures, respectively. These device structures show robust switching, promising performance metrics and the potential for terabit-scale density. Second, we will review architectures being developed for circuit-level integration, hybrid crossbar/CMOS circuits and array-based systems, including experimental demonstrations of key concepts such lithography-independent, chemically coded stochastic demultipluxers. Finally, bottom-up fabrication approaches, including the opportunity for assembly of three-dimensional, vertically integrated multifunctional circuits, will be critically discussed.
1,537 citations
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TL;DR: It is shown that nanowires can be assembled into parallel arrays with control of the average separation and, by combining fluidic alignment with surface-patterning techniques, that it is also possible to control periodicity.
Abstract: One-dimensional nanostructures, such as nanowires and nanotubes, represent the smallest dimension for efficient transport of electrons and excitons and thus are ideal building blocks for hierarchical assembly of functional nanoscale electronic and photonic structures. We report an approach for the hierarchical assembly of one-dimensional nanostructures into well-defined functional networks. We show that nanowires can be assembled into parallel arrays with control of the average separation and, by combining fluidic alignment with surface-patterning techniques, that it is also possible to control periodicity. In addition, complex crossed nanowire arrays can be prepared with layer-by-layer assembly with different flow directions for sequential steps. Transport studies show that the crossed nanowire arrays form electrically conducting networks, with individually addressable device function at each cross point.
2,288 citations
TL;DR: “Spintronics,” in which both the spin and charge of electrons are used for logic and memory operations, promises an alternate route to traditional semiconductor electronics.
Abstract: “Spintronics,” in which both the spin and charge of electrons are used for logic and memory operations, promises an alternate route to traditional semiconductor electronics. A complete logic architecture can be constructed, which uses planar magnetic wires that are less than a micrometer in width. Logical NOT, logical AND, signal fan-out, and signal cross-over elements each have a simple geometric design, and they can be integrated together into one circuit. An additional element for data input allows information to be written to domain-wall logic circuits.
1,955 citations
TL;DR: Comparison of the intrinsic switching delay, τ = CV/I, shows that the performance of Ge/Si NWFETs is comparable to similar length carbon nanotube FETs and substantially exceeds the length-dependent scaling of planar silicon MOSFets.
Abstract: Field-effect transistors (FETs) based on semi-conductor nanowires could one day replace standard silicon MOSFETs in miniature electronic circuits. MOSFETs, or metal-oxide semiconductor field-effect transistors, are a type of transistor used for high-speed switching and in a computer's integrated circuits. A specially designed nanowire with a germanium shell and silicon core has shown promise as a nanometre-scale field-effect transistor: it has a near-perfect channel for electronic conduction. Now, in transistor configuration, this germanium/silicon nanowire is shown to have properties including high conductance and short switching time delay that are better than state-of-the-art silicon MOSFETs. In a transistor configuration, a new germanium/silicon nanowire has characteristics such as conductance, on-current and switching time delay that are better than those of state-of-the-art silicon metal-oxide-semiconductor field-effect transitors. Semiconducting carbon nanotubes1,2 and nanowires3 are potential alternatives to planar metal-oxide-semiconductor field-effect transistors (MOSFETs)4 owing, for example, to their unique electronic structure and reduced carrier scattering caused by one-dimensional quantum confinement effects1,5. Studies have demonstrated long carrier mean free paths at room temperature in both carbon nanotubes1,6 and Ge/Si core/shell nanowires7. In the case of carbon nanotube FETs, devices have been fabricated that work close to the ballistic limit8. Applications of high-performance carbon nanotube FETs have been hindered, however, by difficulties in producing uniform semiconducting nanotubes, a factor not limiting nanowires, which have been prepared with reproducible electronic properties in high yield as required for large-scale integrated systems3,9,10. Yet whether nanowire field-effect transistors (NWFETs) can indeed outperform their planar counterparts is still unclear4. Here we report studies on Ge/Si core/shell nanowire heterostructures configured as FETs using high-κ dielectrics in a top-gate geometry. The clean one-dimensional hole-gas in the Ge/Si nanowire heterostructures7 and enhanced gate coupling with high-κ dielectrics give high-performance FETs values of the scaled transconductance (3.3 mS µm-1) and on-current (2.1 mA µm-1) that are three to four times greater than state-of-the-art MOSFETs and are the highest obtained on NWFETs. Furthermore, comparison of the intrinsic switching delay, τ = CV/I, which represents a key metric for device applications4,11, shows that the performance of Ge/Si NWFETs is comparable to similar length carbon nanotube FETs and substantially exceeds the length-dependent scaling of planar silicon MOSFETs.
1,454 citations
TL;DR: In this paper, exchange biased magnetic tunnel junction (MTJ) structures are shown to have useful properties for forming magnetic memory storage elements in a novel cross-point architecture, which exhibit very large magnetoresistive (MR) values exceeding 40% at room temperature, with specific resistance values ranging down to as little as ∼60 Ω(μm)2.
Abstract: Exchange biased magnetic tunnel junction (MTJ) structures are shown to have useful properties for forming magnetic memory storage elements in a novel cross-point architecture. MTJ elements have been developed which exhibit very large magnetoresistive (MR) values exceeding 40% at room temperature, with specific resistance values ranging down to as little as ∼60 Ω(μm)2, and with MR values enhanced by moderate thermal treatments. Large MR values are observed in magnetic elements with areas as small as 0.17 (μm)2. The magnetic field dependent current–voltage characteristics of an MTJ element integrated with a silicon diode are analyzed to extract the MR properties of the MTJ element itself.
1,110 citations
TL;DR: In this article, the authors report on the resolution limits of EBL in the conventional polymethylmethacrylate (PMMA) organic resist and show that resolution can be pushed below 10 nm for isolated features and dense arrays of periodic structures can be fabricated at a pitch of 30 nm, leading to a density close to 700 Gbit/in2.
1,017 citations