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Journal ArticleDOI

A 2.4 GHz ZigBee Receiver Exploiting an RF-to-BB-Current-Reuse Blixer + Hybrid Filter Topology in 65 nm CMOS

31 Mar 2014-IEEE Journal of Solid-state Circuits (Springer, Cham)-Vol. 49, Iss: 6, pp 1333-1344
TL;DR: A 2.4 GHz ZigBee receiver unifying a balun-LNA-I/Q-mixer (Blixer) and a baseband (BB) hybrid filter in one cell is fabricated in 65 nm CMOS, and most performance metrics compare favorably with the state-of-the-art.
Abstract: A 2.4 GHz ZigBee receiver unifying a balun-LNA-I/Q-mixer (Blixer) and a baseband (BB) hybrid filter in one cell is fabricated in 65 nm CMOS. Without any external components, wideband input matching and passive pre-gain are concurrently achieved via co-optimizing an integrated low-Q network with a balun-LNA. The latter also features active-gain boosting and partial-noise canceling to enhance the gain and noise figure (NF). Above the balun-LNA are I/Q double-balanced mixers driven by a 4-phase 25% LO for downconversion and gain-phase balancing. The generated BB currents are immediately filtered by an IF-noise-shaping current-mode Biquad and a complex-pole load, offering first-order image rejection and third-order channel selection directly atop the Blixer. Together with other BB and LO circuitries, the receiver measures 8.5 dB NF, 57 dB gain and $-$ 6-dBm IIP3 $_{{\rm out}\mathchar"702D{\rm band}}$ at 1.7 mW power and 0.24 mm $^{2}$ die size. The S $_{11}$ -bandwidth ( ${ 10 dB) covers 2.25 to 3.55 GHz being robust to packaging variations. Most performance metrics compare favorably with the state-of-the-art.
Citations
More filters
Journal ArticleDOI
Haidong Yi1, Wei-Han Yu1, Pui-In Mak1, Jun Yin1, Rui P. Martins1 
TL;DR: This paper describes an ultra-low-voltage Bluetooth low-energy (BLE) receiver (RX) front end with an on-chip micropower manager (PM) to customize the internal voltage domains to direct powering by the sub-0.5-V energy-harvesting sources like the on-body thermoelectric.
Abstract: This paper describes an ultra-low-voltage Bluetooth low-energy (BLE) receiver (RX) front end with an on-chip micropower manager ( $\mu $ PM) to customize the internal voltage domains. It aims at direct powering by the sub-0.5-V energy-harvesting sources like the on-body thermoelectric, eliminating the loss and cost of the interim dc–dc converters. Specifically, the RX incorporates: 1) a two-stage power-gating low-noise amplifier with fully on-chip input-impedance matching and passive gain boosting reducing both the active and sleep power; 2) a class-D voltage-controlled oscillator (VCO) in parallel with a class-C starter to secure a fast startup; and 3) a $\mu $ PM using ring-VCO-locked charge pumps and bandgap references to withstand the supply-voltage variation (0.18–0.3 V). Fabricated in 28-nm CMOS, the RX operates down to a 0.18-V supply, while exhibiting 11.3-dB NF and −12.5-dBm out-of-band IIP3. The VCO shows $\mu \text{W}$ and 1.33 nW, respectively.

54 citations


Cites background or methods from "A 2.4 GHz ZigBee Receiver Exploitin..."

  • ...Although the VCO pulling and noise crosstalk can be prevented by separately powering the current-reuse RX path and LO path [6], the cost and power loss of the extra dc-dc converter are unneglectable....

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  • ...Note that [5]–[6] have not included the loss, power and area of their powermanagement units if using a sub-0....

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Journal ArticleDOI
TL;DR: To address the cost and universality of ultra-low-power (ULP) radios for Internet of Things (IoT) applications, a sub-GHz multi-ISM-band ZigBee receiver is developed, featuring a gain-boosted N-path switched-capacitor network embedded into a function-reuse RF front-end, offering concurrent RF and BB amplification, LO-defined RF filtering, and input impedance matching with zero external components.
Abstract: Internet of Things (IoT) represents a competitive and large market for short-range ultra-low-power (ULP) wireless connectivity [1, 2]. According to [3], by 2020 the IoT market will be close to hundreds of billion dollars (annually ~16 billions). To bring down the hardware cost of such massive inter-connections, sub-GHz ULP wireless products compliant with the existing wireless standard such as the IEEE 802.15.4c/d (ZigBee) will be of great demand, especially for those that can cover all regional ISM bands [e.g., China (433 MHz), Europe (860 MHz), North America (915 MHz) and Japan (960 MHz)]. Together with the obvious goals of small chip area, minimum external components and ultra-low-voltage (ULV) supply (for possible energy harvesting), the design of such a receiver poses significant challenges.

48 citations


Cites background or methods from "A 2.4 GHz ZigBee Receiver Exploitin..."

  • ...band, a fixed LC network (on-chip in [15], [16] and off-chip in [13], [14]) can be employed for input matching and passive pre-gain (save power)....

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  • ...Our previous work [15], [16] was inspired by those facts; it unifies most RF-to-BB functions in one cell for...

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Journal ArticleDOI
TL;DR: To minimize operating power and achieve maximum battery lifetime, the implementation of an ultra-lowpower wireless system requires an integrated design approach that considers many requirements including battery source, active and sleep mode energy requirements, system architectures, and circuit implementations.
Abstract: An ultra-low-power wireless system is one which has to operate for an extended period of time with only a limited power source available, and is typically constrained to a limited size (if size is not a limitation then a larger battery could be used). Clearly the term ?ultra-low-power wireless? covers a broad range of applications which may have different key drivers as illustrated in Figure 1. For a fitness device such as a heart rate monitor, the number one driver is often cost as these are basic consumer products. For a bio-implant such as a smart pacemaker, battery life is critical as battery replacement typically requires surgery. For a smart home system such as automatic climate control, cost and battery life are important but the system also needs to support a relatively large number of devices and the communication range should be large?throughout the whole building. Finally for a gaming application such as a wireless headset, high data rate and very low latency are key, so as not to ruin the high-speed gaming experience.

42 citations


Cites background from "A 2.4 GHz ZigBee Receiver Exploitin..."

  • ...Current reuse reverses this approach and instead of cascading, the circuit blocks are effectively “cascoded” by stacking them on top of each other to share a single bias current [20]–[21]....

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Journal ArticleDOI
TL;DR: Two ultra-low power low noise amplifiers (LNAs) with RF performance exceeding the requirement of the intended application are presented and the feasibility of passive gm boosting for designing an ultra- low supply voltage LNA is investigated.
Abstract: To meet the requirements of wearable wireless sensor networks, the power dissipation of the RF transceiver has to be drastically reduced. This paper presents two ultra-low power low noise amplifiers (LNAs) with RF performance exceeding the requirement of the intended application. In the first LNA, by reusing the current several times and employing passive gm boosting, the LNA input impedance is reduced by a factor of 24 compared with a single transistor using the same current. The feasibility of passive gm boosting for designing an ultra-low supply voltage LNA is also investigated. Limitations of both LNAs, including NF, non-linearity, and stability in a 40-nm CMOS technology are also investigated. The proposed LNAs consume only $30~\mu \text{W}$ of power, operate with 0.8 V and 0.18 V and show NF of 3.3 and 5.2 dB, respectively. Using a widely accepted figure-of-merit for LNAs, the proposed circuit is almost three times better than the best previously reported sub-mW LNA.

38 citations


Cites background from "A 2.4 GHz ZigBee Receiver Exploitin..."

  • ...Stacking several circuit blocks that perform different functions on top of each other [4]–[6] poses several isolation issues that adversely affect the overall performance and prevent true ULP operation....

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Journal ArticleDOI
TL;DR: Several techniques are used to limit the impact of the 1/f noise of the RF blocks on the receiver and to minimize nonlinearities due to interactions between blocks sharing the same current.
Abstract: A 24-GHz receiver for short-range communications with +6 dBm out-of-band IIP3 and only 24-mA battery current is presented The single-ended input is coupled through an integrated transformer to a push–pull differential low-noise transconductance amplifier (LNTA) followed by a current mode passive mixer that drives a single-opamp biquad trans-impedance amplifier This approach ensures sufficient linearity to enable coexistence with large out-of-band interference arising from other on-chip/on-board transceivers An efficient block stacking technique is proposed to minimize the current drawn from a standard 18-V supply The first stages of the two opamps used in the I and Q baseband Rauch filters are placed above and below the LNTA core, thereby sharing its dc current Two active inductors isolate the RF and baseband signal paths Several techniques are used to limit the impact of the 1/f noise of the RF blocks on the receiver and to minimize nonlinearities due to interactions between blocks sharing the same current The entire receive signal path draws 24 mA from a 18-V supply and has a noise figure of 78 dB at 24 GHz and an out-of-band 1-dB compression point of −5 dBm The chip, implemented in 28-nm LP CMOS, occupies an active area of 04 mm2

30 citations


Cites background from "A 2.4 GHz ZigBee Receiver Exploitin..."

  • ...receiver in [43] has improved IIP3, bandwidth, power, and area....

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References
More filters
Journal ArticleDOI
TL;DR: In this article, a feed-forward noise-canceling technique is proposed to cancel the noise and distortion contributions of the matching device, which allows for designing wide-band impedance-matching amplifiers with noise figure (NF) well below 3 dB.
Abstract: Known elementary wide-band amplifiers suffer from a fundamental tradeoff between noise figure (NF) and source impedance matching, which limits the NF to values typically above 3 dB. Global negative feedback can be used to break this tradeoff, however, at the price of potential instability. In contrast, this paper presents a feedforward noise-canceling technique, which allows for simultaneous noise and impedance matching, while canceling the noise and distortion contributions of the matching device. This allows for designing wide-band impedance-matching amplifiers with NF well below 3 dB, without suffering from instability issues. An amplifier realized in 0.25-/spl mu/m standard CMOS shows NF values below 2.4 dB over more than one decade of bandwidth (i.e., 150-2000 MHz) and below 2 dB over more than two octaves (i.e., 250-1100 MHz). Furthermore, the total voltage gain is 13.7 dB, the -3-dB bandwidth is from 2 MHz to 1.6 GHz, the IIP2 is +12 dBm, and the IIP3 is 0 dBm. The LNA drains 14 mA from a 2.5-V supply and the die area is 0.3/spl times/0.25 mm/sup 2/.

749 citations


"A 2.4 GHz ZigBee Receiver Exploitin..." refers background in this paper

  • ...Although this noise-canceling principle has been discussed in [13] for its single-ended LNA, the output balancing was not a concern there....

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Journal ArticleDOI
TL;DR: It is shown that a CS-stage with deep submicron transistors can have high IIP2, because the nugsldr nuds cross-term in a two-dimensional Taylor approximation of the IDS(VGS, VDS) characteristic can cancel the traditionally dominant square-law term in the IDs(V GS) relation at practical gain values.
Abstract: An inductorless low-noise amplifier (LNA) with active balun is proposed for multi-standard radio applications between 100 MHz and 6 GHz. It exploits a combination of a common-gate (CGH) stage and an admittance-scaled common-source (CS) stage with replica biasing to maximize balanced operation, while simultaneously canceling the noise and distortion of the CG-stage. In this way, a noise figure (NF) close to or below 3 dB can be achieved, while good linearity is possible when the CS-stage is carefully optimized. We show that a CS-stage with deep submicron transistors can have high IIP2, because the nugsldr nuds cross-term in a two-dimensional Taylor approximation of the IDS(VGS, VDS) characteristic can cancel the traditionally dominant square-law term in the IDS(VGS) relation at practical gain values. Using standard 65 nm transistors at 1.2 V supply voltage, we realize a balun-LNA with 15 dB gain, NF +20 dBm, while simultaneously achieving an IIP3 > 0 dBm. The best performance of the balun is achieved between 300 MHz to 3.5 GHz with gain and phase errors below 0.3 dB and plusmn2 degrees. The total power consumption is 21 mW, while the active area is only 0.01 mm2.

579 citations


"A 2.4 GHz ZigBee Receiver Exploitin..." refers background in this paper

  • ...The common-gate (CG) common-source (CS) balun-LNA [11] avoids the off-chip balun and achieves a low NF by noise canceling, but the asymmetric CG-CS transconductances and loads make the output balancing not wideband consistent....

    [...]

Journal ArticleDOI
TL;DR: In this article, a powerful phasor-based analysis is used to explain all common image-reject topologies and their limitations, and it is shown how this can replace complex trigonometric equations commonly found in the literature.
Abstract: This paper presents an in-depth treatment of mixers and polyphase filters, and how they are used in rejecting the image in transmitters and receivers. A powerful phasor-based analysis is used to explain all common image-reject topologies and their limitations, and it is shown how this can replace complex trigonometric equations commonly found in the literature. Practical problems in design and layout that limit the performance of image-reject upconversion and downconversion mixers are identified, and solutions are presented or limits explained. This understanding is put to work in a low-IF CMOS wideband, low-IF downconversion circuit, which repeatedly rejects the image by 60 dB over the wide band of 3.5 to 20 MHz without trimming or calibration.

525 citations


"A 2.4 GHz ZigBee Receiver Exploitin..." refers background or methods in this paper

  • ..., the IF), and cover the ratio of maximum to minimum signal frequencies [17], [18]....

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  • ...Similar to [18], this discrepancy is likely due to the LO gain and phase mismatches, and the matching and variations of the RC-CR networks....

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  • ...The selected RC values are guided by [18]...

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  • ...The layout design is similar to [18] that uses dummy to balance the parasitic capacitances....

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Journal ArticleDOI
TL;DR: In this article, an ultra low power 2.4 GHz transceiver targeting wireless sensor network applications is presented, where the receiver front-end is fully passive, utilizing an integrated resonant matching network to achieve voltage gain and interface directly to a passive mixer.
Abstract: An ultra low power 2.4-GHz transceiver targeting wireless sensor network applications is presented. The receiver front-end is fully passive, utilizing an integrated resonant matching network to achieve voltage gain and interface directly to a passive mixer. The receiver achieves a 7-dB noise figure and -7.5-dBm IIP3 while consuming 330 muW from a 400-mV supply. The binary FSK transmitter delivers 300 muW to a balanced 50-Omega load with 30% overall efficiency and 45% power amplifier (PA) efficiency. Performance of the receiver topology is analyzed and simple expressions for the gain and noise figure of both the passive mixer and matching network are derived. An analysis of passive mixer input impedance reveals the potential to reject interferers at the mixer input with characteristics similar to an extremely high-Q parallel LC filter centered at the switching frequency

307 citations

Journal ArticleDOI
20 Nov 2006
TL;DR: A single-chip 2.4-GHz CMOS radio transceiver with integrated baseband processing according to the IEEE 802.15.4 standard is presented and optimization of architecture and circuit design level in order to reduce the transceiver power consumption are described.
Abstract: A single-chip 2.4-GHz CMOS radio transceiver with integrated baseband processing according to the IEEE 802.15.4 standard is presented. The transceiver consumes 14.7 mA in receive mode and 15.7 mA in transmit mode. The receiver uses a low-IF topology for high sensitivity and low power consumption, and achieves -101 dBm sensitivity for 1% packet error rate. The transmitter topology is based on a PLL direct-modulation scheme. Optimizations of architecture and circuit design level in order to reduce the transceiver power consumption are described. Special attention is paid to the RF front-end design which consumes 2.4mA in receive mode and features bidirectional RF pins. The 5.77 mm2 chip is implemented in a standard 0.18-mum CMOS technology. The transmitter delivers +3 dBm into the 100-Omega differential antenna port

229 citations