A 30-GHz Wideband Low-Power CMOS Injection-Locked Frequency Divider for 60-GHz Wireless-LAN
TL;DR: In this paper, a 30 GHz wide locking range (25%) injection-locked frequency divider (ILFD) with small power consumption (1.86 mW) is presented, which achieves a wide locking-range of 6.2 GHz (25 %) without any frequency tuning mechanism.
Abstract: A 30-GHz wide locking-range (25%) injection-locked frequency divider (ILFD) with small power consumption (1.86 mW) is presented. The locking range of the ILFD is extended by reducing the quality factor of resonant tank. Besides, the output power level of second harmonic is lower than that of fundamental component by 37 dBc due to the new output buffer where the second harmonic can be cancelled. The proposed wideband ILFD is implemented in 0.13-mum standard CMOS process. It achieves a wide locking-range of 6.2 GHz (25 %) without any frequency tuning mechanism under the small power consumption of 1.86 mW and the highest figure-of-merit of 12.4 (%/mW) among all reported state-of-the-art CMOS ILFD.
Citations
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TL;DR: In this article, a 54.6 GHz divide-by-3 injection-locked frequency divider with low power consumption is presented, where a resistive feedback is implemented to achieve a stable dc input and higher injection efficiency.
Abstract: A 54.6 GHz divide-by-3 injection locked frequency divider with low power consumption is presented. A resistive feedback is implemented to achieve a stable dc input and higher injection efficiency. Compared with the conventional design, it exhibits a better supply voltage rejection and wider locking range while a small silicon area is maintained. Fabricated in a TSMC 65 nm bulk CMOS process, this divider operates from 48.8 to 54.6 GHz and consumes 3 mW from a 0.9 V supply.
44 citations
Cites background from "A 30-GHz Wideband Low-Power CMOS In..."
...Unlike [3], where a resistor is added serially to the tank to reduce quality factor, the resistor, is in parallel with the tank....
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...Therefore, the choice of quality factor for an must be examined carefully as described in [3]....
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01 Jan 2003
TL;DR: In this article, the authors examined the uses of quality factors for inductors in silicon integrated circuit design, and proposed new methods for estimating quality factors by numerically adding a capacitor in parallel to measured y 11 data of aD inductor, and by computing the frequency stability factor aDd 3-dB bandwidth at the resonant frequency of the resulting network.
Abstract: By examining uses of quality (Q) factors for inductors in silicon integrated circuit design, new methods for estimating quality factors are proposed. These methods extract Q factors by numerically adding a capacitor in parallel to measured y 11 data of aD inductor, and by computing the frequency stability factor aDd 3-dB bandwidth at the resonant frequency of the resulting network. These parameters are then converted to effective quality factors using relationships for simple parallel RLC circuits. By sweeping the numerically added capadtance value, effective quality factors at varying frequencies are computed. These new techniques, in addition to being more relevant for circuit design, provide physically reasonable estimates all the way up to the self-resonant frequencies of inductors. At modente to high frequencies, the commonly used Q definition [-Im( y 11 )/Re( y 11 ) can significantly underestimate and can even give unreasonable results. Data obtained using the new methods suggest that quality factors remain high and integrated indacton remain useful all the way up to their self- resonant frequencies, contrary to the behavior obtained using -Im( y 11 )/Re( y 11 ). These indicate that the commonly used technique can lead to improper use and optimization of integrated inductors.
39 citations
29 May 2009
TL;DR: A multiband multimode injection-locked frequency divider (M-ILFD) is presented that meets the requirements for 38 and 57GHz applications and reduces the circuit size and power consumption, leading to compact systems.
Abstract: The availability of unlicensed mm-wave bands has fueled the research and development of mm-wave wireless systems. If different frequency bands can be operated from one signal source, it will reduce the circuit size and power consumption, leading to compact systems. For example, the frequencies 38, 57, 76GHz in 38, 60 and 77GHz bands can be generated by using only one PLL, as illustrated in Fig. 16.4.1. To address this requirement, in this paper, a multiband multimode injection-locked frequency divider (M-ILFD) is presented that meets the requirements for 38 and 57GHz applications.
28 citations
Cites background from "A 30-GHz Wideband Low-Power CMOS In..."
...83μm thick) so that a wider locking range can be achieved by the lower Q-factor [4] (Q=5 in secondary coil)....
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...A thinner metal is preferred for the secondary-coil (0.83µm thick) so that a wider locking range can be achieved by the lower Q-factor [4] (Q=5 in secondary coil)....
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TL;DR: In this article, a multiband phase-locked loop (PLL) is presented for the first time, which covers 40-, 60-, and 80 GHz bands. But the PLL is clocked by a reference frequency of 78 MHz and its output power is higher than -9.5 dBm.
Abstract: A millimeter-wave multiband phase-locked loop (PLL) is presented for the first time, which covers 40-, 60-, and 80-GHz bands. Three voltage-controlled oscillators corresponding to different frequencies are input to a multiband injection-locked frequency divider and switched on one at a time by a multiplexer as a band selector. The feedback loop embraces the following components: a chain of dividers with a fixed division-modulus of 256, a phase-frequency detector, a charge-pump, and a second-order loop filter. The PLL is clocked by a reference frequency of 78 MHz and its output power is higher than -9.5 dBm. The phase noise is -103 dBc/Hz at an offset frequency of 10 MHz. With a supply voltage of 1.5 V, the entire PLL consumes 114 mW. The chip is implemented in a 90-nm CMOS technology and measures 1.12 mm2.
27 citations
01 Mar 2010
TL;DR: In this article, a wideband 40 GHz divide-by-2 quadrature injection-locked frequency divider (Q-ILFD) is presented as an enabling component for sliding-IF 60 GHz transceivers.
Abstract: This paper presents a wideband 40 GHz divide-by-2 quadrature injection locked frequency divider (Q-ILFD) as an enabling component for sliding-IF 60 GHz transceivers. The design incorporates direct injection topology and input power matching using interconnect inductances to enhance injection efficiency. This results in an excellent input sensitivity and a wide locking range. Fabricated in a 65nm bulk CMOS technology, the divider operates from 30.3 to 44 GHz (37% locking range) while consuming 9mW from a 1.2V supply. The measured phase noise is −131 dBc/Hz at 1-MHz offset whereas the phase error between I-Q outputs is less than 1.44°.
11 citations
References
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TL;DR: A novel fully differential frequency tuning concept is introduced to ease high integration of VCOs with quadrature outputs and leads to a cross-coupled double core LC-VCO as the optimal solution in terms of power consumption.
Abstract: This paper describes the design and optimization of VCOs with quadrature outputs. Systematic design of fully integrated LC-VCOs with a high inductance tank leads to a cross-coupled double core LC-VCO as the optimal solution in terms of power consumption. Furthermore, a novel fully differential frequency tuning concept is introduced to ease high integration. The concepts are verified with a 0.25-/spl mu/m standard CMOS fully integrated quadrature VCO for zero- or low-IF DCS1800, DECT, or GSM receivers. At 2.5-V power supply voltage and a total power dissipation of 20 mW, the quadrature VCO features a worst-case phase noise of -143 dBc/Hz at 3-MHz frequency offset over the tuning range. The oscillator is tuned from 1.71 to 1.99 GHz through a differential nMOS/pMOS varactor input.
454 citations
TL;DR: An injection-locked oscillator topology is presented, based on MOS switches directly coupled to the LC tank of well-known LC oscillators, which features wide locking ranges, a very low input capacitance, and highest frequency capability.
Abstract: An injection-locked oscillator topology is presented, based on MOS switches directly coupled to the LC tank of well-known LC oscillators. The direct injection-locking scheme features wide locking ranges, a very low input capacitance, and highest frequency capability. The direct locking and the tradeoff between power consumption and tank quality factor is verified through three test circuits in 0.13-/spl mu/m standard CMOS, aiming at input frequency ranges of 50, 40, and 15 GHz. The 40- and 50-GHz dividers consume 3 mW with locking ranges of 80 MHz and 1.5 GHz. The 15-GHz divider consumes 23 mW and features a locking range of 2.8 GHz.
298 citations
"A 30-GHz Wideband Low-Power CMOS In..." refers background in this paper
...power millimeter-wave operation [4] with respect to a fixed transistor (cut-off frequency) because its inherent self-oscillation is designed to be only half of input signal frequency....
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...Therefore, in this work the primarily focus is to increase the locking range of a conventional ILFD presented in [4] while keeping its operating frequency high and power consumption low simultaneously....
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...Since the locking range is inversely proportional to the quality factor of the resonant tank [4], a topology for wide locking range ILFD is proposed in Fig....
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TL;DR: In this article, a regenerative divide topology is introduced that employs resonance techniques by means of on-chip spiral inductors to tune out the device capacitances, achieving a frequency range of 2.3 GHz at 40 GHz while consuming 31 mW from a 2.5-V supply.
Abstract: An analysis of regenerative dividers predicts the required phase shift or selectivity for proper operation. A divider topology is introduced that employs resonance techniques by means of on-chip spiral inductors to tune out the device capacitances. Configured as two cascaded /spl divide/2 stages, the circuit achieves a frequency range of 2.3 GHz at 40 GHz while consuming 31 mW from a 2.5-V supply.
251 citations
"A 30-GHz Wideband Low-Power CMOS In..." refers background in this paper
...A 30 GHz low-power wide locking-range CMOS ILFD is proposed and implemented....
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...extend its operation frequency up to 40 GHz [3] but the small...
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...Clearly, a divider with a wide locking-range and low power consumption simultaneously is imperative for millimeter PLLs for the 60 GHz applications with a bandwidth of 7-GHz....
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...I. INTRODUCTION THE unlicensed 7-GHz bandwidth around 60 GHz is nowavailable for high data rate (1 Gb/s) transmission, where high-frequency phase-locked loops (PLLs) are indispensable for these high data rate wireless/wireline applications....
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...Although both Miller and CML dividers have been demonstrated in millimeter wave range (40 GHz), they require high power consumption ( 10 mW)....
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TL;DR: In this article, an injection-locked LC dividers for low-power quadrature generation are discussed, where the authors model the circuits as regenerative frequency dividers, leading to very simple analytical expressions for the locking band, phase deviation from quadratures and phase noise.
Abstract: Injection-locked LC dividers for low-power quadrature generation are discussed in this paper Modeling the circuits as regenerative frequency dividers leads to very simple analytical expressions for the locking band, phase deviation from quadrature and phase noise Maximizing the ratio between the injected and the biasing current is beneficial to all the above parameters whereas reducing the tank quality factor improves locking band and quadrature accuracy, though at the expense of current consumption, for given output amplitude To validate the theory, experiments have been carried on a 018-/spl mu/m CMOS direct conversion IC, embedding an injection-locked quadrature generator, realized for the Universal Mobile Telecommunication System Frequency locking range as large as 24% and phase deviation from quadrature around 08/spl deg/ are measured while each divider consumes 2 mA The phase noise of the quadrature generator is determined by the driving oscillator phase noise because the dividers contribution is easily made negligible up to hundreds of megahertz offset
193 citations
"A 30-GHz Wideband Low-Power CMOS In..." refers background in this paper
...tial for millimeter-wave PLL applications [10], [11] ....
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TL;DR: In this paper, the authors examined uses of quality factors for in- ductors in silicon integrated circuit design, and proposed new methods for estimating quality factors by numerically adding a capacitor in parallel to measured data of an inductor, and by computing the fre- quency stability factor and 3-dB bandwidth at the resonant frequency of the resulting network.
Abstract: By examining uses of quality ( ) factors for in- ductors in silicon integrated circuit design, new methods for estimating quality factors are proposed. These methods extract factors by numerically adding a capacitor in parallel to measured data of an inductor, and by computing the fre- quency stability factor and 3-dB bandwidth at the resonant frequency of the resulting network. These parameters are then converted to effective quality factors using relationships for simple parallel RLC circuits. By sweeping the numerically added capacitance value, effective quality factors at varying frequen- cies are computed. These new techniques, in addition to being more relevant for circuit design, provide physically reasonable estimates all the way up to the self-resonant frequencies of inductors. At moderate to high frequencies, the commonly used definition can significantly underestimate and can even give unreasonable results. Data obtained using the new methods suggest that quality factors remain high and integrated inductors remain useful all the way up to their self- resonant frequencies, contrary to the behavior obtained using . These indicate that the commonly used technique can lead to improper use and optimization of integrated inductors.
149 citations