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Journal ArticleDOI

A 4.1-mW 10-MHz Fourth-Order Source-Follower-Based Continuous-Time Filter With 79-dB DR

Stefano D'Amico, +2 more
- 20 Nov 2006 - 
- Vol. 41, Iss: 12, pp 2713-2719
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TLDR
Due to the intrinsic feedback present in any source-follower, the proposed cell performs larger linearity for smaller Vov(=VGS-VTH).
Abstract
In this paper, a "composite" source-follower is presented. Using a positive-feedback, the structure synthesizes complex poles with a single branch. This allows to realize a single-branch biquadratic cell. Moreover, due to the intrinsic feedback present in any source-follower, the proposed cell performs larger linearity for smaller Vov(=VGS-VTH). This is the opposite of other active filters and allows saving the power otherwise used to increase linearity. A fourth-order prototype satisfy typical WLAN 802.11.a/b/g baseband filter specifications has been realized in a 0.18 mum CMOS at 1.8-V supply. It achieves a 17.5-dBm IIP3 and a -40 dB HD3 for a 600-mVpp_diff input signal amplitude. A 24-muVrms noise gives a DR=79 dB, with 2.25-mA current consumption

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Citations
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Journal ArticleDOI

A CMOS 4.35-mW +22-dBm IIP3 Continuously Tunable Channel Select Filter for WLAN/WiMAX Receivers

TL;DR: A low-power high linearity CMOS Gm-C channel select filter for WLAN/WiMAX receivers in 90-nm CMOS technology is presented and a biquad cell with simple architecture is used to reduce power consumption and improve the linearity of the filter.
Journal ArticleDOI

Attenuation-Predistortion Linearization of CMOS OTAs With Digital Correction of Process Variations in OTA-C Filter Applications

TL;DR: An architectural attenuation-predistortion linearization scheme for a wide range of operational transconductance amplifiers (OTAs) is proposed and demonstrated with a transconductances-capacitor (Gm-C) filter, creating a robust architecture.
Journal ArticleDOI

A 1-V +31 dBm IIP3, Reconfigurable, Continuously Tunable, Power-Adjustable Active-RC LPF

TL;DR: This paper proposes a biquad design methodology and presents a baseband low-pass filter for wireless and wireline applications with reconfigurable frequency response (Chebyshev/Inverse ChebysheV), selectable order, continuously tunable cutoff frequency, and adjustable power consumption.
Journal ArticleDOI

Compact Low-Power Cortical Recording Architecture for Compressive Multichannel Data Acquisition

TL;DR: A new multichannel compressive sensing scheme which exploits the spatial sparsity of the signals recorded from the electrodes of the sensor array is proposed and shows that using this method, the power efficiency is preserved to a great extent while the area overhead is significantly reduced resulting in an improved power-area product.
Journal ArticleDOI

A 33 MHz 70 dB-SNR Super-Source-Follower-Based Low-Pass Analog Filter

TL;DR: A 4th-order low-pass continuous-time analog filter is presented, that is implemented with the cascade of two efficient and compact biquadratic cells, realized using the Super-Source-Follower topology.
References
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Journal ArticleDOI

A CMOS highly linear channel-select filter for 3G multistandard integrated wireless receivers

TL;DR: In this article, a 6-order Butterworth low-pass filter with 14-bit bandwidth tuning range is designed for implementing the baseband channel-select filter in an integrated multistandard wireless receiver.
Journal ArticleDOI

Anti-blocker design techniques for MOSFET-C filters for direct conversion receivers

TL;DR: In this paper, a linearized MOSFET-C low-pass filter with polysilicon resistors was proposed for a baseband channel selection filter for a direct conversion receiver.
Proceedings ArticleDOI

A digitally calibrated 5.15-5.825GHz transceiver for 802.11a wireless LANs in 0.18/spl mu/m CMOS

TL;DR: This transceiver achieves a transmit 1dB output compression point of +15dBm, and the overall receiver noise figure is 5dB, and a power gain range of >45dB/65dB for transmit/receive and a PLL synthesizer frequency range of 4.9 to 5.85GHz is measured.
Journal ArticleDOI

A 70-mW seventh-order filter with 7-50 MHz cutoff frequency and programmable boost and group delay equalization

TL;DR: In this paper, a 7-50 MHz cutoff frequency, amount of boost, and group-delay slope are programmable via 7-b digital-to-analog converters (DACs).
Proceedings ArticleDOI

A 1.2V-21dBm OIP3 4/sup th/-order active-g/sub m/-RC reconfigurable (UMTS/WLAN) filter with on-chip tuning designed with an automatic tool

TL;DR: In this paper, a 4/sup th/order low-pass continuous-time filter for a UMTS/WLAN receiver of a reconfigurable terminal is presented, where a single opamp is used for two poles and its unity gain-bandwidth is comparable to the filter cut-off frequency.
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