A 60-GHz 90-nm CMOS cascode amplifier with interstage matching
26 Dec 2007-pp 88-91
TL;DR: In this paper, a 60 GHz cascode amplifier in a 90 nm technology is described, which uses an interstage matching to increase the gain and to provide a better power match between the common source and the common-gate transistor of the cascode device.
Abstract: The design of a 60 GHz cascode amplifier in a 90 nm technology is described. The amplifier uses an interstage matching to increase the gain and to provide a better power match between the common-source and the common-gate transistor of the cascode device. Both the common-source and the common-gate transistor make use of an optimized round-table layout, which minimizes all terminal resistances and thus improves the mm-wave performance of the nMOS transistors. A record fmax of 300 GHz is achieved for a 40 mum round-table nMOS in 90 nm CMOS. The cascode amplifier achieves a gain of 7.5 dB at 60 GHz with a DC power consumption of only 6.7 mW. When compared to a shared-junction cascode amplifier or a two-stage common-source cascade amplifier, the presented cascode amplifier is favorable in terms of power gain and DC power consumption
Citations
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28 Oct 2010
TL;DR: A fully-integrated FMCW radar system for automotive applications operating at 77 GHz has been proposed, using a fractional- synthesizer as the F MCW generator and millimeter-wave PA and LNA incorporated on chip, providing sufficient gain, bandwidth, and sensitivity.
Abstract: A fully-integrated FMCW radar system for automotive applications operating at 77 GHz has been proposed. Utilizing a fractional- synthesizer as the FMCW generator, the transmitter linearly modulates the carrier frequency across a range of 700 MHz. The receiver together with an external baseband processor detects the distance and relative speed by conducting an FFT-based algorithm. Millimeter-wave PA and LNA are incorporated on chip, providing sufficient gain, bandwidth, and sensitivity. Fabricated in 65-nm CMOS technology, this prototype provides a maximum detectable distance of 106 meters for a mid-size car while consuming 243 mW from a 1.2-V supply.
397 citations
TL;DR: Two novel beamforming techniques for millimeter wave phased array receivers are developed and it is shown that one of the proposed beamforming methods has an excess gain of up to 14 dB when the line of sight link is obstructed by a human.
Abstract: Based on the indoor radio-wave propagation analysis, and the fundamental limits of CMOS technology it is shown that phased array technology is the ultimate solution for the radio and physical layer of the millimeter wave multi-Gb/s wireless networks. A low-cost, single-receiver array architecture with RF phase-shifting is proposed and design, analysis and measurements of its key components are presented. A high-gain, two-stage, low noise amplifier in 90 nm-CMOS technology with more than 20 dB gain over the 60 GHz spectrum is designed. Furthermore, a broadband analog phase shifter with a linear phase and low insertion loss variation is designed, and its measured characteristics are presented. Moreover, two novel beamforming techniques for millimeter wave phased array receivers are developed in this paper. The performance of these methods for line-of-sight and multipath signal propagation conditions is studied. It is shown that one of the proposed beamforming methods has an excess gain of up to 14 dB when the line of sight link is obstructed by a human.
83 citations
TL;DR: In this paper, two fully integrated binary phase-shift keying (BPSK) and quadrature phase shift keying transceivers operating at W-band [carrier frequency = 84 GHz and 87 GHz (QPSK)].
Abstract: This paper presents two fully integrated binary phase-shift keying (BPSK) and quadrature phase-shift keying (QPSK) transceivers operating at W-band [carrier frequency = 84 GHz (BPSK), and 87 GHz (QPSK)]. Including RF front-end, Costas-loop-based carrier and data recovery, and antenna assembly technique, the BPSK transceiver prototype achieves a 2.5-Gb/s data link with BER <; 10-9 while consuming 202 mW (Tx) and 125 mW (Rx) from a 1.2-V supply. The QPSK TRx achieves a 2.5-Gb/s data link with BER <; 10-11 while consuming 212 mW (Tx) and 166 mW (Rx) from a 1.2-V supply. Both cases are measured with link distance of 1 m and antenna gain of 24 dBi.
42 citations
16 Jun 2010
TL;DR: In this article, a fully-integrated 60 GHz transceiver utilizing analog FSK modulation/demodulation to replace baseband processor was demonstrated, employing a discriminator with automatic adjustment and a folded dipole antenna pair (5-dBi gain for each).
Abstract: A fully-integrated 60-GHz transceiver utilizing analog FSK modulation/demodulation to replace baseband processor has been demonstrated. Employing a discriminator with automatic adjustment and a folded dipole antenna pair (5-dBi gain for each), the transceiver achieves > 1Gb/s data transmission over 1 meter with BER < 10−12 while consuming a total power of 500 mW.
27 citations
Patent•
21 Dec 2010
TL;DR: In this article, a voltage regulator is described for generating a regulated voltage from an input voltage, and voltage spike protection circuitry is used to protect the regulator circuitry from voltage spike spikes.
Abstract: Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One apparatus includes a voltage regulator. The voltage regulator includes regulator circuitry for generating a regulated voltage from a first power supply and a second power supply, and voltage spike protection circuitry for voltage-spike-protecting the regulator circuitry, wherein the voltage spike protection circuitry includes a dissipative element and a charge-storage circuit. One method includes a method of generating a regulated voltage. The method includes regulator circuitry generating a regulated voltage from an input voltage, and voltage-spike-protecting the regulator circuitry with voltage spike protection circuitry, wherein the voltage spike protection circuitry includes a dissipative element and a charge-storage circuit.
26 citations
References
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IBM1
TL;DR: An integrated SiGe superheterodyne RX/TX pair capable of Gb/s data rates in the 60GHz band is described and achieves 10% PAE in the final stage.
Abstract: An integrated SiGe superheterodyne RX/TX pair capable of Gb/s data rates in the 60GHz band is described. The 6dB NF RX includes an image-reject LNA, a multistage down-converter with on-chip IF filters, a frequency tripler, a PLL, and baseband outputs. The 10 to 12dBm P1dBTX achieves 10% PAE in the final stage. It includes a PA, image-reject driver, multistage up-converter with on-chip filters, tripler, and PLL
303 citations
13 Sep 2004
TL;DR: In this paper, the viability of digital CMOS as a future mm-wave technology, capable of exploiting the 60GHz band, is explored, and the optimal device design and appropriate mmwave models are presented, from modeling of transistors in 0.13/spl mu/m technology.
Abstract: The viability of digital CMOS as a future mm-wave technology, capable of exploiting the 60GHz band, is explored. Optimal device design and appropriate mm-wave models are presented. From modeling of transistors in 0.13/spl mu/m technology a three cascode-stage amplifier at 1.5 volts would provide 11 dB of gain at 60GHz using 54mW.
134 citations
18 Jun 2007
TL;DR: A customized 90nm device layout yields an extrapolated fmax of 300GHz, incorporated into a low-power 60GHz amplifier consuming 10.5mW, providing 12dB of gain, and an output P1dB of 4dBm.
Abstract: A customized 90nm device layout yields an extrapolated fmax of 300GHz. The device is incorporated into a low-power 60GHz amplifier consuming 10.5mW, providing 12dB of gain, and an output P1dB of 4dBm. An experimental 3-stage 104GHz amplifier has a measured peak gain of 9.3dB. Finally, a Colpitts oscillator at 104GHz delivers up to -5dBm of output power while consuming 6mW.
128 citations