Proceedings ArticleDOI
A clustered manycore processor architecture for embedded and accelerated applications
Benoît Dupont de Dinechin,Renaud Ayrignac,Pierre-Edouard Beaucamps,Patrice Couvert,Benoit Ganne,Pierre Guironnet de Massas,Francois Jacquet,Samuel Jones,Nicolas Morey Chaisemartin,Frederic Riss,Thierry Strudel +10 more
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TLDR
This work demonstrates that the MPPA-256 processor clustered manycore architecture is effective on two different classes of applications: embedded computing, with the implementation of a professional H.264 video encoder that runs in real-time at low power; and high-performance computing,with the acceleration of a financial option pricing application.Abstract:
The Kalray MPPA-256 processor integrates 256 user cores and 32 system cores on a chip with 28nm CMOS technology. Each core implements a 32-bit 5-issue VLIW architecture. These cores are distributed across 16 compute clusters of 16+1 cores, and 4 quad-core I/O subsystems. Each compute cluster and I/O subsystem owns a private address space, while communication and synchronization between them is ensured by data and control Networks-On-Chip (NoC). The MPPA-256 processor is also fitted with a variety of I/O controllers, in particular DDR, PCI, Ethernet, Interlaken and GPIO. We demonstrate that the MPPA-256 processor clustered manycore architecture is effective on two different classes of applications: embedded computing, with the implementation of a professional H.264 video encoder that runs in real-time at low power; and high-performance computing, with the acceleration of a financial option pricing application. In the first case, a cyclostatic dataflow programming environment is utilized, that automates application distribution over the execution resources. In the second case, an explicit parallel programming model based on POSIX processes, threads, and NoC-specific IPC is used.read more
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Proceedings ArticleDOI
TicToc: Time Traveling Optimistic Concurrency Control
TL;DR: TicToc is presented, a new optimistic concurrency control algorithm that avoids the scalability and concurrency bottlenecks of prior T/O schemes and achieves up to 92% better throughput while reducing the abort rate by 3.3x over these previous algorithms.
Journal ArticleDOI
Spatio-spectral classification of hyperspectral images for brain cancer detection during surgical operations
Himar Fabelo,Samuel Ortega,Daniele Ravi,B Ravi Kiran,Coralia Sosa,Diederik Bulters,Gustavo M. Callico,Harry Bulstrode,Adam Szolna,Juan F. Piñeiro,Silvester Kabwama,D. Madroñal,R. Lazcano,Aruma J-O’Shanahan,Sara Bisshopp,María Luisa Martín Hernández,Abelardo Baez,Guang-Zhong Yang,Bogdan Stanciulescu,Ruben Salvador,Eduardo Juarez,Roberto Sarmiento +21 more
TL;DR: This study presents the development of a novel classification method taking into account the spatial and spectral characteristics of the hyperspectral images to help neurosurgeons to accurately determine the tumor boundaries in surgical-time during the resection, avoiding excessive excision of normal tissue or unintentionally leaving residual tumor.
Journal ArticleDOI
An Intraoperative Visualization System Using Hyperspectral Imaging to Aid in Brain Tumor Delineation.
Himar Fabelo,Samuel Ortega,R. Lazcano,D. Madroñal,Gustavo M. Callico,Eduardo Juarez,Ruben Salvador,Diederik Bulters,Harry Bulstrode,Adam Szolna,Juan F. Piñeiro,Coralia Sosa,Aruma J. O’Shanahan,Sara Bisshopp,Maria José Hernández,Jesús Morera,Daniele Ravi,B Ravi Kiran,A. Vega,Abelardo Báez-Quevedo,Guang-Zhong Yang,Bogdan Stanciulescu,Roberto Sarmiento +22 more
TL;DR: In this preliminary study, thematic maps obtained from a validation database of seven hyperspectral images of in vivo brain tissue captured and processed during neurosurgical operations demonstrate that the system is able to discriminate between normal and tumor tissue in the brain.
Journal ArticleDOI
PULP: A Ultra-Low Power Parallel Accelerator for Energy-Efficient and Flexible Embedded Vision
TL;DR: PULP (Parallel processing Ultra-Low Power platform), an architecture built on clusters of tightly-coupled OpenRISC ISA cores, with advanced techniques for fast performance and energy scalability that exploit the capabilities of the STMicroelectronics UTBB FD-SOI 28nm technology is proposed.
Journal ArticleDOI
Mixed-criticality scheduling on cluster-based manycores with shared communication and storage resources
Georgia Giannopoulou,Nikolay Stoimenov,Pengcheng Huang,Lothar Thiele,Benoît Dupont de Dinechin +4 more
TL;DR: A combined analysis of computing, memory and communication scheduling in a mixed-criticality setting is introduced and a considered cluster-based architecture model describes closely state-of-the-art many-core platforms, such as the Kalray MPPA®-256.
References
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