30 Apr 2010-Proceedings of SPIE (International Society for Optics and Photonics)-Vol. 7726, pp 772616
TL;DR: In this paper, a linear array of 128 active pixel sensors has been developed in standard CMOS technology and a Linear Variable Optical Filter (LVOF) is added using CMOS-compatible post-process, resulting in a single chip highly-integrated highresolution microspectrometer.
Abstract: A linear array of 128 Active Pixel Sensors has been developed in standard CMOS technology and a Linear Variable
Optical Filter (LVOF) is added using CMOS-compatible post-process, resulting in a single chip highly-integrated highresolution
microspectrometer. The optical requirements imposed by the LVOF result in photodetectors with small pitch
and large length in the direction normal to the dispersed spectrum (7.2μ;m×300μm). The specific characteristics of the
readout are the small pitch, low optical signals (typically a photocurrent of 100fA~1pA) and a much longer integration
time as compared to regular video (typically 100μs~63s). These characteristics enable a very different trade-off between
SNR and integration time and IC-compatibility. The system discussed in this paper operates in the visible part of the
spectrum. The prototype is fabricated in the AMIS 0.35μm A/D CMOS technology.
Microspectrometers have found application in many fields due to their small size and their low requirement on the sample volume.
A Linear variable Optical Filter (LVOF) combined with a detector array is a suitable principle for the realization of a high-resolution microspectrometer, where the LVOF replaces the traditional grating as a dispersion component.
It is based on the theory of Fabry-Perot interference and the transmitted wavelength of the LVOF varies linearly with the cavity thickness.
Complete LVOF fabrication involves CMOS-compatible deposition of the top and the bottom dielectric mirrors and a tapered layer in between, as shown in Figure 2 [1].
1.2 Photodetection in LVOF Microspectrometers
A high-quality microspectrometer requires a custom-designed imaging system covered by the LVOF.
The spectral resolution of the microspectrometer is primarily determined by the LVOF design, whereas etendue is limited by the optical design and imposes the required detection limit of the detector in terms of minimum optical intensity.
The photodetector array specification in terms of element dimensions and number of elements should be sufficient to cover the resolution by the LVOF.
The taper angle of the LVOF, as published in [2], is sufficient for a spectral resolution of 2nm on the wavelength range between 540nm and 720nm over an LVOF length extending over 1mm.
Thus the imaging system should be capable of low illumination detection.
2. SMART CTIA-APS
A CTIA-APS linear array with 128 elements has been designed and fabricated within this framework, where CTIA is short for Capacitive Transimpedance Amplifier and APS is short for Active Pixel Sensor.
This detector array is designed based the LVOF developed in [2].
The idea is to take advantage of the special optical pattern generated by the LVOF and to implement an IC-compatible photodetection module suitable for operation at low illumination intensities.
2.1 Detector Array
As discussed, the detector should be qualified in three aspects: (1) Small pitches along the filter length for high spatial sampling frequency; (2) Large light-sensitive area, for ensuring maximum sensitivity and SNR; (3) IC compatibility.
The first two problems can be solved by applying a linear array of strip pixels.
The extension of pixel length should compensate for the narrow pixel width.
The nwell-psubstrate junction is selected for photodetection for an optimized responsivity in the visible light range.
2.2 Active Pixel Sensor with CTIA
Image sensors usually apply a junction capacitor as the charge-to-voltage convertor, which is not good for linearity; the popular 3T-APS has its light sensitive areas in proportional with its junction capacitance, which resulted in a limited sensitivity.
The sensitivity can be improved by enlarging the pixel length and by decreasing the integration capacitor; (2) The link between the accumulated charge and the integration capacitor is avoided.
The linearity can be improved by implementing the integration capacitor as a poly-to-poly structure; (3) The amplifier enables the implementation of T-type switches with large off-resistance [7], and thus long integration time.
A two-stage circuit is chosen for large output swing.
2.3 In-pixel CDS
Correlated Double Sampling as the traditional technique for reducing low-frequency noise is also applied here.
The schematic [5] and the timing chart are shown in Figure 5 .
2.4 Variable Integration Time
Two different controls are applied for the photo detection, fixed integration time control and fixed voltage difference control.
Therefore besides the fixed integration time control, the fixed voltage difference control is also introduced to boost both the dynamic range and the signal-to-noise ratio.
The This control principle brings three benefits: (1) There is always a large amount of photons captured, even for low illumination levels.
The photon shot noise will be the dominant noise source, which means a high SNR detection; (2) The control principles can be implemented with digital logic circuits and integrated into each pixel simply.
2.5 Circuit Diagram
The circuit diagram of the readout is shown in Figure 7 (for simplicity the readout of only four pixels is shown).
The standard timing chart of the pixel operation over one cycle is also presented in Figure 8.
3. DEVICE PERFORMANCE
The prototype of this CTIA-APS array is designed and fabricated in standard CMOS technology, AMIS A/D 0.35μm.
The initial tests used a halogen light source.
A DAQ board controlled by a Lab View program is used for data acquisition, signal processing and generating control signals.
The experimental results are to be discussed so as to demonstrate the performance of the device, including photodetectors’ responsivity, leakage current, linearity, temporal noise and the APS operations under both control principles.
3.1 Photodetectors: Spectral Response and Leakage Current
The spectral response of the nwell-psubstrate junction has been tested.
A calibrated photodiode ORIEL 71638 has been used as the reference.
The ripples in the spectral response curve are believed to originate from the SiN layer deposited on the wafer, which causes interference.
The leakage current contributes to the offset and the shot noise during the detection.
Its effect should be estimated in advance.
3.3 Temporal Noise
The temporal noise determines the minimum detectable signal.
The measurement results are listed and discussed below.
Both the reset noise and the flicker noise contributed by the CTIA can be eliminated largely by the correlated double sampling, while the thermal component of the readout noise can be reduced by averaging the multiple readout results.
The noise of around 220μVrms is observed.
This noise is quantified at the output of the CDS circuit in the dark condition, while the reset switch is kept on and the two CDS switches operates according to the standard timing chart for several cycles.
3.4 CTIA-APS operation: Fixed Integration Time Control
Figure 12 shows the basic operation of this 128 CTIA-APS linear array, with half of the pixels illuminated while the rest set in the relatively dark condition.
Their APS outputs are read out one by one sequentially through the multiplexer.
Figure 12 Operation of pixels under Fixed Integration Time Control.
3.5 CTIA-APS operation: Fixed Voltage Difference Control
For the low illumination detection, a long integration time can be applied to ensure enough signal energy.
Under the fixed voltage difference control, the pixel adapts its integration time according to the sensed illumination.
The noise level is constant for all illumination levels, allowing a sensitive detection even for small optical power.
4. SYSTEM CONFIGURATION WITH LVOF
The prototype of this linear CTIA-APS array is fabricated in the AMIS 0.35µ C035M-D/A process.
To form a complete optical micro-system, a linear variable optical filter is fabricated right on top of the photodetection system by IC-compatible reflow [1].
Figure 15 shows the die photo of this microspectrometer.
Therefore by multiplexing the APS in this linear array, the interested spectrum can be scanned.
5. CONCLUSION
In this paper a CMOS APS linear array has been designed specifically for application in an LVOF-based microspectrometer.
A buffered CDS circuit and a complete Capacitive Transimpedance Amplifier are integrated at every pixel to increase the readout speed and to enable the testing using a Fixed Voltage Difference Control.
TL;DR: In this paper, a CMOS compatible P+/Nwell/Psub double junction photodiode pixel was proposed, which can efficiently detect fluorescence from CsI(Tl) scintillation in an X-ray sensor.
Abstract: A CMOS compatible P+/Nwell/Psub double junction photodiode pixel was proposed, which can efficiently detect fluorescence from CsI(Tl) scintillation in an X-ray sensor. Photoelectric and spectral responses of P+/Nwell, Nwell/Psub and P+/Nwell/Psub photodiodes were analyzed and modeled. Simulation results show P+/Nwell/Psub photodiode has larger photocurrent than P+/Nwell photodiode and Nwell/Psub photodiode, and its spectral response is more in accordance with CsI(Tl) fluorescence spectrum. Improved P+/Nwell/Psub photodiode detecting CsI(Tl) fluorescence was designed in CSMC 0.5 μm CMOS process, CTIA (capacitive transimpedance amplifier) architecture was used to readout photocurrent signal. CMOS X-ray sensor IC prototype contains 8 × 8 pixel array and pixel pitch is 100 × 100 μm2. Testing results show the dark current of the improved P+/Nwell/Psub photodiode (6.5 pA) is less than that of P+/Nwell and P+/Nwell/Psub photodiodes (13 pA and 11 pA respectively). The sensitivity of P+/Nwell/Psub photodiode is about 20 pA/lux under white LED. The spectrum response of P+/Nwell/Psub photodiode ranges from 400 nm to 800 nm with a peak at 532 nm, which is in accordance with the fluorescence spectrum of CsI(Tl) in an indirect X-ray sensor. Preliminary testing results show the sensitivity of X-ray sensor IC under Cu target X-ray is about 0.21 Vm2/W or 5097e−/pixel @ 8.05 keV considering the pixel size, integration time and average energy of X-ray photons.
TL;DR: This paper describes a methodology, using a camera simulator and image quality metrics, for determining the optimal pixel size, and it is shown that the optimalpixel size scales with technology, btu at slower rate than the technology itself.
Abstract: Pixel design is a key part of image sensor design. After deciding on pixel architecture, a fundamental tradeoff is made to select pixel size. A small pixel size is desirable because it results in a smaller die size and/or higher spatial resolution; a large pixel size is desirable because it results in higher dynamic range and signal-to-noise ratio. Given these two ways to improve image quality and given a set of process and imaging constraints an optimal pixel size exists. It is difficult, however, to analytically determine the optimal pixel size, because the choice depends on many factors, including the sensor parameters, imaging optics and the human perception of image quality. This paper describes a methodology, using a camera simulator and image quality metrics, for determining the optimal pixel size. The methodology is demonstrated for APS implemented in CMOS processes down to 0.18 (mu) technology. For a typical 0.35 (mu) CMOS technology the optimal pixel size is found to be approximately 6.5 micrometers at fill factor of 30%. It is shown that the optimal pixel size scales with technology, btu at slower rate than the technology itself.
114 citations
"A CMOS 128-APS linear array integra..." refers background in this paper
...The SNR and the dynamic range for the fixed integration time are [8] [9]: DR= max int 10 2 int 20log ( ) leakage...
TL;DR: In this paper, the IC-compatible fabrication of vertically tapered optical layers for use in linear variable optical filters (LVOF) is described, where the taper angle is fully defined by a mask design.
Abstract: This paper reports on the IC-compatible fabrication of vertically tapered optical layers for use in linear variable optical filters (LVOF). The taper angle is fully defined by a mask design. Only one masked lithography step is required for defining strips in a photoresist with trenches etched therein of a density varying along the length of the strip. In a subsequent reflow, this patterned photoresist is planarized, resulting in a strip with a local thickness defined by the initial layer thickness and the trench density at that position before reflow. Hence a taper can be flexibly programmed by the mask design to be from 0.001o to 0.1o, which enables the simultaneous fabrication of tapered layers of different taper angles. The 3D pattern of resist structures is subsequently transferred into Si or SiO2 by appropriate etching. Complete LVOF fabrication involves CMOS-compatible deposition of a lower dielectric mirror using a stack of dielectrics on the wafer, tapered layer formation and deposition of the top dielectric mirror. Design principle, processing and simulation results plus experimental validation of the technique on the profile in the resist and after transfer of the taper into Si and SiO2 are presented.
58 citations
"A CMOS 128-APS linear array integra..." refers background or methods in this paper
...Complete LVOF fabrication involves CMOS-compatible deposition of the top and the bottom dielectric mirrors and a tapered layer in between, as shown in Figure 2 [1]....
[...]
...To form a complete optical micro-system, a linear variable optical filter is fabricated right on top of the photodetection system by IC-compatible reflow [1]....
TL;DR: In this article, a capacitive transimpedance amplifier (CTIA) was developed to operate at 2 K and have good performance as readout circuits of astronomical far-infrared array detectors.
Abstract: We have developed a new capacitive transimpedance amplifier (CTIA) that can be operated at 2 K, and have good performance as readout circuits of astronomical far-infrared array detectors. The circuit design of the present CTIA consists of silicon p-MOSFETs and other passive elements. The process is a standard Bi-CMOS process with 0.5 /spl mu/m design rule. The open-loop gain of the CTIA is more than 300, resulting in good integration performance. The output voltage swing of the CTIA was 270 mV. The power consumption for each CTIA is less than 10 /spl mu/W. The noise at the output showed a 1/f noise spectrum of 4 /spl mu/V//spl radic/Hz at 1 Hz. The performance of this CTIA nearly fulfills the requirements for the far-infrared array detectors onboard ASTRO-F, Japanese infrared astronomical satellite to be launched in 2005.
Q1. What contributions have the authors mentioned in the paper "A cmos 128-aps linear array integrated with a lvof for high- sensitivity and high-resolution micro-spectrophotometry" ?
The system discussed in this paper operates in the visible part of the spectrum.