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A CMOS Readout Circuit for Resistive Transducers Based on Algorithmic Resistance and Power Measurement

TL;DR: In this article, a front-end circuit, integrated in a standard CMOS technology, sets the voltage drop across the transducer, and senses the resulting current via an on-chip reference resistor.
Abstract: This paper reports a readout circuit capable of accurately measuring not only the resistance of a resistive transducer, but also the power dissipated in it, which is a critical parameter in thermal flow sensors or thermal-conductivity sensors. A front-end circuit, integrated in a standard CMOS technology, sets the voltage drop across the transducer, and senses the resulting current via an on-chip reference resistor. The voltages across the transducer and the reference resistor are digitized by a time-multiplexed high-resolution analog-to-digital converter (ADC) and post-processed to calculate resistance and power dissipation. To obtain accurate resistance and power readings, a voltage reference and a temperature-compensated reference resistor are required. An accurate voltage reference is constructed algorithmically, without relying on precision analog signal processing, by using the ADC to successively digitize the base–emitter voltages of an on-chip bipolar transistor biased at several different current levels, and then combining the results to obtain the equivalent of a precision curvature-corrected bandgap reference with a temperature coefficient of 18 ppm/°C, which is close to the state-of-the-art. We show that the same ADC readings can be used to determine die temperature, with an absolute inaccuracy of ±0.25 °C (5 samples, min–max) after a 1-point trim. This information is used to compensate for the temperature dependence of the on-chip polysilicon reference resistor, effectively providing a temperature-compensated resistance reference. With this approach, the resistance and power dissipation of a 100 $\Omega $ transducer have been measured with an inaccuracy of less than $\pm 0.55~\Omega $ and ±0.8%, respectively, from −40 °C to 125 °C.

Summary (3 min read)

Introduction

  • Most integrated readout circuits for resistive transducers only measure resistance, without measuring or stabilizing power dissipation [1, 2, 5, 6].
  • As a result, the previously-reported constant power circuits, based on translinear loops or other feedback loops, still rely on the accuracy of external voltage and current (or resistance) references.
  • Using precision circuit design techniques as well as appropriate calibration and correction schemes, bandgap references can achieve high accuracy over a wide temperature range with low chip-to-chip variations [12-15].

A. Algorithmic resistance and power measurement

  • Measuring resistance and/or power involves both voltage and current measurements.
  • For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.
  • > REPLACE THIS LINE WITH YOUR PAPER IDENTIFICATION NUMBER (DOUBLE-CLICK HERE TO EDIT) < 3.
  • These results depend on the ADC’s reference voltage Vref and on accurate knowledge of the value of Rref.
  • As detailed below, to eliminate the dependence on Vref, the authors algorithmically construct an accurate bandgap voltage reference, by digitizing several base-emitter voltages.

C. Algorithmic temperature measurement

  • Expressions (3) and (11) still depend on Rref, which will generally be subject to process tolerances and temperature drift: Copyright (c) 2017 IEEE.
  • For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.
  • To compensate for the resistor’s temperature drift, information about the die temperature T is needed.
  • Fortunately, this can readily be obtained from the PTAT voltage given by (6): (13) where the relation (9) between Vref and Vbg is again used to obtain an expression independent of Vref.
  • The result only depends on the current ratio p, the bandgap scale factors a1,2, the bandgap voltage Vbg and physical constants k and q.

D. Compensation for BJT non-idealities

  • As mentioned, expression (5) for the base-emitter voltage ignores various non-idealities of the BJT [15].
  • Second, the transistor’s finite current gain causes the collector current to deviate from the bias current, which is applied to the transistor’s emitter.
  • Leakage current and series resistance lead to errors in the bandgap reference and the temperature measurement that cannot be corrected based on a single-temperature calibration [14].
  • The conventional approach to dealing with this is to choose the current level and transistor size such that these errors are sufficiently small.
  • The authors algorithmic approach offers the unique possibility to correct for leakage and series resistance by combining more than two base-emitter voltages digitally.

III. CIRCUIT IMPLEMENTATION

  • The block diagram of the readout circuit is shown in Fig.
  • For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.
  • Since the algorithmic readout relies on the accuracy of the ADC, the non-idealities of the ADC must be taken into account when selecting or designing the ADC.
  • Similarly, CMRR also plays an important role due to the different common-mode voltage levels to be measured.

A. Circuit Implementation of the Transducer Front-End

  • The transducer front-end circuit for resistance and power measurements is shown in Fig.
  • The voltage-to-current converter includes a chopped operational transconductance amplifier (OTA) in a feedback loop.
  • The voltage across the transducer is thus stabilized to Vbias.
  • The added cascode transistor M0b decreases the drain-source voltage of the main transistor M0a, effectively reducing this leakage current.
  • For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.

B. Circuit Implementation of the BJT Front-End

  • The BJT front-end circuit shown in Fig. 8 generates the base-emitter voltages needed for the construction of the voltage reference and temperature sensor.
  • The OTA used in the BJT front-end is the same as the one used in the transducer front-end (as shown in Fig. 7).
  • The amplifier needs to have low offset and high open-loop gain to minimize errors in the bias current [25].
  • This is achieved by applying dynamic element matching (DEM) in the current mirror in Fig.
  • Thus, the mismatch of the current sources is modulated by the DEM clock, and the resulting average current is close to p times the average unit current.

IV. EXPERIMENTAL RESULTS AND DISCUSSION

  • A chip photograph and a plot of the chip layout with the main circuit blocks are shown in Fig. 10.
  • The chip (DUT), mounted on a PCB (PCB1), is placed inside a climate chamber (Vötch VTM 7004) to perform measurements at temperatures ranging from -40°C to 125°C.
  • For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.
  • This is improved to about 24 ppm/°C after compensation for series resistance and leakage using the method described in Section II-D. After compensation for the systematic quadratic curvature, the temperature coefficient is further improved to 18 ppm/°C (Fig. 13(b)).

B. Temperature Measurement

  • Fig. 14 shows the error in the temperature measured using the method described in Section II-C, relative to the reference temperature sensor, for 5 samples of the chip.
  • By applying the algorithmic approach described by (13) and (14), a leakage-free PTAT voltage Vbe,ideal can be obtained, which can then be converted to temperature by linear scaling.
  • These errors are relatively large compared to the state of the art [25], which can be attributed to the large initial errors due to the leakage currents in the multiplexer switches, which can be reduced in a re-design by reducing the transistor sizes.
  • Nevertheless, the accuracy currently obtained is sufficient to Copyright (c) 2017 IEEE.

C. Resistance Measurement

  • As described in II-A, the resistance of the transducer is measured relative to an on-chip reference resistor Rref in series with the transducer (Fig. 6).
  • The error in the measurement of the precision resistor then reduces significantly, as shown in Fig. 15(b).
  • Second, the temperature coefficient Rref is determined by a two-point batch correction (at 27C and 100C) in the calibration result of Fig. 15(a).
  • For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.
  • > REPLACE THIS LINE WITH YOUR PAPER IDENTIFICATION NUMBER (DOUBLE-CLICK HERE TO EDIT) < 9.

D. Power Measurement

  • The power consumption of the transducer was measured using the method described in Section II, eq. (11).
  • As described above, the accuracy of the on-chip reference resistance can be further improved by a room-temperature individual trim and a two-point batch calibration (27°C and 100°C) to find Rref0 and Rref.
  • This reduces the errors in the power dissipation measurement to ±0.8% as shown in Fig. 17(c).

V. CONCLUSIONS

  • The authors have reported a readout architecture for resistive transducers, which is capable of accurately measuring their resistance and power dissipation.
  • The key idea behind the readout architecture is to avoid analog signal processing as much as possible, by first digitizing the analog signals and then combining the results in the digital domain.
  • This algorithmic approach greatly improves the flexibility of the signal processing and facilitates the removal of errors such as leakage current, series resistance, and systematic nonlinearity in the digital domain.
  • In addition, the accuracy of the analog reference voltage of the ADC in this system does not impact the measurement accuracy, as this reference voltage is replaced by the constructed bandgap reference voltage in further data processing.
  • Experimental results have shown that the resistance and power dissipation of a Pt100 resistor can be measured with an inaccuracy of ±0.55 Ω and less than ±0.8% respectively over the military temperature range of -40°C and 125°C, showing the effectiveness of the applied techniques.

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Delft University of Technology
A CMOS Readout Circuit for Resistive Transducers Based on Algorithmic Resistance and
Power Measurement
Cai, Zeyu; Rueda Guerrero, Luis E.; Louwerse, Alexander Mattheus Robert; Suy, Hilco; van Veldhoven,
Robert; Makinwa, Kofi; Pertijs, Michiel
DOI
10.1109/jsen.2017.2764161
Publication date
2017
Document Version
Accepted author manuscript
Published in
IEEE Sensors Journal
Citation (APA)
Cai, Z., Rueda Guerrero, L. E., Louwerse, A. M. R., Suy, H., van Veldhoven, R., Makinwa, K. A. A., &
Pertijs, M. A. P. (2017). A CMOS Readout Circuit for Resistive Transducers Based on Algorithmic
Resistance and Power Measurement. IEEE Sensors Journal, 17(23), 7917-7927.
https://doi.org/10.1109/jsen.2017.2764161
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1
Abstract— This paper reports a readout circuit capable of
accurately measuring not only the resistance of a resistive
transducer, but also the power dissipated in it, which is a critical
parameter in thermal flow sensors or thermal-conductivity
sensors. A front-end circuit, integrated in a standard CMOS
technology, sets the voltage drop across the transducer, and senses
the resulting current via an on-chip reference resistor. The
voltages across the transducer and the reference resistor are
digitized by a time-multiplexed high-resolution analog-to-digital
converter (ADC) and post-processed to calculate resistance and
power dissipation. To obtain accurate resistance and power
readings, a voltage reference and a temperature-compensated
reference resistor are required. An accurate voltage reference is
constructed algorithmically, without relying on precision analog
signal processing, by using the ADC to successively digitize the
base-emitter voltages of an on-chip bipolar transistor biased at
several different current levels, and then combining the results to
obtain the equivalent of a precision curvature-corrected bandgap
reference with a temperature coefficient of 18 ppm/°C, which is
close to the state-of-the-art. We show that the same ADC readings
can be used to determine die temperature, with an absolute
inaccuracy of ±0.25°C (5 samples, min-max) after a 1-point trim.
This information is used to compensate for the temperature
dependence of the on-chip polysilicon reference resistor,
effectively providing a temperature-compensated resistance
reference. With this approach, the resistance and power
dissipation of a 100 transducer have been measured with an
inaccuracy of less than ±0.55 and ±0.8%, respectively, from
–40°C to 125°C.
Index Terms— resistive transducer; bandgap reference;
temperature measurement; power measurement; algorithmic
readout
This work was supported by NXP Semiconductors, The Netherlands, and
ams AG, The Netherlands.
Zeyu Cai is with Delft University of Technology and NXP
Semiconductors, The Netherlands (email: z.cai@nxp.com).
Luis E. Rueda G. is with Universidad Industrial de Santander, Colombia
(email: luis.rueda@correo.uis.edu.co).
Alexander Louwerse, Kofi Makinwa and Michiel Pertijs are with the
Electronic Instrumentation Laboratory, Delft University of Technology, Delft
2628 CD, The Netherlands (e-mail: M.A.P.Pertijs@tudelft.nl).
Hilco Suy is with ams, BL Environmental Sensors, Eindhoven, The
Netherlands.
Robert van Veldhoven is with NXP Semiconductors, Eindhoven, The
Netherlands.
I. INTRODUCTION
ESIS
T
IVE
TRANSDUCERS can be used to measure
various physical parameters, such as temperature, flow,
pressure, gas concentration and gas composition [1-7]. In
many resistive-sensor systems, e.g. thermal sensors or thermal
flow sensors [3, 4, 7], readout of the transducer’s resistance is
not sufficient for an accurate measurement. This is because the
transducer’s power dissipation also needs to be either stabilized
or accurately measured. However, most integrated readout
circuits for resistive transducers only measure resistance,
without measuring or stabilizing power dissipation [1, 2, 5, 6].
Accurate stabilization or measurement of the power
dissipated in a resistive transducer is challenging, because it
relies on a stable power reference, which is typically derived
from a voltage reference and a resistance reference. As a result,
the previously-reported constant power circuits, based on
translinear loops or other feedback loops, still rely on the
accuracy of external voltage and current (or resistance)
references. The stability reported for prior constant-power
circuits in CMOS technology is typically not better than 1%,
and is reported over load variations only, without addressing
temperature dependency [8-10]. For instance, [8] presents a
power control circuit using discrete resistors and monolithic
ICs achieving less than 2.2% power errors. Using translinear
loop in CMOS, [9] reports power errors from 1% to 3%. This
level of stability is insufficient for demanding applications,
such as the readout of thermal-conductivity-based resistive CO
2
sensors [3, 4]. In many applications, the variations of power
dissipation are not only caused by load changes but also by the
variations of ambient temperature due to the temperature
dependence of the resistor. In addition, the system is preferred
to be self-contained, and thus any external voltage, current or
reference references are to be circumvented.
Instead of stabilizing the dissipated power, an alternative is
to directly measure the power dissipation in the transducer
along with its resistance, the impact of which can then be
evaluated in obtaining the final measurement results. However,
to accurately measure power dissipation, an accurate power
reference is still needed, inherently requiring accurate voltage
and resistance references that should be insensitive to process
variations and temperature drift.
In standard CMOS, bandgap voltage references are the
best-in-class voltage references. They combine a voltage that is
proportional to absolute temperature (PTAT) with a voltage
A CMOS Readout Circuit for Resistive
Transducers Based on Algorithmic Resistance
and Power Measurement
Zeyu Cai, Member, IEEE, Luis E. Rueda G., Alexander Louwerse, Hilco Suy, Robert van Veldhoven,
Senior Member, IEEE, Kofi Makinwa, Fellow, IEEE, and Michiel Pertijs, Senior Member, IEEE
R
Copyright (c) 2017 IEEE. Personal use is permitted. For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.
© 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or
future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for
resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

> REPLACE THIS LINE WITH YOUR PAPER IDENTIFICATION NUMBER (DOUBLE-CLICK HERE TO EDIT) <
2
that is complementary to absolute temperature (CTAT), both
generated using the parasitic BJTs available in any CMOS
process, to obtain a temperature-independent reference voltage
[11]. Using precision circuit design techniques as well as
appropriate calibration and correction schemes, bandgap
references can achieve high accuracy over a wide temperature
range with low chip-to-chip variations [12-15]. For instance, in
[14] a temperature dependency of 5-12 ppm/°C over the
temperature range of -40°C to 125°C has been achieved after a
single room-temperature trim that compensates for the process
spread of the BJTs. A key factor limiting the accuracy of most
existing bandgap references are the errors introduced by the
analog circuit that combines the PTAT and CTAT voltages
(e.g., offset and gain errors), since these errors typically cannot
be removed by a single trim [15]. Alternatively, the PTAT and
CTAT voltages can also be combined in the charge domain by a
switched-capacitor integrator, and it has been experimentally
proven that the accuracy of a bandgap voltage thus synthesized
can be very high [16]. In addition, accurate voltage
measurements with algorithmic curvature correction have also
been proposed, resulting in 12-bit accuracy over the
temperature range of -40°C to 125°C [17].
Compared with voltage references, on-chip resistance
references are even more difficult to realize, as resistors in IC
technology are subject to significant process variation and
temperature drift. Especially the latter results in errors which
cannot be easily removed by calibration and trimming.
Polysilicon resistors are relatively stable over temperature, but
still exhibit a temperature dependence typically from ±0.1%/°C
to ±1%/°C [15, 18-20]. Several circuit techniques have been
reported to achieve a near-zero temperature coefficient of
resistance (TCR), which typically involve combining resistors
and/or linear MOSFETs with positive and negative temperature
coefficients [18-20]. However, such combinations will be
process-dependent, typically resulting in a residual temperature
dependence of at least 100 ppm/°C. In consequence, the
accuracy of reported on-chip power references [8-10] is much
lower than that of voltage references [12-15].
Switched-capacitor resistors have been investigated in
literature as a substitute for resistors in systems that require a
stable resistance reference, such as current references [21] or
resistor-based temperature sensors [2]. However, this approach
requires stable capacitors and a stable clock. The latter is
typically an off-chip quartz crystal, since on-chip oscillators
typically exhibit temperature dependences of about 30 ppm/°C
[22, 23], i.e. several times higher than that of the voltage
reference. This makes this solution less attractive from a cost
point of view.
In this paper, we present a circuit capable of accurately
measuring resistance and power dissipation without relying on
off-chip references. It operates algorithmically, by successively
digitizing the voltage drop across the transducer (V
load
), the
voltage drop across an on-chip reference resistor carrying the
same current (V
ref
), and the base-emitter voltages of a single
BJT (V
be
) biased at different current levels, and then processing
the results in the digital domain. The ratio of V
load
and V
ref
provides information about the transducer resistance R
load
relative to the reference resistance R
ref
. Rather than using an
analog bandgap reference circuit, the reference voltage needed
to calculate the power dissipation is obtained by combining the
digitized base-emitter voltages to construct an equivalent
reference voltage in the digital domain. To obtain the
temperature information required to compensate for the
temperature dependence of R
ref
, the same digitized
based-emitter voltages are used to construct an equivalent
PTAT voltage in the digital domain, which, combined with the
reference voltage, provides accurate information about the die
temperature. The precision of the circuit is determined by the
BJT and its bias circuit, and by the linearity and resolution of
the ADC. It is independent of the analog reference voltage of
the ADC, which, as we will show, cancels out. As will be
detailed later in this paper, the main target of this work is to
design a complete measurement system that processes the
signals as much as possible in the digital domain, and thus
circumvents the errors due to analog signal processing.
Experimental results obtained using a CMOS front-end
prototype combined with an off-chip high-resolution ADC
show that the proposed architecture works as expected. The
digitally-constructed temperature sensor achieves an
inaccuracy of ±0.25°C (min-max) across the temperature range
of –40°C to 125°C after a 1-point trim, and the
digitally-constructed bandgap reference achieves a temperature
dependence of 18 ppm/°C, which are both close to the
state-of-the-art. The inaccuracy of power measurements (load
variations and temperature variations across the mentioned
range) is better than ±0.8% after a single-temperature
individual trim. Prior works [8-10] report comparable levels of
accuracy, but do not address temperature variation, and rely on
stable external voltage and/or current references.
The paper is organized as follows. In Section II, details of the
measurement principle are presented. Section III is devoted to
the circuit implementation of the readout circuit. Experimental
results and discussions are presented in Section IV, and the
paper is concluded in Section V.
II. O
PERATING PRINCIPLE
A. Algorithmic resistance and power measurement
Measuring resistance and/or power involves both voltage
and current measurements. As shown in Fig. 1, the transducer
R
load
is biased at a desired voltage V
bias
by an opamp circuit,
while a reference resistor R
ref
is included in the same branch as
the transducer in order to measure the resulting current. The
voltages across the transducer and across the reference resistor
are measured sequentially by a multiplexed precision ADC,
giving two digital outputs:
1
load
ref
V
V
(1)
2
iload
ref
V
V
(2)
where V
ref
is the reference voltage of the ADC. This needs to be
a low-noise voltage that is stable during the measurement, but
does not have to be accurate, as it will eventually be replaced by
an accurate reference voltage constructed in the digital domain,
as will be discussed below.
This is the author's version of an article that has been published in this journal. Changes were made to this version by the publisher prior to publication.
The final version of record is available at http://dx.doi.org/10.1109/JSEN.2017.2764161
Copyright (c) 2017 IEEE. Personal use is permitted. For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.

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3
From these results, the transducer’s resistance and power
dissipation can be calculated:
1
2
load load
load ref ref
load iload
VV
R
RR
IV

(3)
2
12
ref
iload
load load load load
ref ref
V
V
PVI V
RR


(4)
These results depend on the ADC’s reference voltage V
ref
and
on accurate knowledge of the value of R
ref
.
As detailed below,
to eliminate the dependence on V
ref
, we algorithmically
construct an accurate bandgap voltage reference, by digitizing
several base-emitter voltages. We use the temperature
information contained in these base-emitter voltages to
compensate for the temperature dependency of R
ref
.
B. Algorithmic bandgap voltage reference
To obtain an accurate bandgap voltage reference, we use the
same ADC to digitize the base-emitter voltage V
be
of a single
BJT that is successively biased at two different collector
currents I
1
and I
2
¸as shown in Fig. 2:
1,2
1,2
ln
be
S
I
nkT
V
qI



(5)
in which n is the BJT’s non-ideality factor, k is Boltzmann’s
constant, q is the electron charge, T is absolute temperature, and
I
S
is the BJT’s saturation current (I
S
<< I
1,2
) [24]. Note that this
is a simplified expression; the impact of non-idealities of the
BJT will be discussed in Section II-D. These base-emitter
voltages are approximately linear functions of temperature,
with an extrapolated value at 0 K that is equal to the bandgap
voltage of Silicon of about 1.2 V, and a negative temperature
coefficient of about 2 mV/K that depends on the current level,
as illustrated in Fig. 3 [24]. The difference of the two
base-emitter voltages is a PTAT voltage that depends, to first
order, only on the current ratio p = I
1
/ I
2
:

12
ln
be be be
kT
VVV p
q

(6)
In a conventional bandgap reference, a
temperature-independent reference voltage is obtained by
adding a scaled V
be
to V
be
:
11122bg be be be be
VV VaV aV

, (7)
where a
1
= 1 + , a
2
= – , and the optimal coefficient is
subject to tolerances on the BJT’s saturation current and the
bias current, and can be found based on a single-temperature
calibration [15].
Rather than generating a bandgap reference voltage in the
analog domain, we successively digitize V
be1,2
in two additional
conversions, giving:
12
34
,
be be
ref ref
VV
VV


, (8)
These results are then combined digitally to obtain the
equivalent of (7):
13 24bg ref
VVa a

(9)
which allows us to express the (inaccurate) analog reference of
the ADC V
ref
in terms of the (accurate) bandgap reference V
bg
.
Note that the coefficients a
1
and a
2
in (9) can in principle be
defined with arbitrary precision, which is not possible in a
conventional analog implementation.
The voltage drop across the transducer can now be found
independently of V
ref
by combining (1) and (9):
1
13 2 4
load bg
VV
aa

(10)
Similarly, the power dissipated in the transducer can be found
by combining (4) and (9):

2
12
2
13 24
bg
load
ref
V
P
R
aa



(11)
C.
Algorithmic temperature measurement
Expressions (3) and (11) still depend on R
ref
, which will
generally be subject to process tolerances and temperature drift:
Fig. 1. Transducer front-end for resistance and power measurement.
V
bias
V
load
V
iload
R
ref
R
load
MUX ADC
V
load
V
iload
V
ref
µ
1
µ
2
V
dd
V
ss
Fig. 2. BJT front-end for algorithmic voltage measurement.
I
1
I
2
V
be1
V
be2
MUX ADC
V
be1
V
be2
V
ref
µ
3
µ
4
V
dd
V
ss
V
dd
Fig. 3. Temperature dependency of the key voltages for constructing a
bandgap reference.
Temperature C)
V (V)
V
be
V
be
V
PTAT
= α·V
be
V
bg
= V
be +
α·V
be
-273 -55 125 330
0
1.2
This is the author's version of an article that has been published in this journal. Changes were made to this version by the publisher prior to publication.
The final version of record is available at http://dx.doi.org/10.1109/JSEN.2017.2764161
Copyright (c) 2017 IEEE. Personal use is permitted. For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.

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4
00
1
ref ref Rref
RR TT

(12)
where R
ref0
is the value of R
ref
at temperature T
0
and
Rref
is the
resistor’s TCR. The tolerances of R
ref0
can be compensated for
by a single-temperature calibration, which is done by replacing
the transducer by an off-chip precision resistor in the
calibration setup.
To compensate for the resistor’s temperature drift,
information about the die temperature T is needed. Fortunately,
this can readily be obtained from the PTAT voltage given by
(6):




34
34
13 24
ln ln
ln
ref
be
bg
qV
qV
T
kp kp
qV
aakp







(13)
where the relation (9) between V
ref
and V
bg
is again used to
obtain an expression independent of V
ref
. The result only
depends on the current ratio p, the bandgap scale factors a
1,2
,
the bandgap voltage V
bg
and physical constants k and q. The
temperature reading thus obtained is substituted into (12) to
calculate the value of R
ref
so as to obtain a
temperature-compensated resistance and power measurement.
D.
Compensation for BJT non-idealities
As mentioned, expression (5) for the base-emitter voltage
ignores various non-idealities of the BJT [15]. First of all, the
non-linear temperature dependence of I
S
will lead to a (slightly)
non-linear temperature dependence of V
be
, which leads to a
small non-linear temperature dependence of the bandgap
reference voltage, also referred to as curvature [24]. Rather than
applying analog curvature-correction techniques, in our
algorithmic approach, we will use the temperature information
obtained using (13) to correct for this curvature in the digital
domain.
Second, the transistor’s finite current gain causes the
collector current to deviate from the bias current, which is
applied to the transistor’s emitter. We assume the transistor is
operated at current levels at which the current gain is only a
weak function of the current level, so that this effect leads to
small gain error in the bias current that can be compensated for
using an appropriate bias circuit [25], as will be shown in
Section III-B.
Further non-idealities associated with the BJT can be
captured by replacing (5) by
ln
leak
be s
S
pI I
nkT
VpIR
qI




(14)
where the transistor is assumed to be biased at a multiple p of a
bias current I, and in which I
leak
accounts for leakage currents
(including the transistor’s own saturation current), and R
s
accounts for the voltage drop across the BJT’s emitter (series)
resistance, as illustrated in Fig. 4. Leakage current and series
resistance lead to errors in the bandgap reference and the
temperature measurement that cannot be corrected based on a
single-temperature calibration [14]. The conventional approach
to dealing with this is to choose the current level and transistor
size such that these errors are sufficiently small.
Our algorithmic approach offers the unique possibility to
correct for leakage and series resistance by combining more
than two base-emitter voltages digitally. Equation (14) can be
rewritten as:
,,
ln( / )
ln( )
leak S
be be ideal be ideal s
pI I
VV V pIR
p

(15)
where V
be,ideal
and V
be,ideal
are the ideal voltages given by (5)
and (6). From base-emitter voltages measured at a minimum of
four different values of p, V
be,ideal
and V
be,ideal
can be found by
curve fitting to (15). These values can then be used, as before,
to construct the voltage reference and measure temperature,
without errors due to series resistance or leakage current.
III.
CIRCUIT IMPLEMENTATION
The block diagram of the readout circuit is shown in Fig. 5.
The on-chip circuits, including the transducer front-end for
resistance and power measurement, the BJT front-end for the
construction of the algorithmic voltage reference and
temperature sensor, and the multiplexer to select the desired
voltage for measurement, have been designed and fabricated in
a 0.16 µm CMOS technology.
Fig. 4. (a) BJT front-end with series resistance R
s
and leakage current I
leak
;
(b) temperature errors due to I
leak
; (c) temperature errors due to R
s
.
I
1
= I I
2
= p·I
I
leak
V
BE
R
S
0 0.01 0.02 0.03 0.04 0.05
Error [°C]
0
2
4
6
8
10
12
T = 125°C
T = 27°C
T = -40°C
Ɛ = I
leak
/I
V
Rs
=R
s
·I [mV]
0 0.02 0.04 0.06 0.08 0.1
Error [°C]
0
0.5
1
1.5
2
2.5
3
Fig. 5. Block diagram of the entire readout circuit (on-chip and off-chip).
Transducer
front-end
V
be(p)
BJT
front-end
V
load
V
iload
MUX
V
out
1
µ
3
µ
4
ADC
V
ref
µ
1
µ
2
On-chip Off-chip
Shift register
Ctrl
This is the author's version of an article that has been published in this journal. Changes were made to this version by the publisher prior to publication.
The final version of record is available at http://dx.doi.org/10.1109/JSEN.2017.2764161
Copyright (c) 2017 IEEE. Personal use is permitted. For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.

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References
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Journal ArticleDOI
05 Dec 2005
TL;DR: In this paper, a low-cost temperature sensor with on-chip sigma-delta ADC and digital bus interface was realized in a 0.5 /spl mu/m CMOS process.
Abstract: A low-cost temperature sensor with on-chip sigma-delta ADC and digital bus interface was realized in a 0.5 /spl mu/m CMOS process. Substrate PNP transistors are used for temperature sensing and for generating the ADC's reference voltage. To obtain a high initial accuracy in the readout circuitry, chopper amplifiers and dynamic element matching are used. High linearity is obtained by using second-order curvature correction. With these measures, the sensor's temperature error is dominated by spread on the base-emitter voltage of the PNP transistors. This is trimmed after packaging by comparing the sensor's output with the die temperature measured using an extra on-chip calibration transistor. Compared to traditional calibration techniques, this procedure is much faster and therefore reduces production costs. The sensor is accurate to within /spl plusmn/0.5/spl deg/C (3/spl sigma/) from -50/spl deg/C to 120/spl deg/C.

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Journal ArticleDOI
TL;DR: In this article, the authors present various methods of utilizing bipolar transistors and integrated circuits as temperature transducers and compare the accuracy, stability and calibration problems of different transducers compared with each other.

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"A CMOS Readout Circuit for Resistiv..." refers background or methods in this paper

  • ...in which n is the BJT’s non-ideality factor, k is Boltzmann’s constant, q is the electron charge, T is absolute temperature, and IS is the BJT’s saturation current (IS I1,2) [24]....

    [...]

  • ...First of all, the non-linear temperature dependence of IS will lead to a (slightly) non-linear temperature dependence of Vbe, which leads to a small non-linear temperature dependence of the bandgap reference voltage, also referred to as curvature [24]....

    [...]

  • ...2: 1,21,2 lnbe S InkTV q I (5) in which n is the BJT’s non-ideality factor, k is Boltzmann’s constant, q is the electron charge, T is absolute temperature, and IS is the BJT’s saturation current (IS I1,2) [24]....

    [...]

  • ...A PTAT bias generation circuit is used to provide a well-defined bias current that is an integer multiple p of a unit bias current of nominally 6 μA [24]....

    [...]

Book
19 Oct 2006
TL;DR: This work focused on settling Transients from VBE1 ' 0 to VBE2 .
Abstract: Acknowledgment. 1. INTRODUCTION. 1.1 Motivation and Objectives. 1.2 Basic Principles. 1.3 Context of the Research. 1.4 Challenges. 1.5 Organization of the Book. References. 2. CHARACTERISTICS OF BIPOLAR TRANSISTORS. 2.1 Introduction. 2.2 Bipolar Transistor Physics. 2.3 Temperature Characteristics of Bipolar Transistors. 2.4 Bipolar Transistors in Standard CMOS Technology. 2.5 Processing Spread. 2.6 Sensitivity to Mechanical Stress. 2.7 Effect of Series Resistances and Base-Width Modulation. 2.8 Effect of Variations in the Bias Current. 2.9 Conclusions. References. 3. RATIOMETRIC TEMPERATURE MEASUREMENT USING BIPOLAR TRANSISTORS. 3.1 Introduction. 3.2 Generating an Accurate Current-Density Ratio. 3.3 Generating an Accurate Bias Current. 3.4 Trimming. 3.5 Curvature Correction. 3.6 Compensation for Finite Current-Gain. 3.7 Series-Resistance Compensation. 3.8 Conclusions. References. 4. SIGMA-DELTA ANALOG-TO-DIGITAL CONVERSION. 4.1 Introduction. 4.2 Operating Principles of Sigma-Delta ADCs. 4.3 First-Order Sigma-Delta Modulators. 4.4 Second-Order Sigma-Delta Modulators. 4.5 Decimation Filters. 4.6 Filtering of Dynamic Error Signals. 4.7 Conclusions. References. 5. PRECISION CIRCUIT TECHNIQUES. 5.1 Introduction. 5.2 Continuous-Time Circuitry. 5.3 Switched-Capacitor Circuitry. 5.4 Advanced Offset Cancellation Techniques. 5.5 Conclusions. References. 6. CALIBRATION TECHNIQUES. 6.1 Introduction. 6.2 Conventional Calibration Techniques. 6.3 Batch Calibration. 6.4 Calibration based on DVBE Measurement. 6.5 Voltage Reference Calibration. 6.6 Conclusions. References. 7. REALIZATIONS. 7.1 A Batch-Calibrated CMOS Smart Temperature Sensor. 7.2 A CMOS Smart Temperature Sensor with a 3s Inaccuracy of +-0.5 C from -50 C to 120 C. 7.3 A CMOS Smart Temperature Sensor with a 3s Inaccuracy of +-0.1 C from -55 C to 125 C. 7.4 Benchmark. References. 8. CONCLUSIONS. 8.1 Main Findings. 8.2 Other Applications of this Work. 8.3 Future Work. References. Appendices. A Derivation of Mismatch-Related Errors. A.1 Errors in DVBE B Resolution Limits of Sigma-Delta Modulators with a DC Input. B.1 First-Order Modulator. B.2 Second-Order Single-Loop Modulator. References. C Non-Exponential Settling Transients. C.1 Problem Description. C.2 Settling Transients from VBE1 ' 0 to VBE2 . C.3 Settling Transients from VBE1 = 0 to VBE2 . Summary. About the Authors. Index.

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  • ...The difference of the two base-emitter voltages is a PTAT voltage that depends, to first order, only on the current ratio p = I1 / I2: 1 2 lnbe be be kTV V V p q (6) In a conventional bandgap reference, a temperature-independent reference voltage is obtained by adding a scaled Vbe to Vbe: 1 1 1 2 2bg be be be beV V V a V a V , (7) where a1 = 1 + , a2 = – , and the optimal coefficient is subject to tolerances on the BJT’s saturation current and the bias current, and can be found based on a single-temperature calibration [15]....

    [...]

  • ...As mentioned, expression (5) for the base-emitter voltage ignores various non-idealities of the BJT [15]....

    [...]

  • ...It operates algorithmically, by successively digitizing the voltage drop across the transducer (Vload), the voltage drop across an on-chip reference resistor carrying the same current (Vref), and the base-emitter voltages of a single BJT (Vbe) biased at different current levels, and then processing the results in the digital domain....

    [...]

  • ...The BJT front-end circuit shown in Fig....

    [...]

  • ...The OTA used in the BJT front-end is the same as the one used in the transducer front-end (as shown in Fig....

    [...]

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Frequently Asked Questions (1)
Q1. What are the contributions mentioned in the paper "Delft university of technology a cmos readout circuit for resistive transducers based on algorithmic resistance and power measurement" ?

In this paper, the authors proposed a readout architecture for resistive transducers, which is capable of accurately measuring their resistance and power dissipation.