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Proceedings ArticleDOI

A diode-clamped multilevel converter with reduced number of clamping diodes

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TLDR
In this paper, a diode-clamped multilevel converter topology with reduced number of clamping diodes was proposed, which can reduce the number of clamps and the system cost.
Abstract
This paper presents a diode-clamped multilevel converter topology with reduced number of clamping diodes. The novel topology uses a combination of multilevel converter cells with different number of levels. The proposed topology and its switching pattern are discussed based on a five-level converter, and it can be easily extended to N-level converter. Compared with the traditional topology, the proposed topology can significantly reduce the number of clamping diodes and the system cost of the multilevel converter. A detail comparison of the two topologies has been conducted. Simulation and experimental results show the validity of the topology.

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Citations
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Journal ArticleDOI

Topology for multilevel inverters to attain maximum number of levels from given DC sources

TL;DR: In this article, a new multilevel converter topology was introduced, which can synthesise all possible additive and subtractive combinations of input DC levels in the output voltage waveform with fewer power electronic switches.
Journal ArticleDOI

Novel Topologies for Symmetric, Asymmetric, and Cascade Switched-Diode Multilevel Converter With Minimum Number of Power Electronic Components

TL;DR: Novel topologies for symmetric, asymmetric, and cascade switched-diode multilevel converter are proposed, which can produce many levels with minimum number of power electronic switches, gate driver circuits, power diodes, and dc voltage sources.

A multilevel voltage-source converter system with balanced DC voltages

TL;DR: The proposed converter system can solve the voltage unbalance problem of the conventional multilevel voltage-source converters, without using any additional voltage balance circuits or separate voltage sources.
Journal ArticleDOI

Multilevel-Clamped Multilevel Converters (MLC $^2$ )

TL;DR: In this paper, a new series of multilevel (ML) converters based on the ML clamping concept is introduced, where a clamping unit conveys additional levels for synthesizing the output waveforms of a diode-clamped ML dc-ac power converter.
Journal ArticleDOI

A multilevel Voltage Source Inverter (VSI) to maximize the number of levels in output waveform

TL;DR: In this article, a multilevel topology is proposed to obtain all additive and subtractive combinations of input DC levels in the output waveform, though the actual number of levels depends on the DC source arrangement.
References
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A New Neutral-Point-Clamped PWM Inverter

A. Nabae
TL;DR: In this article, a neutral-point-clamped PWM inverter composed of main switching devices which operate as switches for PWM and auxiliary switching devices to clamp the output terminal potential to the neutral point potential has been developed.
Journal ArticleDOI

A New Neutral-Point-Clamped PWM Inverter

TL;DR: The neutral-point-clamped PWM inverter adopting the new PWM technique shows an excellent drive system efficiency, including motor efficiency, and is appropriate for a wide-range variable-speed drive system.
Proceedings ArticleDOI

Multilevel converters-a new breed of power converters

TL;DR: This paper presents three multilevel voltage source converters: (1) diode-clamp, (2) flying-capacitors, and (3) cascaded-inverters with separate DC sources.
Journal ArticleDOI

Multilevel converters for large electric drives

TL;DR: Simulation and experimental results show the superiority of the back-to-back diode-clamped converter over two-level pulsewidth-modulation-based drives.
Proceedings ArticleDOI

A generalized multilevel inverter topology with self voltage balancing

TL;DR: This paper presents a generalized multilevel inverter (converter) topology with self voltage balancing that provides a true multileVEL structure that can balance each DC voltage level automatically without any assistance from other circuits, thus in principle providing a complete and trueMultilevel topology that embraces the existing multilesvel inverters.
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