A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5−x/TaO2−x bilayer structures
TL;DR: This work demonstrates a TaO(x)-based asymmetric passive switching device with which it was able to localize resistance switching and satisfy all aforementioned requirements, and eliminates any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.
Abstract: Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the related memristor have succeeded in surpassing the specifications for a number of device requirements. However, a material or device structure that satisfies high-density, switching-speed, endurance, retention and most importantly power-consumption criteria has yet to be announced. In this work we demonstrate a TaO(x)-based asymmetric passive switching device with which we were able to localize resistance switching and satisfy all aforementioned requirements. In particular, the reduction of switching current drastically reduces power consumption and results in extreme cycling endurances of over 10(12). Along with the 10 ns switching times, this allows for possible applications to the working-memory space as well. Furthermore, by combining two such devices each with an intrinsic Schottky barrier we eliminate any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.
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TL;DR: The performance requirements for computing with memristive devices are examined and how the outstanding challenges could be met are examined.
Abstract: Memristive devices are electrical resistance switches that can retain a state of internal resistance based on the history of applied voltage and current. These devices can store and process information, and offer several key performance characteristics that exceed conventional integrated circuit technology. An important class of memristive devices are two-terminal resistance switches based on ionic motion, which are built from a simple conductor/insulator/conductor thin-film stack. These devices were originally conceived in the late 1960s and recent progress has led to fast, low-energy, high-endurance devices that can be scaled down to less than 10 nm and stacked in three dimensions. However, the underlying device mechanisms remain unclear, which is a significant barrier to their widespread application. Here, we review recent progress in the development and understanding of memristive devices. We also examine the performance requirements for computing with memristive devices and detail how the outstanding challenges could be met.
3,037 citations
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TL;DR: The physical mechanism, material properties, and electrical characteristics of a variety of binary metal-oxide resistive switching random access memory (RRAM) are discussed, with a focus on the use of RRAM for nonvolatile memory application.
Abstract: In this paper, recent progress of binary metal-oxide resistive switching random access memory (RRAM) is reviewed. The physical mechanism, material properties, and electrical characteristics of a variety of binary metal-oxide RRAM are discussed, with a focus on the use of RRAM for nonvolatile memory application. A review of recent development of large-scale RRAM arrays is given. Issues such as uniformity, endurance, retention, multibit operation, and scaling trends are discussed.
2,295 citations
18 Jun 2016
TL;DR: This work proposes a novel PIM architecture, called PRIME, to accelerate NN applications in ReRAM based main memory, and distinguishes itself from prior work on NN acceleration, with significant performance improvement and energy saving.
Abstract: Processing-in-memory (PIM) is a promising solution to address the "memory wall" challenges for future computer systems. Prior proposed PIM architectures put additional computation logic in or near memory. The emerging metal-oxide resistive random access memory (ReRAM) has showed its potential to be used for main memory. Moreover, with its crossbar array structure, ReRAM can perform matrix-vector multiplication efficiently, and has been widely studied to accelerate neural network (NN) applications. In this work, we propose a novel PIM architecture, called PRIME, to accelerate NN applications in ReRAM based main memory. In PRIME, a portion of ReRAM crossbar arrays can be configured as accelerators for NN applications or as normal memory for a larger memory space. We provide microarchitecture and circuit designs to enable the morphable functions with an insignificant area overhead. We also design a software/hardware interface for software developers to implement various NNs on PRIME. Benefiting from both the PIM architecture and the efficiency of using ReRAM for NN computation, PRIME distinguishes itself from prior work on NN acceleration, with significant performance improvement and energy saving. Our experimental results show that, compared with a state-of-the-art neural processing unit design, PRIME improves the performance by ~2360× and the energy consumption by ~895×, across the evaluated machine learning benchmarks.
1,197 citations
Cites background from "A fast, high-endurance and scalable..."
...The reported endurance of ReRAM is up to 10(12) [21], [22], making the lifetime issue of ReRAM-based memory less concerned than PCM based main memory whose endurance has been assumed between 10(6)-10(8) [23]....
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01 Jun 2018
TL;DR: This Review Article examines the development of in-memory computing using resistive switching devices, where the two-terminal structure of the devices, theirresistive switching properties, and direct data processing in the memory can enable area- and energy-efficient computation.
Abstract: Modern computers are based on the von Neumann architecture in which computation and storage are physically separated: data are fetched from the memory unit, shuttled to the processing unit (where computation takes place) and then shuttled back to the memory unit to be stored. The rate at which data can be transferred between the processing unit and the memory unit represents a fundamental limitation of modern computers, known as the memory wall. In-memory computing is an approach that attempts to address this issue by designing systems that compute within the memory, thus eliminating the energy-intensive and time-consuming data movement that plagues current designs. Here we review the development of in-memory computing using resistive switching devices, where the two-terminal structure of the devices, their resistive switching properties, and direct data processing in the memory can enable area- and energy-efficient computation. We examine the different digital, analogue, and stochastic computing schemes that have been proposed, and explore the microscopic physical mechanisms involved. Finally, we discuss the challenges in-memory computing faces, including the required scaling characteristics, in delivering next-generation computing. This Review Article examines the development of in-memory computing using resistive switching devices.
1,193 citations
TL;DR: A comprehensive review of the recent progress in the so-called resistive random access memories (RRAMs) can be found in this article, where a brief introduction is presented to describe the construction and development of RRAMs, their potential for broad applications in the fields of nonvolatile memory, unconventional computing and logic devices, and the focus of research concerning RRAMS over the past decade.
Abstract: This review article attempts to provide a comprehensive review of the recent progress in the so-called resistive random access memories (RRAMs) First, a brief introduction is presented to describe the construction and development of RRAMs, their potential for broad applications in the fields of nonvolatile memory, unconventional computing and logic devices, and the focus of research concerning RRAMs over the past decade Second, both inorganic and organic materials used in RRAMs are summarized, and their respective advantages and shortcomings are discussed Third, the important switching mechanisms are discussed in depth and are classified into ion migration, charge trapping/de-trapping, thermochemical reaction, exclusive mechanisms in inorganics, and exclusive mechanisms in organics Fourth, attention is given to the application of RRAMs for data storage, including their current performance, methods for performance enhancement, sneak-path issue and possible solutions, and demonstrations of 2-D and 3-D crossbar arrays Fifth, prospective applications of RRAMs in unconventional computing, as well as logic devices and multi-functionalization of RRAMs, are comprehensively summarized and thoroughly discussed The present review article ends with a short discussion concerning the challenges and future prospects of the RRAMs
1,129 citations
References
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TL;DR: An overview of the state of the art in ferroelectric thin films is presented in this paper, where the authors review applications: micro-systems' applications, applications in high frequency electronics, and memories based on Ferroelectric materials.
Abstract: An overview of the state of art in ferroelectric thin films is presented. First, we review applications: microsystems' applications, applications in high frequency electronics, and memories based on ferroelectric materials. The second section deals with materials, structure (domains, in particular), and size effects. Properties of thin films that are important for applications are then addressed: polarization reversal and properties related to the reliability of ferroelectric memories, piezoelectric nonlinearity of ferroelectric films which is relevant to microsystems' applications, and permittivity and loss in ferroelectric films-important in all applications and essential in high frequency devices. In the context of properties we also discuss nanoscale probing of ferroelectrics. Finally, we comment on two important emerging topics: multiferroic materials and ferroelectric one-dimensional nanostructures. (c) 2006 American Institute of Physics.
1,632 citations
TL;DR: It is demonstrated that the switching behaviour is an intrinsic feature of naturally occurring dislocations in single crystals of a prototypical ternary oxide, SrTiO3, and to be related to the self-doping capability of the early transition metal oxides.
Abstract: The great variability in the electrical properties of multinary oxide materials, ranging from insulating, through semiconducting to metallic behaviour, has given rise to the idea of modulating the electronic properties on a nanometre scale for high-density electronic memory devices. A particularly promising aspect seems to be the ability of perovskites to provide bistable switching of the conductance between non-metallic and metallic behaviour by the application of an appropriate electric field. Here we demonstrate that the switching behaviour is an intrinsic feature of naturally occurring dislocations in single crystals of a prototypical ternary oxide, SrTiO(3). The phenomenon is shown to originate from local modulations of the oxygen content and to be related to the self-doping capability of the early transition metal oxides. Our results show that extended defects, such as dislocations, can act as bistable nanowires and hold technological promise for terabit memory devices.
1,561 citations
TL;DR: A complementary resistive switch is introduced that consists of two antiserial memristive elements and allows for the construction of large passive crossbar arrays by solving the sneak path problem in combination with a drastic reduction of the power consumption.
Abstract: On the road towards higher memory density and computer performance, a significant improvement in energy efficiency constitutes the dominant goal in future information technology. Passive crossbar arrays of memristive elements were suggested a decade ago as non-volatile random access memories (RAM) and can also be used for reconfigurable logic circuits. As such they represent an interesting alternative to the conventional von Neumann based computer chip architectures. Crossbar architectures hold the promise of a significant reduction in energy consumption because of their ultimate scaling potential and because they allow for a local fusion of logic and memory, thus avoiding energy consumption by data transfer on the chip. However, the expected paradigm change has not yet taken place because the general problem of selecting a designated cell within a passive crossbar array without interference from sneak-path currents through neighbouring cells has not yet been solved satisfactorily. Here we introduce a complementary resistive switch. It consists of two antiserial memristive elements and allows for the construction of large passive crossbar arrays by solving the sneak path problem in combination with a drastic reduction of the power consumption.
1,170 citations
TL;DR: Negative resistance behavior and reproducible resistance switching were found in polycrystalline NiO films deposited by dc magnetron reactive sputtering methods in this paper, where the negative resistance and the switching mechanism could be described by electron conduction related to metallic nickel defect states existing in deep levels and by small polaron hole hopping conduction.
Abstract: Negative resistance behavior and reproducible resistance switching were found in polycrystalline NiO films deposited by dc magnetron reactive sputtering methods. Oxygen to argon gas ratio during deposition was critical in deciding the detailed switching characteristics of either bi-stable memory switching or mono-stable threshold switching. Both metallic nickel defects and nickel vacancies influenced the negative resistance and the switching characteristics. We obtained a distribution of low resistance values which were dependent on the compliance current of high-to-low resistance switching. At 200°C, the low-resistance state kept its initial resistance value while the high-resistance state reached 85% of its initial resistance value after 5×105s. We suggested that the negative resistance and the switching mechanism could be described by electron conduction related to metallic nickel defect states existing in deep levels and by small-polaron hole hopping conduction.
960 citations
TL;DR: The results indicate that the hybrid organic/inorganic memory device is a reliable means for achieving rapid, large-scale archival data storage for ultralow-cost permanent storage of digital images, eliminating the need for slow, bulky and expensive mechanical drives used in conventional magnetic and optical memories.
Abstract: Organic devices promise to revolutionize the extent of, and access to, electronics by providing extremely inexpensive, lightweight and capable ubiquitous components that are printed onto plastic, glass or metal foils1,2,3. One key component of an electronic circuit that has thus far received surprisingly little attention is an organic electronic memory. Here we report an architecture for a write-once read-many-times (WORM) memory, based on the hybrid integration of an electrochromic polymer with a thin-film silicon diode deposited onto a flexible metal foil substrate. WORM memories are desirable for ultralow-cost permanent storage of digital images, eliminating the need for slow, bulky and expensive mechanical drives used in conventional magnetic and optical memories. Our results indicate that the hybrid organic/inorganic memory device is a reliable means for achieving rapid, large-scale archival data storage. The WORM memory pixel exploits a mechanism of current-controlled, thermally activated un-doping of a two-component electrochromic conducting polymer.
731 citations