A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5−x/TaO2−x bilayer structures
TL;DR: This work demonstrates a TaO(x)-based asymmetric passive switching device with which it was able to localize resistance switching and satisfy all aforementioned requirements, and eliminates any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.
Abstract: Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the related memristor have succeeded in surpassing the specifications for a number of device requirements. However, a material or device structure that satisfies high-density, switching-speed, endurance, retention and most importantly power-consumption criteria has yet to be announced. In this work we demonstrate a TaO(x)-based asymmetric passive switching device with which we were able to localize resistance switching and satisfy all aforementioned requirements. In particular, the reduction of switching current drastically reduces power consumption and results in extreme cycling endurances of over 10(12). Along with the 10 ns switching times, this allows for possible applications to the working-memory space as well. Furthermore, by combining two such devices each with an intrinsic Schottky barrier we eliminate any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.
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TL;DR: The performance requirements for computing with memristive devices are examined and how the outstanding challenges could be met are examined.
Abstract: Memristive devices are electrical resistance switches that can retain a state of internal resistance based on the history of applied voltage and current. These devices can store and process information, and offer several key performance characteristics that exceed conventional integrated circuit technology. An important class of memristive devices are two-terminal resistance switches based on ionic motion, which are built from a simple conductor/insulator/conductor thin-film stack. These devices were originally conceived in the late 1960s and recent progress has led to fast, low-energy, high-endurance devices that can be scaled down to less than 10 nm and stacked in three dimensions. However, the underlying device mechanisms remain unclear, which is a significant barrier to their widespread application. Here, we review recent progress in the development and understanding of memristive devices. We also examine the performance requirements for computing with memristive devices and detail how the outstanding challenges could be met.
3,037 citations
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TL;DR: The physical mechanism, material properties, and electrical characteristics of a variety of binary metal-oxide resistive switching random access memory (RRAM) are discussed, with a focus on the use of RRAM for nonvolatile memory application.
Abstract: In this paper, recent progress of binary metal-oxide resistive switching random access memory (RRAM) is reviewed. The physical mechanism, material properties, and electrical characteristics of a variety of binary metal-oxide RRAM are discussed, with a focus on the use of RRAM for nonvolatile memory application. A review of recent development of large-scale RRAM arrays is given. Issues such as uniformity, endurance, retention, multibit operation, and scaling trends are discussed.
2,295 citations
18 Jun 2016
TL;DR: This work proposes a novel PIM architecture, called PRIME, to accelerate NN applications in ReRAM based main memory, and distinguishes itself from prior work on NN acceleration, with significant performance improvement and energy saving.
Abstract: Processing-in-memory (PIM) is a promising solution to address the "memory wall" challenges for future computer systems. Prior proposed PIM architectures put additional computation logic in or near memory. The emerging metal-oxide resistive random access memory (ReRAM) has showed its potential to be used for main memory. Moreover, with its crossbar array structure, ReRAM can perform matrix-vector multiplication efficiently, and has been widely studied to accelerate neural network (NN) applications. In this work, we propose a novel PIM architecture, called PRIME, to accelerate NN applications in ReRAM based main memory. In PRIME, a portion of ReRAM crossbar arrays can be configured as accelerators for NN applications or as normal memory for a larger memory space. We provide microarchitecture and circuit designs to enable the morphable functions with an insignificant area overhead. We also design a software/hardware interface for software developers to implement various NNs on PRIME. Benefiting from both the PIM architecture and the efficiency of using ReRAM for NN computation, PRIME distinguishes itself from prior work on NN acceleration, with significant performance improvement and energy saving. Our experimental results show that, compared with a state-of-the-art neural processing unit design, PRIME improves the performance by ~2360× and the energy consumption by ~895×, across the evaluated machine learning benchmarks.
1,197 citations
Cites background from "A fast, high-endurance and scalable..."
...The reported endurance of ReRAM is up to 10(12) [21], [22], making the lifetime issue of ReRAM-based memory less concerned than PCM based main memory whose endurance has been assumed between 10(6)-10(8) [23]....
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01 Jun 2018
TL;DR: This Review Article examines the development of in-memory computing using resistive switching devices, where the two-terminal structure of the devices, theirresistive switching properties, and direct data processing in the memory can enable area- and energy-efficient computation.
Abstract: Modern computers are based on the von Neumann architecture in which computation and storage are physically separated: data are fetched from the memory unit, shuttled to the processing unit (where computation takes place) and then shuttled back to the memory unit to be stored. The rate at which data can be transferred between the processing unit and the memory unit represents a fundamental limitation of modern computers, known as the memory wall. In-memory computing is an approach that attempts to address this issue by designing systems that compute within the memory, thus eliminating the energy-intensive and time-consuming data movement that plagues current designs. Here we review the development of in-memory computing using resistive switching devices, where the two-terminal structure of the devices, their resistive switching properties, and direct data processing in the memory can enable area- and energy-efficient computation. We examine the different digital, analogue, and stochastic computing schemes that have been proposed, and explore the microscopic physical mechanisms involved. Finally, we discuss the challenges in-memory computing faces, including the required scaling characteristics, in delivering next-generation computing. This Review Article examines the development of in-memory computing using resistive switching devices.
1,193 citations
TL;DR: A comprehensive review of the recent progress in the so-called resistive random access memories (RRAMs) can be found in this article, where a brief introduction is presented to describe the construction and development of RRAMs, their potential for broad applications in the fields of nonvolatile memory, unconventional computing and logic devices, and the focus of research concerning RRAMS over the past decade.
Abstract: This review article attempts to provide a comprehensive review of the recent progress in the so-called resistive random access memories (RRAMs) First, a brief introduction is presented to describe the construction and development of RRAMs, their potential for broad applications in the fields of nonvolatile memory, unconventional computing and logic devices, and the focus of research concerning RRAMs over the past decade Second, both inorganic and organic materials used in RRAMs are summarized, and their respective advantages and shortcomings are discussed Third, the important switching mechanisms are discussed in depth and are classified into ion migration, charge trapping/de-trapping, thermochemical reaction, exclusive mechanisms in inorganics, and exclusive mechanisms in organics Fourth, attention is given to the application of RRAMs for data storage, including their current performance, methods for performance enhancement, sneak-path issue and possible solutions, and demonstrations of 2-D and 3-D crossbar arrays Fifth, prospective applications of RRAMs in unconventional computing, as well as logic devices and multi-functionalization of RRAMs, are comprehensively summarized and thoroughly discussed The present review article ends with a short discussion concerning the challenges and future prospects of the RRAMs
1,129 citations
References
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TL;DR: In this paper, a low-temperature grown oxide diode, Pt/p-NiOx/n-TiOx/Pt, is applied as a switch element for high-density, nonvolatile memories.
Abstract: A one-bit cell of a general nonvolatile memory consists of a memory element and a switch element. Several memory elements have been tried given that any bistable states, that is, two charging states, two spin states, or two resistance states, can be used for a memory element. On the other hand, silicon-based transistors have been the most popularly used switch element. However, silicon-based transistors do not conform to high-density, nonvolatile memories with three-dimensional (3D) stack structures due to their high processing temperatures and the difficulty of growing high-quality epitaxial silicon over metals. Here, we show a low-temperaturegrown oxide diode, Pt/p-NiOx/n-TiOx/Pt, applied as a switch element for high-density, nonvolatile memories. The diode exhibits good rectifying characteristics at room temperature: a rectifying ratio of 10 at ± 3 V, a forward current density of up to ∼ 5×10 A cm, an ideality factor of 4.3, and a turn-on voltage of 2 V. Furthermore, we verify its ability to allow and deny access to the Pt/NiO/Pt memory element with two stable resistance states. Under the forward-bias condition, we could access the memory element and change the resistance state, although access was denied under the reverse bias condition. This one-diode/one-resistor (1D/1R) structure could be a promising building block for high-density, nonvolatile random-access memories with 3D stack structures. A p–n diode, like a transistor, is a fundamental circuit element for thin-film electronics. Until now, epitaxial silicon was most frequently used to fabricate p–n diodes in electronic devices with planar structures. However, to increase device density further, we require p–n diodes that are applicable to devices with 3D stack structures. Epitaxial silicon-based p–n diodes cannot be fabricated with stack structures as it is difficult to grow on a metal layer and high processing temperatures are required. On the other hand, although amorphous silicon allows for lower processing temperatures, it does not provide the required semiconducting performance. Therefore, to realize high-density electronic devices with 3D stack structures, we need new p–n diodes composed of semiconducting materials with low processing temperatures and high performance. In particular, new p–n diodes with low processing temperatures and high performance are indispensable to high-density, nonvolatile random-access memory devices. By replacing a transistor with a simpler diode as a switch element, there exists the possibility of producing memory cells with cross-point structures composed of bit lines and word lines perpendicular to each other, with a memory element lying between them. Theoretically, by utilizing this cross-point structure, the cell size can be scaled down to 4F (F: feature size used for patterning the cell), which is the smallest cell size attainable in nonvolatile memories with planar structures. Furthermore, by fabricating 3D stacks of the cross-point structure, the effective cell size can be scaled down to 2F, 1F, and so on. A common issue in realizing a cross-point structure is the availability of a thin-film diode with the high rectifying ratio and current density required for the switch element to access the memory element. Oxide based p–n diodes are good candidates to provide solutions to the issues associated with Si-based diodes. Most oxides, such as TiO2, [4] ZrO2, [5] ZnO, and indium tin oxide (ITO), are well-known n-type semiconductors that are characterized by the electron-transport properties of oxygen vacancies. As NiOx is a well-known p-type semiconductor beC O M M U N IC A IO N
237 citations
TL;DR: In this paper, the influence of the Pt top-electrode thickness and of the chamber atmosphere during cell operation on the resistive switching of TiN\HfO2\Pt cells was studied.
Abstract: In this letter, we study the influence of the Pt top-electrode thickness and of the chamber atmosphere during cell operation on the resistive switching of TiN\HfO2\Pt cells. The oxygen permeability of the Pt electrode directly in contact with the atmosphere significantly affects the resistive switching and the resistance states of the cell. The results provide strong experimental indications that the electroforming operation leads to oxygen-vacancy formation and that the subsequent reset operation relies on the available oxygen species in the filament neighborhood. Significant implications with respect to endurance and retention assessment of resistive-switching memory devices are discussed.
217 citations
TL;DR: In this paper, the surface oxidized layer of a TiN barrier metal thin film grown on a Pt electrode was used as a resistive switching material and the fabricated memory cell showed bipolar resistive switches on a nanosecond order.
Abstract: The surface oxidized layer of a TiN barrier metal thin film grown on a Pt electrode was used as a resistive switching material. The fabricated memory cell shows bipolar resistive switching on a nanosecond order. A TiO2 anatase layer of about 2.5nm thick on TiN thin film was characterized by high-resolution scanning transmission electron microscopy. The results suggested that the high-speed resistive change was derived from the Mott transition in the TiO2 anatase nanolayer, and the obtained results could relate to the formation of filament paths previously reported in binary transition metal oxide thin films exhibiting resistive switching.
214 citations
TL;DR: In this paper, the authors demonstrate that both a low resistance state and a high resistance state can be written by bipolar voltage application in a local region of NiO/Pt films by using conducting atomic force microscopy.
Abstract: We demonstrate that both a low resistance state and a high resistance state can be written by bipolar voltage application in a local region of NiO/Pt films by using conducting atomic force microscopy. To investigate how oxygen played a role in the resistance switching phenomenon, a local writing process in O18 tracer gas atmosphere was carried out and the composition change was examined by time-of-flight secondary ion mass spectroscopy. As a result, it was revealed that oxygen moves to the anode side, and the composition of the NiO surface might change thereby causing the change in resistance.
179 citations
TL;DR: In this paper, a model which describes the bipolar resistive switching in transition-metal oxides is presented, which simultaneously predicts three key features of experimental measurements: the rectifying behavior in high resistance states, abrupt switching, and the existence of bistable resistance states.
Abstract: A model which describes the bipolar resistive switching in transition-metal oxides is presented. To simulate the effect of switching, we modeled results of doping by oxygen vacancies along with variable Schottky barrier and resistor. The model simultaneously predicts three key features of experimental measurements: the rectifying behavior in high resistance states, abrupt switching, and the existence of bistable resistance states. Our model is based on modulation of Schottky barrier formed by variable resistance oxide layer at the metal-oxide interface. Experimental measurements of the $\text{Pt}/{\text{Ta}}_{2}{\text{O}}_{5}/{\text{TaO}}_{x}/\text{Pt}$ structure matched very well with our nonvolatile resistive switching model.
175 citations