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Journal ArticleDOI

A Hierarchical Technique for Statistical Path Selection and Criticality Computation

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TLDR
This article proposes a hierarchical technique that directly gives all paths above a global criticality threshold and shows that thecriticality of a group at each level of hierarchy can be computed using criticality of the parent group and the local complementary delay within the group.
Abstract
Due to process variations, every path in the circuit is associated with a probability of being critical and a measure of this probability is the criticality of the path. Identification of critical paths usually proceeds in two steps, namely, generation of a candidate path set followed by computation of path criticality. As criticality computation is expensive, the candidate path set is chosen using simpler metrics. However, these metrics are not directly related to path criticality and, often, the set also contains low criticality paths that do not need to be tested. In this article, we propose a hierarchical technique that directly gives all paths above a global criticality threshold. The circuit is divided into disjoint groups at various levels. We show that the criticality of a group at each level of hierarchy can be computed using criticality of the parent group and the local complementary delay within the group. Low criticality groups are pruned at every level, making the computation efficient. This recursive partitioning and group criticality computation is continued until the group criticality falls below a threshold. Beyond this, the path selection within the group is done using branch-and-bound algorithm with global criticality as the metric. This is possible, since our method for criticality computation is very efficient. Unlike other techniques, path selection and criticality computation are integrated together so that when the path selection is complete, path criticality is also obtained. The proposed algorithm is tested with ISCAS’85, ISCAS’89, and ITC’99 benchmark circuits and the results are verified using Monte Carlo simulation. The experimental results suggest that the proposed method gives better accuracy on average with around 90% reduction in run-time.

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Citations
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Journal ArticleDOI

Potential Critical Path Selection Based on a Time-Varying Statistical Timing Analysis Framework

TL;DR: This paper proposes a framework for time-varying statistical static timing analysis (TV-SSTA), wherein the circuit delay is obtained as a collection of time- varying canonicals with breakpoints in time which define the end of validity of one and the start of the next canonical.
References
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The Greatest of a Finite Set of Random Variables

TL;DR: In this article, the authors present formulas and tables that permit approximations to the moments in case n > 2, where the moments are approximated by iteration of a three-parameter computation or, alternatively, through successive use of the threeparameter table, which is given.
Journal ArticleDOI

First-Order Incremental Block-Based Statistical Timing Analysis

TL;DR: A canonical first-order delay model that takes into account both correlated and independent randomness is proposed, and the first incremental statistical timer in the literature is reported, suitable for use in the inner loop of physical synthesis or other optimization programs.
Journal ArticleDOI

Statistical timing analysis under spatial correlations

TL;DR: An efficient statistical timing analysis algorithm that predicts the probability distribution of the circuit delay considering both inter-die and intra- die variations, while accounting for the effects of spatial correlations of intra-die parameter variations, is presented.
Proceedings ArticleDOI

Criticality computation in parameterized statistical timing

TL;DR: A novel algorithm to compute the criticality probability of every edge in the timing graph of a design with linear complexity in the circuit size, and it is shown that for large industrial designs with 442,000 gates, the algorithm computes all edge criticalities in less than 160 seconds.
Journal ArticleDOI

Statistical Path Selection for At-Speed Test

TL;DR: An integrated at-speed structural testing methodology is proposed, and a novel branch-and-bound algorithm is developed that elegantly and efficiently solves the hitherto open problem of statistical path tracing.
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