A Low-Power Wideband Reconfigurable Integrated Active-RC Filter With 73 dB SFDR
TL;DR: A low-power, highly linear, integrated, active-RC filter exhibiting a reconfigurable transfer function (Chebyshev, Elliptic) and bandwidth and a digital automatic tuning scheme to account for process and temperature variations is presented.
Abstract: In this paper, a low-power, highly linear, integrated, active-RC filter exhibiting a reconfigurable transfer function (Chebyshev, Elliptic) and bandwidth (5 MHz, 10 MHz), is presented. The filter exploits digitally-controlled polysilicon resistor banks and a digital automatic tuning scheme to account for process and temperature variations. The operational amplifiers used are based on a new compensation technique that allows optimized high-frequency filter performance and minimized current consumption. A filter prototype has been fabricated in a 0.12-mum CMOS process, occupies 0.25 mm2 (tuning circuit included), and achieves an IIP3 of approximately +20 dBm, whereas its spurious free dynamic range (SFDR) reaches 73 dB. The dissipation of the filter core and the tuning circuit is 4.6 mW and 1.5 mW, respectively
Citations
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TL;DR: A low-power high linearity CMOS Gm-C channel select filter for WLAN/WiMAX receivers in 90-nm CMOS technology is presented and a biquad cell with simple architecture is used to reduce power consumption and improve the linearity of the filter.
Abstract: A low-power high linearity CMOS Gm-C channel select filter for WLAN/WiMAX receivers in 90-nm CMOS technology is presented. To reduce power consumption a biquad cell with simple architecture is used. A simple but efficient technique is also proposed to improve the linearity of the filter without increasing its power consumption. Coarse and fine tuning techniques are used to tune the cutoff frequency of the sixth-order Butterworth low-pass filter from 8.1 MHz to 13.5 MHz suitable for WLAN and WiMAX applications. The measurement results show an in-band IIP3 of + 22 dBm, an HD3 better than - 40 dB at 470 mVP input signal amplitude, and an input referred noise of 75 nV/√Hz at a power consumption of 4.35 mW from a 1-V supply. The differential filter occupies a chip area of 0.239 mm2 excluding pads.
98 citations
TL;DR: This paper proposes a biquad design methodology and presents a baseband low-pass filter for wireless and wireline applications with reconfigurable frequency response (Chebyshev/Inverse ChebysheV), selectable order, continuously tunable cutoff frequency, and adjustable power consumption.
Abstract: This paper proposes a biquad design methodology and presents a baseband low-pass filter for wireless and wireline applications with reconfigurable frequency response (Chebyshev/Inverse Chebyshev), selectable order (1st/3rd/5th), continuously tunable cutoff frequency (1-20 MHz), and adjustable power consumption (3-7.5 mW). A discrete capacitor array coarsely tunes the low-pass filter, and a novel continuous impedance multiplier (CIM) then finely tunes the filter. Resistive/capacitive networks select between the Chebyshev and inverse Chebyshev approximation types. Also, a new stability metric for biquads, minimum acceptable phase margin (MAPM), is presented and discussed in the context of filter compensation and passband ripple considerations. Experimental results yield an IIP3 of 31.3 dBm, a THD of -40 dB at 447 mVpk, diff input signal amplitude, and a DR of 71.4 dB. The filter's tunable range covers frequencies from 1 MHz to 20 MHz. In Inverse Chebyshev mode, the filter achieves a passband group delay variation less than plusmn2.5%. The design is fabricated in 0.13 mum CMOS, occupies 1.53 mm2 , and operates from a 1-V supply.
85 citations
Cites background from "A Low-Power Wideband Reconfigurable..."
...Some such filters have narrow frequency ranges [8], [9], with a few others providing wider but solely discrete ranges [4], [10], [11]....
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TL;DR: In this paper, the effect of noise correlation on eigenvalue-based spectrum sensing (SS) is analyzed under both the noise-only and signal-plus-noise hypotheses.
Abstract: Herein, we present a detailed analysis of an eigenvalue-based sensing technique in the presence of correlated noise in the context of a cognitive radio (CR). We use standard-condition-number (SCN)-based decision statistics based on asymptotic random matrix theory (RMT) for the decision process. First, the effect of noise correlation on eigenvalue-based spectrum sensing (SS) is analytically studied under both the noise-only and signal-plus-noise hypotheses. Second, new bounds for the SCN are proposed to achieve improved sensing in correlated noise scenarios. Third, the performance of fractional-sampling (FS)-based SS is studied, and a method to determine the operating point for the FS rate in terms of sensing performance and complexity is suggested. Finally, a signal-to-noise ratio (SNR) estimation technique based on the maximum eigenvalue of the covariance matrix of the received signal is proposed. It is shown that the proposed SCN-based threshold improves sensing performance in correlated noise scenarios, and SNRs up to 0 dB can be reliably estimated with a normalized mean square error (MSE) of less than 1% in the presence of correlated noise without the knowledge of noise variance.
82 citations
TL;DR: A generic-purpose solution of highly power-efficient active-RC filters, suitable for analog baseband with wide bandwidth-range from several mega- Hz to hundreds of mega-Hz in wireless receivers, and the GBW compensation and the Q-degrading scheme are adopted to relax the opamp GBW requirement, further reducing the power dissipation.
Abstract: This paper presents a generic-purpose solution of highly power-efficient active-RC filters, which is suitable for analog baseband with wide bandwidth-range from several mega-Hz to hundreds of mega-Hz in wireless receivers. A 260 μA 7-20 MHz 6th-order active-RC low-bandwidth low-pass filter (LBW-LPF) and a 2.3 mA 240-500 MHz 6th-order active-RC high-bandwidth low-pass filter (HBW-LPF) are implemented in a standard 0.18 μm CMOS process to demonstrate this versatile solution. Highly power-efficient push-pull opamps with 30-to-35 dB gain are adopted for the filters, which allow us to focus on extending the bandwidth and reducing the power consumption. The push-pull opamp with adaptive-biased and pole-cancellation push-pull source follower (APP-SF) as the buffer stage is proposed to greatly reduce the power consumption and effectively extend the bandwidth. An adaptive bias mechanism is also proposed to tolerate the PVT variations for the opamps. In addition, the GBW compensation and the Q-degrading scheme are adopted to relax the opamp GBW requirement, further reducing the power dissipation. The LBW-LPF only consumes 260 μA current from 1.8 V supply, achieves 14.4 dBm in-band IIP3 and 66.2 nV/√ Hz IRN density, and occupies 0.21 mm 2 silicon area without pads. The HBW-LPF merely dissipates 2.3 mA current from 1.8 V supply, achieves 11.3 dBm in-band IIP3 and 13.1 nV/√ Hz IRN density, and occupies 0.23 mm 2 silicon area without pads.
71 citations
Cites background from "A Low-Power Wideband Reconfigurable..."
...It also has low excess noise and large swing, resulting in large dynamic range [14] for given power consumption....
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TL;DR: A discrete-time IIR low-pass filter that achieves a high-order of filtering through a charge-sharing rotation and its sampling rate is then multiplied through pipelining, thus being compatible with digital nanoscale technology.
Abstract: In this paper, we propose a discrete-time IIR low-pass filter that achieves a high-order of filtering through a charge-sharing rotation. Its sampling rate is then multiplied through pipelining. The first stage of the filter can operate in either a voltage-sampling or charge-sampling mode. It uses switches, capacitors and a simple gm-cell, rather than opamps, thus being compatible with digital nanoscale technology. In the voltage-sampling mode, the gm-cell is bypassed so the filter is fully passive. A 7th-order filter prototype operating at 800 MS/s sampling rate is implemented in TSMC 65 nm CMOS. Bandwidth of this filter is programmable between 400 kHz to 30 MHz with 100 dB maximum stop-band rejection. Its IIP3 is +21 dBm and the averaged spot noise is 4.57 nV/$surd$ Hz. It consumes 2 mW at 1.2 V and occupies 0.42 mm 2.
70 citations
Cites background from "A Low-Power Wideband Reconfigurable..."
...Digital Object Identifier 10.1109/JSSC.2014.2359656 process-voltage-temperature (PVT) variations have considerable impact on filter transfer function....
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References
More filters
TL;DR: This paper presents a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3 μm CMOS process, based on the direct simulation of a doubly-terminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Abstract: A third-order elliptic low-pass continuous-time filter with a 4-MHz cutoff frequency, integrated in a 3- mu m p-well CMOS process, is presented. The design procedure is based on the direct simulation of a doubly terminated LC ladder filter by capacitors and fully balanced, current-controlled transconductance amplifiers with extended linear range. The on-chip automatic tuning circuit uses a phase-locked loop implemented with an 8.5-MHz controlled oscillator that matches a specific two-integrator loop of the filter. The complete circuit features 70-dB dynamic range (THD >
652 citations
Proceedings Article•
01 Sep 1987TL;DR: In this article, a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3?m CMOS process, is presented, based on direct simulation of a doublyterminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range.
Abstract: This paper presents a 3rd order low-pass continuous-time filter with 4 MHz cut-off frequency, integrated in a 3 ?m CMOS process. The design approach is based on the direct simulation of a doubly-terminated LC ladder using capacitors and fully-balanced, current-controlled transconductance amplifiers with extended linear range. PLL techniques, involving a 8.5 MHz controlled oscillator that matches a specific part of the filter, are used to realize on-chip automatic tuning. The complete circuit features 71 dB dynamic range and consumes only 16 mW from a single 5 V supply.
644 citations
01 Mar 1994
TL;DR: In this article, the state of the art of continuous-time filter design is reviewed and several techniques are discussed and compared in terms of performance and implementation feasibility in different fabrication technologies.
Abstract: The state of the art of continuous-time filter design is reviewed Several techniques are discussed and compared in terms of performance and implementation feasibility in different fabrication technologies This review does not aim at historical completeness, but rather emphasizes techniques that have proven their worth in commercial applications Brief mention is also made of experimental work which, in the opinion of the author, shows promise for the future >
371 citations
"A Low-Power Wideband Reconfigurable..." refers background or methods in this paper
...The filter’s (Elliptic, 5 MHz) performance is compared against previous realizations reported in the literature, in Table VI. The performance is evaluated by expanding the definition of the figure of merit (FoM) introduced in [ 12 ] and [13]:...
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...In the - case, it is difficult to attain a broad dynamic range and good linearity performance with small power consumption, whereas CMOS implementations suffer from reduced programmability [11], [ 12 ]....
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TL;DR: In this paper, the authors discuss practical methods of measuring and interpreting the results for loop gain of the closed-loop system by a voltage injection or a current-injection technique.
Abstract: In this design of a feedback system it is desirable to make experimental measurements of the loop gain as a function of frequency to ensure that the physical system operates as analytically predicted or, if not, to supply information upon which a design correction can be based In high loop-gain systems it is desirable that the loop-gain measurement be made without opening the loop This paper discusses practical methods of measuring and interpreting the results for loop gain of the closed-loop system by a voltage injection or a current-injection technique ; extension to the case in which the measurement can be made even though the system is unstable ; and extension to the case in which neither the voltage nor current-injection technique alone is adequate, but in which a combination of both permits the true loop gain to be derived These techniques have been found useful not only in linear feedback systems but also in describing-function analysis of switching-mode converters and regulators
206 citations
15 Feb 1999
TL;DR: In this paper, a 2GHz direct conversion receiver for third-generation mobile communications using wideband code division multiple access achieves -114dBm sensitivity for 128-kb/s data at 4.096-Mcps spreading rate.
Abstract: A 2-GHz direct conversion receiver for third-generation mobile communications using wide-band code division multiple access achieves -114-dBm sensitivity for 128-kb/s data at 4.096-Mcps spreading rate. The receiver is distributed on four dies. The active RC channel selection filter can be programmed to three different bandwidths from 5 to 20-MHz radio-frequency (RF) spacing; and the gain control is merged with filtering. RF and baseband chips use a 25-GHz, 0.3-/spl mu/m BiCMOS technology while the two analog-to-digital converters are implemented with a 0.5-/spl mu/m CMOS. The double-sideband noise figure is 5.1 dB at the 94-dB maximum voltage gain, and the IIP3 and ITP2 are -9.5 and +38 dBm, respectively, The receiver draws 128 mA from a 2.7-V supply.
187 citations
"A Low-Power Wideband Reconfigurable..." refers background in this paper
...It is desirable for some filters to facilitate invariant group delay [4], [5], whereas others are required to exhibit a programmable bandwidth [2]....
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