# A method of determination of all the minimal forms of Boolean functions

01 Mar 1962-Vol. 109, Iss: 15, pp 250-255

TL;DR: A method of minimization of Boolean functions is described, though directly concerned with the evaluation of the minimal sum of products, it can be easily extended to obtain the minimal product of sums.

Abstract: A method of minimization of Boolean functions is described. Though directly concerned with the evaluation of the minimal sum of products, it can be easily extended to obtain the minimal product of sums. It has been shown that, after the selection of the essential prime implicants, there exists a ‘row-merger’ step or a ‘row-merger’ and ‘row-cancellation’ step which reveals many alternative covers. The method of obtaining the solution for the cyclic prime implicant matrix has been systematized by introducing the ‘irredundant Sat-set’ and the ‘perturbation set’ of the prime implicants. The method yields all the minimal sums, however complex the problem may be.

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TL;DR: The problem of minimizing the bit dimension of control memories in microprogrammed digital computers is considered and the set of maximum compatibility classes of microcommands whose number is usually small is started, and near-minimal irredundant solutions are obtained.

Abstract: The problem of minimizing the bit dimension of control memories in microprogrammed digital computers is considered in this paper. We start essentially with the same basic formulation as that of Grasselli and Montanari [2]. However, in order to minimize the computational requirements, we start directly with the set of maximum compatibility classes of microcommands whose number is usually small, and readily obtain near-minimal irredundant solutions. A minimal solution is then obtained from the irredundant solutions.

60 citations

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TL;DR: This note describes an iterative procedure for generating the prime implicants of switching functions by utilizing a new tabular mode of functional representation called clause-column table, which can be applied equally well to functions given in the sum-of-products or in the product- of-sums froms.

Abstract: This note describes an iterative procedure for generating the prime implicants of switching functions by utilizing a new tabular mode of functional representation called clause-column table. The procedure generates all the prime implicants and can be applied equally well to functions given in the sum-of-products or in the product-of-sums froms, both canonical and noncanonical. The procedure can also be readily adapted to determine the prime implicants of functions having a large number of unspecified or DON'T CARE terms.

23 citations

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TL;DR: The survey focuses on minimization of boolean functions in the class of disjunctive normal forms (d.n.f.s) and covers the publications from 1953 to 1986, and presents a classification of minimization algorithms.

Abstract: The survey focuses on minimization of boolean functions in the class of disjunctive normal forms (d.n.f.s) and covers the publications from 1953 to 1986. The main emphasis is on the mathematical direction of research in boolean function minimization: bounds of parameters of boolean functions and algorithmic difficulties of minimal d.n.f. synthesis). The survey also presents a classification of minimization algorithms and gives some examples of minimization heuristics with their efficiency bounds.

11 citations

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Tufts University

^{1}TL;DR: A technique for minimizing the width of programmable logic devices (PLDs) is introduced and the weighting technique is introduced, which gives a weight to each micro-order.

Abstract: A new technique for minimizing the width of Programmable Logic Devices(PLDs) is introduced in this paper. The algorithm starts with the result of the technique introduced by Das Banerji and Chatopadhyay[4]. The solution obtained in [4] will be refined to form the temporary solution, or what is called a preliminary solution. The problem of the preliminary solution is that it does not guarantee a minimum solution, because it does not use redundant classes, that are sometimes essential to the final minimum solution. The weighting technique is introduced, which gives a weight to each micro-order. The micro-orders with the largest weights are stripped from each class to form a stripped set. The stripped micro-orders are tested for compatibility, and a new set of compatibility classes are formed based on the stripped micro-orders, and the reserved classes only. Some factors are taken into consideration before the stripped micro-orders become the final collection. The procedure loops again with the new set of compatibility classes as long as reduction is obtained.

3 citations

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11 Nov 1989

TL;DR: In this paper, the problem of minimizing the bit dimension of control memories in microprogrammed digital computers is considered, and a minimal solution is then obtained from the irredundant solutions.

Abstract: The problem of minimizing the bit dimension of control memories in microprogrammed digital computers is considered in this paper. We start essentially with the same basic formulation as that of Grasselli and Montanari [2]. However, in order to minimize the computational requirements, we start directly with the set of maximum compatibility classes of microcommands whose number is usually small, and readily obtain near-minimal irredundant solutions. A minimal solution is then obtained from the irredundant solutions.

1 citations

##### References

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TL;DR: A systematic procedure is presented for writing a Boolean function as a minimum sum of products and specific attention is given to terms which can be included in the function solely for the designer's convenience.

Abstract: A systematic procedure is presented for writing a Boolean function as a minimum sum of products This procedure is a simplification and extension of the method presented by W V Quine Specific attention is given to terms which can be included in the function solely for the designer's convenience

1,103 citations

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TL;DR: It will be shown that several of the well-known theorems on impedance networks have roughly analogous theorem in relay circuits, including the delta-wye and star-mesh transformations, and the duality theorem.

Abstract: In the control and protective circuits of complex electrical systems it is frequently necessary to make intricate interconnections of relay contacts and switches Examples of these circuits occur in automatic telephone exchanges, industrial motor-control equipment, and in almost any circuits designed to perform complex operations automatically In this article a mathematical analysis of certain of the properties of such networks will be made Particular attention will be given to the problem of network synthesis Given certain characteristics, it is required to find a circuit incorporating these characteristics The solution of this type of problem is not unique and methods of finding those particular circuits requiring the least number of relay contacts and switch blades will be studied Methods will also be described for finding any number of circuits equivalent to a given circuit in all operating characteristics It will be shown that several of the well-known theorems on impedance networks have roughly analogous theorems in relay circuits Notable among these are the delta-wye (δ-Y) and star-mesh transformations, and the duality theorem

922 citations

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TL;DR: The Problem of Simplifying Truth Functions is concerned with the problem of reducing the number of operations on a graph to a simple number.

Abstract: (1952). The Problem of Simplifying Truth Functions. The American Mathematical Monthly: Vol. 59, No. 8, pp. 521-531.

885 citations

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Bell Labs

^{1}TL;DR: The problem in this area which has been attacked most energetically is that of the synthesis of efficient combinational that is, nonsequential, logic circuits.

Abstract: THE SEARCH for simple abstract techniques to be applied to the design of switching systems is still, despite some recent advances, in its early stages The problem in this area which has been attacked most energetically is that of the synthesis of efficient combinational that is, nonsequential, logic circuits

610 citations