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Proceedings ArticleDOI

A New Charge based Compact Model for Lateral Asymmetric MOSFET and its application to High Voltage MOSFET Modeling

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TLDR
A new charge based analytical compact model for lateral asymmetric MOSFET (LAMOS) is reported, which shows good results in DC and most importantly in AC regime, especially the peaks in CGD, COS and CGG capacitances.
Abstract
The lateral asymmetric MOSFET, which has longitudinal doping variation in the channel, is the building block of many categories of high voltage MOSFETs e.g. LDMOS, VDMOS. Here we report a new charge based analytical compact model for lateral asymmetric MOSFET (LAMOS). Numerical device simulations are used to validate the intrinsic MOS region of high voltage MOSFET for lateral doping gradient in the channel. The model shows good results in DC and most importantly in AC regime, especially the peaks in CGD, COS and CGG capacitances. The LAMOS model is also validated along with the drift model on the measured DC characteristics of high voltage LDMOS transistor

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Citations
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Compact modeling of high voltage MOSFETs

TL;DR: In this paper, a general high voltage MOSFET model is presented for the first time, which can be used for any high voltage device with extended drift region and a novel partitioning scheme is developed and validated on the device simulation.
Book ChapterDOI

Modeling of High Voltage MOSFETs Based on EKV (HV-EKV)

TL;DR: In this paper, the authors proposed a modeling strategy for HVMOS transistors (HV-EKV) based on the scalable drift resistance and the use of charge based EKV2.6 MOSFET model as a core for the intrinsic MOS channel.
Proceedings ArticleDOI

Analysis and Compact Modeling of Drain-Extended FinFET

TL;DR: In this article, a comprehensive simulation and the compact model of drain extended FinFET for high power application is presented and validated with TCAD simulations and can be used for high-power circuit simulations.
Book ChapterDOI

Compact Modeling of Drain-Extended MOS Transistor Using BSIM-BULK Model

TL;DR: The charge based compact model for Drain-Extended MOS (DEMOS) transistor accurately predicts the special effects of quasi-saturation, present in high voltage MOSFETs and low voltage BSIM-BULK model.
References
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Journal ArticleDOI

An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications

TL;DR: In this article, a fully analytical MOS transistor model dedicated to the design and analysis of low-voltage, low-current analog circuits is presented, which exploits the inherent symmetry of the device by referring all the voltages to the local substrate.
Book

Semiconductor device fundamentals

TL;DR: Semiconductor Models -- A General Introduction, Field Effect Introduction -- the J-FET and MESFET, and Electrostatics -- Mostly Qualitative Formulation.
Journal ArticleDOI

Inversion charge linearization in MOSFET modeling and rigorous derivation of the EKV compact model

TL;DR: In this article, the implications of inversion charge linearization in compact MOS transistor modeling are discussed, and an improvement to the EKV charge-based model is proposed in the form of a more accurate charge-voltage relationship.
Book

High Voltage Devices and Circuits in Standard CMOS Technologies

TL;DR: The High Voltage Devices and Circuits in Standard CMOS Technologies (HVDC) as discussed by the authors is a survey of high voltage devices and circuits in standard CMOS technologies, where high voltage (HV) is defined as any voltage higher than the nominal (low) voltage.
Journal ArticleDOI

Self-heating characterization and extraction method for thermal resistance and capacitance in high voltage MOSFETs

TL;DR: In this article, a simple pulsed-gate experiment is proposed and the influence of its parameters (pulse duration and duty factor) are analyzed, and it is demonstrated that in our 100 V DMOSFET, SHE is cancelled by using pulses with duration less than 2 /spl mu/s and duty factors lower than 1:100.
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