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Proceedings ArticleDOI

A new fault protection circuit of 600V PT-IGBT for the improved avalanche energy employing the floating p-well

23 May 2005-pp 87-90
TL;DR: In this article, a fault protection circuit, which detects overvoltage under short circuit fault, of IGBT for the improved undamped inductive switching capability using floating p-well is proposed and fabricated.
Abstract: A fault protection circuit, which detects over-voltage under short circuit fault, of IGBT for the improved undamped inductive switching (UIS) capability using floating p-well is proposed and fabricated. Experimental results show that the proposed circuit successfully exhibits the reduction of collector current under fault condition when the protection circuit detects the fault signal and immediately lowers gate voltage. We have also verified the operation of the proposed circuit and device by employing the measurement under hard switching fault (HSF) and fault under load (FUL) conditions and two-dimensional mixed-mode simulation.
Citations
More filters
01 Jan 2000
TL;DR: In this article, the UIS capability of PT IGBTs was analyzed through non-isothermal two-dimensional numerical simulations and it was shown that the failure mechanism is determined by the open-base p-n-p structure inherent in the IGBT.
Abstract: In this paper, we analyze the UIS capability of punchthrough (PT) IGBTs both experimentally, and through non-isothermal two-dimensional numerical simulations. It is shown that the UIS failure mechanism is determined by the open-base p-n-p structure inherent in the IGBT. By optimizing the open base p-n-p, avalanche induced second breakdown can be prevented at current densities in excess of 1000 A/cm/sup 2/. A 600 V PT-IGBT with low on-state voltage, fast switching, and >4.5 J/cm/sup 2/ UIS capability at 120 A/cm/sup 2/ is experimentally demonstrated.

8 citations

Proceedings ArticleDOI
04 Jun 2006
TL;DR: In this paper, the authors proposed an optimization method of fault protection circuit, which uses the floating p-well voltage detection, of IGBT by employing a novel blanking filter, which filter the false detection during the normal switching period, cause the pull-down MOSFET to lower the gate voltage of the IGBT softly.
Abstract: We have proposed an optimization method of fault protection circuit, which uses the floating p-well voltage detection, of IGBT by employing a novel blanking filter. The floating p-well capacitor and gate resistor, which filter the false detection during the normal switching period, cause the pull-down MOSFET to lower the gate voltage of the IGBT softly. The experimental results show the soft-shutdown behavior of the IGBT with the optimized protection circuit during the fault condition. We have also investigated the switching characteristics by using the measurement and 2-dimensional numerical simulation.

3 citations

Proceedings ArticleDOI
15 Jun 2008
TL;DR: In this paper, a floating p-well voltage reset scheme was proposed for reliable and fast discharging voltage sensing terminal by employing the negative gate bias, which stabilizes the floating pwell voltage spontaneously during the transient state and off-state by turning on the internal PMOS of the floating P-well IGBT.
Abstract: We have proposed a new floating p-well voltage reset scheme for reliable and fast discharging voltage sensing terminal by employing the negative gate bias, which stabilizes the floating p-well voltage spontaneously during the transient state and off-state by turning on the internal PMOS of the floating p-well IGBT. We have investigated the switching stability characteristics of the floating p-well voltage. Experimental results show that the discharging time and voltage spike of the floating p-well voltage is successfully controlled by employing the gate bias polarity and filter capacitor. Simulation results also shows that the hole current diverting effect due to the turn-on of the internal PMOS suppresses the floating p-well voltage during the turn-off transient.

Cites background from "A new fault protection circuit of 6..."

  • ...The VFP sensing scheme provides wide sensing margin and linear voltage sensor characteristics in the sensing margin without any additional sensing device in device in the active area together with the improved avalanche capability [4]....

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References
More filters
Proceedings ArticleDOI
04 Oct 1992
TL;DR: In this article, the authors describe a systematic investigation into the various fault modes of a voltage-fed PWM inverter system for induction motor drives, and a preliminary mathematical analysis has been made for the key fault types, namely, input supply single line to ground fault, rectifier diode short circuit, inverter transistor base drive open, and inverters transistor short-circuit conditions.
Abstract: The reliability of power electronics systems is of paramount importance in industrial, commercial, aerospace, and military applications. The knowledge about the fault mode behavior of a converter system is extremely important from the standpoint of improved system design, protection, and fault tolerant control. This paper describes a systematic investigation into the various fault modes of a voltage-fed PWM inverter system for induction motor drives. After identifying all the fault modes, a preliminary mathematical analysis has been made for the key fault types, namely, input supply single line to ground fault, rectifier diode short circuit, inverter transistor base drive open, and inverter transistor short-circuit conditions. The predicted fault performances are then substantiated by simulation study. The study has been used to determine stresses in power circuit components and to evaluate satisfactory post-fault steady-state operating regions. The results are equally useful for better protection system design and easy fault diagnosis. They will be used to improve system reliability by using fault tolerant control. >

431 citations


"A new fault protection circuit of 6..." refers background in this paper

  • ...[1][2] Various fault protection circuits of IGBT have been reported....

    [...]

Proceedings ArticleDOI
10 Dec 2002
TL;DR: In this paper, a new short-circuit protection scheme, which allows protection of IGBT devices against fault under load and hard switching fault transients, is presented, which performs the fault current limiting action within the short circuit time, and subsequently forces the device to gate on again in a tentative turn-on.
Abstract: Short circuit faults of IGBTs determine overcurrent through the devices subsequently to a turn-on switching or during the on-state condition, leading respectively to hard switching fault (HSF) or fault under load (FUL). Firstly, the state of the art as appearing in literature is recalled and discussed. A new short-circuit protection scheme, which allows protection of IGBT devices against fault under load and hard switching fault transients, is presented. It performs the fault current limiting action within the short circuit time, and subsequently forces the device to gate on again in a tentative turn-on. Moreover, the proposed circuitry allows strong bounding of the peak of the current in FUL transients. The validity and correctness of the proposed approach has been extensively validated by experimental tests.

41 citations


"A new fault protection circuit of 6..." refers background or methods in this paper

  • ...The floating p-well voltage during the normal turn-on switching maintains below the Vth of MP, or the fault protection circuit requires the turn-on delay time to avoid a false detection of fault.[3]...

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  • ...[3] Also, several methods have been proposed to improve the UIS capability of IGBT....

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01 Jan 2000
TL;DR: In this article, the UIS capability of PT IGBTs was analyzed through non-isothermal two-dimensional numerical simulations and it was shown that the failure mechanism is determined by the open-base p-n-p structure inherent in the IGBT.
Abstract: In this paper, we analyze the UIS capability of punchthrough (PT) IGBTs both experimentally, and through non-isothermal two-dimensional numerical simulations. It is shown that the UIS failure mechanism is determined by the open-base p-n-p structure inherent in the IGBT. By optimizing the open base p-n-p, avalanche induced second breakdown can be prevented at current densities in excess of 1000 A/cm/sup 2/. A 600 V PT-IGBT with low on-state voltage, fast switching, and >4.5 J/cm/sup 2/ UIS capability at 120 A/cm/sup 2/ is experimentally demonstrated.

8 citations


"A new fault protection circuit of 6..." refers background in this paper

  • ...[2][4][5] In order to obtain the ruggedness of power semiconductor devices, improving the avalanche energy and providing the fault protection should be considered together....

    [...]

  • ...[1][2] Various fault protection circuits of IGBT have been reported....

    [...]

Proceedings ArticleDOI
22 May 2000
TL;DR: In this article, the UIS capability of PT IGBTs was analyzed through non-isothermal two-dimensional numerical simulations and it was shown that the failure mechanism is determined by the open-base p-n-p structure inherent in the IGBT.
Abstract: In this paper, we analyze the UIS capability of punchthrough (PT) IGBTs both experimentally, and through non-isothermal two-dimensional numerical simulations. It is shown that the UIS failure mechanism is determined by the open-base p-n-p structure inherent in the IGBT. By optimizing the open base p-n-p, avalanche induced second breakdown can be prevented at current densities in excess of 1000 A/cm/sup 2/. A 600 V PT-IGBT with low on-state voltage, fast switching, and >4.5 J/cm/sup 2/ UIS capability at 120 A/cm/sup 2/ is experimentally demonstrated.

7 citations

Proceedings ArticleDOI
14 Apr 2003
TL;DR: In this article, a new IGBT employing a floating p-well, which improves the avalanche energy, is proposed and verified using the 2D numerical simulation, and the saturation voltage of the proposed device can be comparable to that of the conventional device by adjusting the thickness of the n-epitaxial layer.
Abstract: A new IGBT employing a floating p-well, which improves the avalanche energy, is proposed and verified using the 2D numerical simulation. By implementing the floating p-well, the peak point of impact ionization moves from the surface under the gate to the bottom of the p-well so that the hole current flows vertically through the bottom of the p-well under the unclamped inductive switching (UIS). Hence, the avalanche capability can be significantly improved by the reduction of the hole current beneath the n+ emitter. Also, the saturation voltage of the proposed device can be comparable to that of the conventional device by adjusting the thickness of the n-epitaxial layer.

5 citations


"A new fault protection circuit of 6..." refers background or methods in this paper

  • ...289-292, 2002 [5] Soo-Seong Kim, et al, “A new 600V PT-IGBT for the improved avalanche energy by employing the floating p-well”, ISPSD’ 03, pp....

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  • ...[2][4][5] In order to obtain the ruggedness of power semiconductor devices, improving the avalanche energy and providing the fault protection should be considered together....

    [...]

  • ...Our previous work shows that the avalanche capability of IGBT under UIS condition is improved significantly by employing floating p-well.[5] The purpose of our study is to propose the novel fault protection circuit of IGBT with the improved avalanche energy by using the floating p-well structure....

    [...]