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Proceedings ArticleDOI

A Resistance-to-Digital Converter possessing exceptional insensitivity to circuit parameters

TL;DR: A new Resistance-to-Digital Converter suitable for single element resistive sensors is presented in this paper, based on a relaxation oscillator circuit, which along with a timer-counter that measures the time intervals of oscillations, provides digital output proportional to the resistance of the sensor.
Abstract: A new Resistance-to-Digital Converter (RDC) suitable for single element resistive sensors is presented in this paper. The proposed scheme is based on a relaxation oscillator circuit, which along with a timer-counter that measures the time intervals of oscillations, provides digital output proportional to the resistance of the sensor. In most of the existing RDCs, the output characteristic has gain, offset and non-linearity errors owing to various circuit parameters and their drift in the measurement unit. The output of the proposed RDC has a special nature, by the design of the measurement method, that it is not a function of the circuit parameters such as offset voltages and bias currents of the opamps and comparators used, gain of various units employed, ON-resistance of the switches, value or mismatch in the magnitudes of the reference voltages employed, etc. Such a scheme will be useful for high accuracy measurements, even in circumstances where the above-mentioned parameters may vary or drift, due to variation in the measurement environment, say, large variation in temperature. A prototype of the proposed RDC has been developed in the laboratory and the performance has been tested under various conditions. The output was found to be linear with a worst-case non-linearity of 0.06 % As expected, the sensitive of the output of the prototype RDC to various circuit parameters was found to be negligible.
Citations
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Journal ArticleDOI
TL;DR: A novel readout circuit for interfacing single element resistive sensors is presented, based on a new relaxation oscillator (RO), which provides a digital output proportional to the resistance of the sensor.
Abstract: A novel readout circuit for interfacing single element resistive sensors is presented in this paper. The proposed scheme is based on a new relaxation oscillator (RO). The RO, along with a timer counter provides a digital output proportional to the resistance of the sensor. The output characteristic of most of the existing readout circuits for resistive sensors suffers from gain, offset, and nonlinearity errors. The sources of errors include various nonideal circuit parameters and their drift. The output of the proposed readout circuit has a special feature that it is not a function of the circuit parameters such as: 1) offset voltages of the opamps and comparators; 2) bias currents of the opamps and comparators; 3) gain of various units employed; 4) ON-resistance of the switches; 5) value or mismatch in the magnitudes of the reference voltages employed; 6) delay of the switches and comparator; 7) leakage current of the switch; and 8) slew rate of the opamp. Such a scheme will be useful for high accuracy measurements, even when the parameters 1)–8) may vary or drift, due to variation in the measurement environment. A prototype of the proposed readout scheme has been developed in the laboratory and the performance has been evaluated under various conditions. The output was found to be linear with a worst-case nonlinearity of 0.05%. Test results from a prototype developed show that the proposed scheme possesses all the features, described above, as expected.

33 citations


Cites background from "A Resistance-to-Digital Converter p..."

  • ...Even in this case, the net change in voltage in voi during TON and TOFF remains the same as 2VR [17]....

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  • ...In the presence of VOS1 and IB , (2) will get modified as (3) [17]...

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  • ...balancing equation, which is the sum of the charge acquired by CF during the ON and OFF period is zero [17]....

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  • ...This paper presents such a novel scheme [17] that guarantees high immunity to the nonideal parameters of the circuit and its variation, in the output....

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  • ...Thus, the output of the proposed readout is insensitive to the mismatch in the magnitudes of the dc reference voltage [17]....

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Journal ArticleDOI
TL;DR: A modification of the method for measuring resistance values using a direct interface circuit, comprising a capacitor and some calibration resistors, that ensures more accurate measurements and extends the range of resistance values that can be measured.
Abstract: Traditional calibration methods for measuring resistance values using a direct interface circuit, comprising a capacitor and some calibration resistors, offer a straightforward, economical option. However, such methods show greater inaccuracies as resistance values decrease. This article presents a modification of the method that ensures more accurate measurements and extends the range of resistance values that can be measured. Unlike the linear equation used in the traditional method, the proposed method obtains the power functions related to resistance value and measured discharge time. Since these circuits need calibration resistors, criteria are established to find their values. To reduce arithmetical complexity, two approximations are tested to calculate the exact value of the resistance. With this approach, the relative errors for low resistances are reduced and the measuring range is extended. Three measurement setups were carried out with a microcontroller and a field-programmable gate array (FPGA) to validate the results, showing the validity of the method independently of the device. Using the FPGA configured so that the maximum current that can be sink per output pin is 24 mA, the error in the estimation of a resistance of $9.9~\Omega $ is ten times less than that obtained using the classic two-point calibration method.

10 citations


Cites background from "A Resistance-to-Digital Converter p..."

  • ...These external elements usually need operational amplifiers to obtain the signals in the appropriate ranges, insensitive to the characteristics of these additional elements [7], [8]....

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Journal ArticleDOI
TL;DR: A simple oscillator-less direct-digital front end (ODF) for tunneling magnetoresistance (TMR) angle sensor is presented and a close degree of agreement was observed between the emulation results and the mathematical analysis performed.
Abstract: A simple oscillator-less direct-digital front end (ODF) for tunneling magnetoresistance (TMR) angle sensor is presented in this paper. The TMR sensor outputs vary as sine and cosine functions of the shaft angle to be measured. To these outputs, the ODF applies ratiometric-based techniques to obtain a linear output for the full-circle range. The first ratiometric linearization scheme (RLS-A) provides a linear output which is insensitive to the variation of sensor transformation constant. Alternatively, the second ratiometric linearization scheme (RLS-B) renders output with minimal nonlinearity (0.009%). The ODF does not require any sinusoidal oscillator for its operation, thereby eradicating one major error source. Furthermore, the proposed methodology uses dc excitation for the sensor. This makes the ODF insensitive to the sensor parasitic capacitances. The operation of the ODF and two linearizing schemes are explained in detail. Mathematical evaluation of the schemes is conducted to determine the effects of different sensor and circuit nonidealities. The static and dynamic performances of the ODF are studied using emulated TMR sensor outputs. The results establish a linear transfer-characteristic over 360° range. Tests are also conducted to quantify the effect of nonidealities like phase imbalance in sensor outputs and deviation in sensor transformation-constant. A close degree of agreement was observed between the emulation results and the mathematical analysis performed. Later, the ODF is interfaced and tested with a prototype TMR-based shaft-angle measurement unit. The interfacing results underline the fact that the developed ODF acts as an efficient linearizer for TMR angle sensors.

9 citations

Journal ArticleDOI
TL;DR: A series of calibration methods that decrease the mean estimation time for resistive sensors, based on the TPCM and fast calibration methods I and II, are proposed.
Abstract: Direct interface circuits are a simple, inexpensive alternative for the digital conversion of a sensor reading, and in some of these circuits only passive calibration elements are required in order to carry out this conversion. In the case of resistive sensors, the most accurate methods of calibration, namely two-point calibration method (TPCM) and fast calibration methods I and II (FCMs I and II), require two calibration resistors to estimate the value of a sensor. However, although FCMs I and II considerably reduce the time necessary to estimate the value of the sensor, this may still be excessive in certain applications, such as when making repetitive readings of a sensor or readings of a large series of sensors. For these situations, this paper proposes a series of calibration methods that decrease the mean estimation time. Some of the proposed methods (quasi single-point calibration methods) are based on the TPCM, while others (fast quasi single-point calibration methods) make the most of the advantages of FCM. In general, the proposed methods significantly reduce estimation times in exchange for a small increase in errors. To validate the proposal, a circuit with a Xilinx XC3S50AN-4TQG144C FPGA has been designed and resistors in the range (267.56 Ω, 7464.5 Ω) have been measured. For 20 repetitive measurements, the proposed methods achieve time reductions of up to 61% with a relative error increase of only 0.1%.

6 citations

Journal ArticleDOI
TL;DR: A low-power 12-bit successive approximation register (SAR) resistance-to-digital converter (RDC) for resistive microsensors with a figure-of-merit (FoM) of 33 pJ/conversion-step is presented.
Abstract: In this paper, a low-power 12-bit successive approximation register (SAR) resistance-to-digital converter (RDC) for resistive microsensors with a figure-of-merit (FoM) of 33 pJ/conversion-step is presented. In the conventional resistive analog front-end (AFE), two-step conversion schemes, including a resistance-to-voltage converter and a voltage-to-digital converter are generally used. The presented SAR RDC can directly convert the resistance changes to digital codes. The proposed SAR RDC consists of a comparing stage, and a SAR operating stage. The preamplifier of comparing stage implements a correlated double sampling (CDS) technique to improve the low-noise characteristic and reduce the low-frequency flicker (1/f) noise. The RDC is designed using SAR scheme to achieve low-power consumption. The SAR RDC achieves a wide input resistance range of 2 MΩ. The SAR RDC is implemented with a 0.18 μm standard complementary metal–oxide–semiconductor (CMOS) process with an active area of 0.35 mm2. All functional blocks, including voltage and current references, oscillators, and timing generators, are integrated on the chip. The proposed RDC consumes 93.2 μW with 1.8 V power supply. The experimental results of the proposed SAR RDC achieve 11.3-bit resolution within a conversion time of 0.92 ms and a figure-of-merit (FoM) of 33 pJ/conversion-step.

5 citations

References
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Journal ArticleDOI
TL;DR: A novel resistance-to-digital converter (RDC), based on the integrating type analogue- to- digital converter principle, is presented in this study and a prototype RDC was developed and tested and tested to confirm the results of the simulation.
Abstract: A novel resistance-to-digital converter (RDC), based on the integrating type analogue-to-digital converter principle, is presented in this study. The conversion time of the proposed scheme is not a function of the current value of the parameter being measured. Thus, by suitably setting this parameter, the converter can be made to reject the effects of interference at a particular frequency, such as, that due to power-line at 50/60 Hz. Error analysis was conducted to ascertain the effects of non-idealities of various components of the circuit, on its output. Simulation studies were carried out in LTSPICE to verify the linearity and the interference rejection capability of the converter. Further, a prototype RDC was developed in the laboratory and tested to confirm the results of the simulation.

5 citations


"A Resistance-to-Digital Converter p..." refers methods in this paper

  • ...Some of them are based on RC oscillator and timer-counter [2], [3], while others rely on resistance to pulse-width conversion [4], resistance-to-time conversion [5], sigma–delta [6], chargebalancing type [7], [8] and direct interfacing of resistance to a micro-controller [9] methods for the measurement....

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