Journal ArticleDOI
A review of 3-D packaging technology
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TLDR
In this paper, the state-of-the-art in 3D packaging technology for very large scale integration (VLSI) is reviewed, where a number of bare dice and multichip module (MCM) stacking technologies are emerging to meet the ever increasing demands for low power consumption, low weight and compact portable systems.Abstract:
This paper reviews the state-of-the-art in three-dimensional (3-D) packaging technology for very large scale integration (VLSI). A number of bare dice and multichip module (MCM) stacking technologies are emerging to meet the ever increasing demands for low power consumption, low weight and compact portable systems. Vertical interconnect techniques are reviewed in detail. Technical issues such as silicon efficiency, complexity, thermal management, interconnection density, speed, power etc. are critical in the choice of 3-D stacking technology, depending on the target application, and are briefly discussed.read more
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PatentDOI
Stretchable form of single crystal silicon for high performance electronics on rubber substrates
TL;DR: In this article, the authors present stretchable and printable semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed, or otherwise deformed.
Journal ArticleDOI
Three-dimensional integrated circuits
Anna W. Topol,D.C. La Tulipe,L. Shi,David J. Frank,K. Bernstein,Steven E. Steen,Arvind Kumar,G. U. Singco,A. M. Young,K. W. Guarini,Meikei Ieong +10 more
TL;DR: The process steps and design aspects that were developed at IBM to enable the formation of stacked device layers are reviewed, including the descriptions of a glass substrate process to enable through-wafer alignment and a single-damascene patterning and metallization method for the creation of high-aspect-ratio capability.
Journal ArticleDOI
Heterogeneous Three-Dimensional Electronics by Use of Printed Semiconductor Nanomaterials
Jong Hyun Ahn,Hoon Kim,Keon Jae Lee,Seokwoo Jeon,Seong Jun Kang,Yugang Sun,Ralph G. Nuzzo,John A. Rogers +7 more
TL;DR: Repeated application of an additive, transfer printing process that uses soft stamps with these substrates as donors, followed by device and interconnect formation, yields high-performance heterogeneously integrated electronics that incorporate any combination of semiconductor nanomaterials on rigid or flexible device substrates.
Journal ArticleDOI
Artificial neural networks in hardware: A survey of two decades of progress
Janardan Misra,Indranil Saha +1 more
TL;DR: This article presents a comprehensive overview of the hardware realizations of artificial neural network models, known as hardware neural networks (HNN), appearing in academic studies as prototypes as well as in commercial use.
Patent
Methods and devices for fabricating and assembling printable semiconductor elements
Ralph G. Nuzzo,John A. Rogers,Etienne Menard,Keon Jae Lee,Dahl-Young Khang,Yugang Sun,Matthew Meitl,Zhengtao Zhu +7 more
TL;DR: In this article, the authors present methods and devices for fabricating printable semiconductor elements and assembling them onto substrate surfaces, which are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on polymeric materials.
References
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