A review of recent MOSFET threshold voltage extraction methods
TL;DR: Several of the extraction methods currently used to determine the value of threshold voltage from the measured drain current versus gate voltage transfer characteristics, focusing specially on single-crystal bulk MOSFETs are reviewed.
About: This article is published in Microelectronics Reliability.The article was published on 2002-04-01. It has received 813 citations till now. The article focuses on the topics: Subthreshold conduction & Overdrive voltage.
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TL;DR: The recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed andp-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed.
Abstract: Transparent electronics is today one of the most advanced topics for a wide range of device applications. The key components are wide bandgap semiconductors, where oxides of different origins play an important role, not only as passive component but also as active component, similar to what is observed in conventional semiconductors like silicon. Transparent electronics has gained special attention during the last few years and is today established as one of the most promising technologies for leading the next generation of flat panel display due to its excellent electronic performance. In this paper the recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed and p-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed. After a short introduction where the main advantages of these semiconductors are presented, as well as the industry expectations, the beautiful history of TFTs is revisited, including the main landmarks in the last 80 years, finishing by referring to some papers that have played an important role in shaping transparent electronics. Then, an overview is presented of state of the art n-type TFTs processed by physical vapour deposition methods, and finally one of the most exciting, promising, and low cost but powerful technologies is discussed: solution-processed oxide TFTs. Moreover, a more detailed focus analysis will be given concerning p-type oxide TFTs, mainly centred on two of the most promising semiconductor candidates: copper oxide and tin oxide. The most recent data related to the production of complementary metal oxide semiconductor (CMOS) devices based on n- and p-type oxide TFT is also be presented. The last topic of this review is devoted to some emerging applications, finalizing with the main conclusions. Related work that originated at CENIMAT|I3N during the last six years is included in more detail, which has led to the fabrication of high performance n- and p-type oxide transistors as well as the fabrication of CMOS devices with and on paper.
2,440 citations
25 Oct 2010
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Abstract: Steep subthreshold swing transistors based on interband tunneling are examined toward extending the performance of electronics systems. In particular, this review introduces and summarizes progress in the development of the tunnel field-effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges. The promise of the TFET is in its ability to provide higher drive current than the MOSFET as supply voltages approach 0.1 V.
1,389 citations
TL;DR: This paper introduces and demonstrates FET biosensors based on molybdenum disulfide (MoS2), which provides extremely high sensitivity and at the same time offers easy patternability and device fabrication, due to its 2D atomically layered structure.
Abstract: Biosensors based on field-effect transistors (FETs) have attracted much attention, as they offer rapid, inexpensive, and label-free detection. While the low sensitivity of FET biosensors based on bulk 3D structures has been overcome by using 1D structures (nanotubes/nanowires), the latter face severe fabrication challenges, impairing their practical applications. In this paper, we introduce and demonstrate FET biosensors based on molybdenum disulfide (MoS2), which provides extremely high sensitivity and at the same time offers easy patternability and device fabrication, due to its 2D atomically layered structure. A MoS2-based pH sensor achieving sensitivity as high as 713 for a pH change by 1 unit along with efficient operation over a wide pH range (3–9) is demonstrated. Ultrasensitive and specific protein sensing is also achieved with a sensitivity of 196 even at 100 femtomolar concentration. While graphene is also a 2D material, we show here that it cannot compete with a MoS2-based FET biosensor, which ...
837 citations
TL;DR: In this article, a review of the state-of-the-art organic field effect transistors is presented, focusing on the problem of parameter extraction, limitations of the performance by the interfaces, which include the dielectric-semiconductor interface, and the injection and retrieval of charge carriers at the source and drain electrodes.
Abstract: With the advent of devices based on single crystals, the performance of organic field-effect transistors has experienced a significant leap, with mobility now in excess of 10 cm2 V−1 s−1. The purpose of this review is to give an overview of the state-of-the-art of these high-performance organic transistors. The paper focuses on the problem of parameter extraction, limitations of the performance by the interfaces, which include the dielectric–semiconductor interface, and the injection and retrieval of charge carriers at the source and drain electrodes. High-performance devices also constitute tools of choice for investigating charge transport phenomena in organic materials. It is shown how the combination of field-effect measurements with other electrical characterizations helps in elucidating this still unresolved issue.
649 citations
TL;DR: This work demonstrates analog resistive switching devices that possess desired characteristics for neuromorphic computing networks with minimal performance variations using a single-crystalline SiGe layer epitaxially grown on Si as a switching medium.
Abstract: Although several types of architecture combining memory cells and transistors have been used to demonstrate artificial synaptic arrays, they usually present limited scalability and high power consumption. Transistor-free analog switching devices may overcome these limitations, yet the typical switching process they rely on—formation of filaments in an amorphous medium—is not easily controlled and hence hampers the spatial and temporal reproducibility of the performance. Here, we demonstrate analog resistive switching devices that possess desired characteristics for neuromorphic computing networks with minimal performance variations using a single-crystalline SiGe layer epitaxially grown on Si as a switching medium. Such epitaxial random access memories utilize threading dislocations in SiGe to confine metal filaments in a defined, one-dimensional channel. This confinement results in drastically enhanced switching uniformity and long retention/high endurance with a high analog on/off ratio. Simulations using the MNIST handwritten recognition data set prove that epitaxial random access memories can operate with an online learning accuracy of 95.1%. Controlled widening of threading dislocations in SiGe layers epitaxially grown on Si allows the realization of resistive switching devices with enhanced uniformity, high on/off ratio and long retention times.
477 citations
References
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Book•
04 Jul 1990
TL;DR: In this article, the authors present a characterization of the resistivity of a two-point-versus-four-point probe in terms of the number of contacts and the amount of contacts in the probe.
Abstract: Preface to Third Edition. 1 Resistivity. 1.1 Introduction. 1.2 Two-Point Versus Four-Point Probe. 1.3 Wafer Mapping. 1.4 Resistivity Profiling. 1.5 Contactless Methods. 1.6 Conductivity Type. 1.7 Strengths and Weaknesses. Appendix 1.1 Resistivity as a Function of Doping Density. Appendix 1.2 Intrinsic Carrier Density. References. Problems. Review Questions. 2 Carrier and Doping Density. 2.1 Introduction. 2.2 Capacitance-Voltage (C-V). 2.3 Current-Voltage (I-V). 2.4 Measurement Errors and Precautions. 2.5 Hall Effect. 2.6 Optical Techniques. 2.7 Secondary Ion Mass Spectrometry (SIMS). 2.8 Rutherford Backscattering (RBS). 2.9 Lateral Profiling. 2.10 Strengths and Weaknesses. Appendix 2.1 Parallel or Series Connection? Appendix 2.2 Circuit Conversion. References. Problems. Review Questions. 3 Contact Resistance and Schottky Barriers. 3.1 Introduction. 3.2 Metal-Semiconductor Contacts. 3.3 Contact Resistance. 3.4 Measurement Techniques. 3.5 Schottky Barrier Height. 3.6 Comparison of Methods. 3.7 Strengths and Weaknesses. Appendix 3.1 Effect of Parasitic Resistance. Appendix 3.2 Alloys for Contacts to Semiconductors. References. Problems. Review Questions. 4 Series Resistance, Channel Length and Width, and Threshold Voltage. 4.1 Introduction. 4.2 PN Junction Diodes. 4.3 Schottky Barrier Diodes. 4.4 Solar Cells. 4.5 Bipolar Junction Transistors. 4.6 MOSFETS. 4.7 MESFETS and MODFETS. 4.8 Threshold Voltage. 4.9 Pseudo MOSFET. 4.10 Strengths and Weaknesses. Appendix 4.1 Schottky Diode Current-Voltage Equation. References. Problems. Review Questions. 5 Defects. 5.1 Introduction. 5.2 Generation-Recombination Statistics. 5.3 Capacitance Measurements. 5.4 Current Measurements. 5.5 Charge Measurements. 5.6 Deep-Level Transient Spectroscopy (DLTS). 5.7 Thermally Stimulated Capacitance and Current. 5.8 Positron Annihilation Spectroscopy (PAS). 5.9 Strengths and Weaknesses. Appendix 5.1 Activation Energy and Capture Cross-Section. Appendix 5.2 Time Constant Extraction. Appendix 5.3 Si and GaAs Data. References. Problems. Review Questions. 6 Oxide and Interface Trapped Charges, Oxide Thickness. 6.1 Introduction. 6.2 Fixed, Oxide Trapped, and Mobile Oxide Charge. 6.3 Interface Trapped Charge. 6.4 Oxide Thickness. 6.5 Strengths and Weaknesses. Appendix 6.1 Capacitance Measurement Techniques. Appendix 6.2 Effect of Chuck Capacitance and Leakage Current. References. Problems. Review Questions. 7 Carrier Lifetimes. 7.1 Introduction. 7.2 Recombination Lifetime/Surface Recombination Velocity. 7.3 Generation Lifetime/Surface Generation Velocity. 7.4 Recombination Lifetime-Optical Measurements. 7.5 Recombination Lifetime-Electrical Measurements. 7.6 Generation Lifetime-Electrical Measurements. 7.7 Strengths and Weaknesses. Appendix 7.1 Optical Excitation. Appendix 7.2 Electrical Excitation. References. Problems. Review Questions. 8 Mobility. 8.1 Introduction. 8.2 Conductivity Mobility. 8.3 Hall Effect and Mobility. 8.4 Magnetoresistance Mobility. 8.5 Time-of-Flight Drift Mobility. 8.6 MOSFET Mobility. 8.7 Contactless Mobility. 8.8 Strengths and Weaknesses. Appendix 8.1 Semiconductor Bulk Mobilities. Appendix 8.2 Semiconductor Surface Mobilities. Appendix 8.3 Effect of Channel Frequency Response. Appendix 8.4 Effect of Interface Trapped Charge. References. Problems. Review Questions. 9 Charge-based and Probe Characterization. 9.1 Introduction. 9.2 Background. 9.3 Surface Charging. 9.4 The Kelvin Probe. 9.5 Applications. 9.6 Scanning Probe Microscopy (SPM). 9.7 Strengths and Weaknesses. References. Problems. Review Questions. 10 Optical Characterization. 10.1 Introduction. 10.2 Optical Microscopy. 10.3 Ellipsometry. 10.4 Transmission. 10.5 Reflection. 10.6 Light Scattering. 10.7 Modulation Spectroscopy. 10.8 Line Width. 10.9 Photoluminescence (PL). 10.10 Raman Spectroscopy. 10.11 Strengths and Weaknesses. Appendix 10.1 Transmission Equations. Appendix 10.2 Absorption Coefficients and Refractive Indices for Selected Semiconductors. References. Problems. Review Questions. 11 Chemical and Physical Characterization. 11.1 Introduction. 11.2 Electron Beam Techniques. 11.3 Ion Beam Techniques. 11.4 X-Ray and Gamma-Ray Techniques. 11.5 Strengths and Weaknesses. Appendix 11.1 Selected Features of Some Analytical Techniques. References. Problems. Review Questions. 12 Reliability and Failure Analysis. 12.1 Introduction. 12.2 Failure Times and Acceleration Factors. 12.3 Distribution Functions. 12.4 Reliability Concerns. 12.5 Failure Analysis Characterization Techniques. 12.6 Strengths and Weaknesses. Appendix 12.1 Gate Currents. References. Problems. Review Questions. Appendix 1 List of Symbols. Appendix 2 Abbreviations and Acronyms. Index.
6,573 citations
"A review of recent MOSFET threshold..." refers background or methods in this paper
...The extraction of VT in non-crystalline MOSFETs is more conveniently performed from the drain current in saturation, considering that these devices present much smaller drain currents than conventional single-crystal bulk devices....
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...The drain current, neglecting parasitic series resistance, is modeled by ID ¼ Gd Vg VT 1þ h Vg VT ; ð12Þ where Gd ðW =LeffÞlCoVd is a constant of the device with units of conductance, h is the mobility reduction factor due to the vertical electric field in the channel, and other parameters have…...
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...The threshold voltage value, which is the most important electrical parameter in modeling MOSFETs, can be ex- tracted from either measured drain current or capacitance characteristics, using a single or more transistors....
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...V methods have the disadvantage of requiring elaborate high-resolution equipment to measure the small capacitances present in MOSFETs, particularly in very small geometry state-of-art devices....
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...This method uses the sub-threshold-to-strong inversion transition region of the MOSFET’s transfer characteristics to extract the threshold voltage....
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TL;DR: In this article, a new method for the extraction of the MOSFET parameters is presented, which relies on combining drain current and transconductance transfer characteristics, enabling reliable values of the threshold voltage V/sub t/, the low field mobility mu /sub 0/ and the mobility attenuation coefficient theta to be obtained.
Abstract: A new method for the extraction of the MOSFET parameters is presented. The method, which relies on combining drain current and transconductance transfer characteristics, enables reliable values of the threshold voltage V/sub t/, the low field mobility mu /sub 0/ and the mobility attenuation coefficient theta to be obtained.
761 citations
Proceedings Article•
01 Jan 1988TL;DR: In this article, the importance of the involvement of the design and manufacturing team in achieving reliability of microelectronic devices is highlighted. And a method of verifying reliability goals through calculation of failure rates based on life test parameters is described.
Abstract: The author points out the importance of the involvement of the design and manufacturing team in achieving reliability of microelectronic devices. A method of verifying reliability goals through calculation of failure rates based on life test parameters is described. An example illustrating the method is shown. >
441 citations
TL;DR: In this article, the authors modify the Pao-Sah drain current model to incorporate a mobility model and obtain 3% accuracy from subthreshold to very strong inversion for a wide range of substrate biases.
Abstract: In this paper, we discuss the low-drain voltage transconductance behavior of the MOSFET due to surface mobility variation, interface states and small geometry, and its application in threshold voltage determination. We modify the Pao-Sah drain current model to incorporate a mobility model and obtain 3% accuracy from subthreshold to very strong inversion for a wide range of substrate biases. The effects of non-ideal scaling, finite inversion layer thickness, surface roughness mobility degradation under high normal electric fields and interface states on the transconductance behavior are discussed. We observe the peak transconductance increases with substrate bias in short-channel devices and decreases with substrate bias in long-channel devices. Finally, we show the threshold voltage can be determined from the gate voltage at which the rate of transconductance change ( ∂g m ∂V GS ) is a maximum. This threshold voltage is identifiable with a known band-bending (surface potential) of the substrate (φ s ⋍ 2φ F + V SB ) , from which the band-bending at all gate biases can be calculated. The transconductance change (TC) method is insensitive to device degradations (e.g. mobility, series resistance, hot-carrier) in contrast to the conventional method of linear extrapolation to zero drain current.
295 citations
"A review of recent MOSFET threshold..." refers methods in this paper
...The SD method [12], developed to avoid the dependence on the series resistances, determines VT as the gate voltage at which the derivative of the transconductance (i....
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...This article will review and scrutinize the following existing ID–Vg methods for extracting VT in single-crystal MOSFETs, biased in the linear region: (1) constantcurrent (CC) method, which defines VT as the gate voltage corresponding to a certain predefined practical constant drain current [1–6,10,11]; (2) extrapolation in the linear region (ELR) method, which finds the gate voltage axis intercept of the linear extrapolation of the ID–Vg characteristics at its maximum first derivative (slope) point [1–6]; (3) transconductance linear extrapolation (GMLE) method, which finds the gate voltage axis intercept of the linear extrapolation of the gm–Vg characteristics at its maximum first derivative (slope) point [19,20]; (4) second derivative (SD) method, which determines VT at the maximum of the SD of ID with respect to Vg [12]; (5) ratio method (RM), which finds the gate voltage axis intercept of the ratio of the drain current to the square root of the transconductance [13– 18]; (6) transition method [33]; (7) integral method [32]; (8) Corsi function method [21]; and (9) second derivative logarithmic (SDL) method, which determines VT at the minimum of the SD of logðIDÞ–Vg [31]; (10) linear cofactor difference operator [22] (LCDO) method, and (11) non-linear optimization [23,24]....
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IBM1
TL;DR: In this paper, a shift-and-ratio method for channel length extraction is presented, where channel mobility can be any function of gate voltage, and high source-drain resistance does not affect extraction results.
Abstract: A shift-and-ratio method for extracting MOSFET channel length is presented. In this method, channel mobility can be any function of gate voltage, and high source-drain resistance does not affect extraction results. It is shown to yield more accurate and consistent channel lengths for deep-submicrometer CMOS devices at room and low temperatures. It is also found that, for both nFET and pFET, the source-drain resistance is essentially independent of temperature from 300 to 77 K. >
219 citations
"A review of recent MOSFET threshold..." refers background in this paper
...Other approaches to eliminate the influence of parasitic series resistances are based on measuring the ID–Vg transfer characteristics of various devices having different mask channel lengths [38,39], or on measuring several devices connected together [40,41]....
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