A scalable and configurable Multiprocessor System-on-Chip (MPSoC) virtual platform for hardware and software co-design and co-verification
01 Nov 2015-pp 1-7
TL;DR: A scalable and configurable Multiprocessor System-on-Chip virtual platform for hardware and software co-design and co-verification in Electronic System Level (ESL) design, which includes the integration of an Instruction Set Simulator to the virtual platform and provides the hardware team a golden reference model that acts as the functional specification reference during hardware design and verification.
Abstract: This paper defines a scalable and configurable Multiprocessor System-on-Chip virtual platform for hardware and software co-design and co-verification in Electronic System Level (ESL) design. It includes the integration of an Instruction Set Simulator (ISS) to the virtual platform, Transaction Level Modeling (TLM), IP (Intellectual Property) block design in high level of abstraction, and hardware and software partitioning. The virtual platform has been tested to develop and successfully tested to develop and run an AES-128 encryption software. The architecture of the virtual platform consist of multiple ARM Cortex-M0 processor, bus-based and Mesh NoC (Network-on-Chip) architecture, and IP (peripherals) to support the system. Lotus-G displays its capability to fill the gap between hardware and software team in ESL design and verification flow. It provides the software team with a platform which enables them to start software development and testing early before the RTL platform is ready. The virtual platform also gives the hardware team a golden reference model that acts as the functional specification reference during hardware design and verification.
Citations
More filters
Dissertation•
18 Dec 2017
TL;DR: In this paper, the authors propose an approach based on SystemC/TLM for the simulation of the Internet des objects (IoO) in which objects connectes are composed of composants electroniques dedies, de processeurs and of codes logiciels.
Abstract: Le marche de l’Internet des Objets (IdO) est en pleine progression. Il va continuer a croitre et a se developper a un rythme soutenu dans les prochaines annees. Les objets connectes sont constitues de composants electroniques dedies, de processeurs et de codes logiciels. La conception de tels systemes constitue aujourd’hui un challenge au niveau industriel. Ce challenge est renforce par la concurrence du marche et le delai de commercialisation qui impactent directement sur le developpement d’un systeme. Le processus de conception actuel consiste en l’elaboration d’un cahier des charges. Dans un premier temps, l’equipe en charge du developpement materiel commence a developper le produit. Ensuite, la partie applicative peut etre mise au point par les developpeurs logiciels. Une fois le premier prototype materiel disponible, l’equipe logicielle peut alors integrer sa partie et tenter de la valider fonctionnellement. Cette etape peut mettre en lumiere des defauts dans le logiciel mais aussi lors de la conception materielle. Malheureusement,la decouverte ce type d’erreurs intervient beaucoup trop tard dans le processus de conception retardant la commercialisation du systeme. Afin de securiser au plus tot les developpements materiel et logiciel, des methodologies basees sur le standard SystemC/Transaction Level Modeling (TLM) ont ete proposees. Elles permettent de modeliser et de simuler du materiel. Durant les phases amont de conception d’un systeme, elles permettent de mettre en commun une version virtuelle du (futur) systeme entre les equipes logicielle et materielle. Cette version virtuelle est plus couramment appelee plateforme virtuelle. Elle permet de tester et de valider le plus tot possible lors du cycle de conception, de reduire le cout materiel en limitant la fabrication de prototypes, mais aussi de gagner du temps et donc de l’argent en diminuant les risques. Or, les objets integrent de plus en plus de fonctionnalites aux niveaux materiel et logiciel. Les besoins ayant evolue, le standard de simulation SystemC/TLM ne repond plus a l’heure actuelle a toutes les attentes. Ces attentes concernent plus particulierement les aspects lies a la simulation de systemes composes de nombreuses fonctionnalites, de protocoles de communication disparates mais aussi de modeles complexes et consommateur de temps pendant la simulation. Des activites de recherche ont deja ete menees sur ces sujets. Cependant, elles ont pour la plupart abouti a des solutions qui ne sont pas interoperables. Les solutions existantes ne permettent donc pas de beneficier de la reutilisation des modeles de la litterature. Afin de repondre a ces problemes,une solution permettant la configuration de modeles SystemC/TLM a ete recherchee. Cette derniere fait desormais partie du standard Configuration, Control and Inspection (CCI). Dans un second temps, la modelisation de protocoles de communication a un haut niveau d’abstraction(TLM Loosely Timed (LT) et Approximately Timed (AT)) a ete etudiee, et plus precisement des protocoles de type non bus. Une evolution du standard actuel permettant d’ameliorer le support,l’interoperabilite, la reutilisation a ete proposee dans le cadre de la these. Ensuite, une evolution du standard SystemC et plus precisement du comportement du noyau de simulation a ete etudiee pour supporter l’attente d’evenements asynchrones. Ce type d’evenement ouvre la voie a la parallelisation et la distribution de modeles sur differents threads / machines. Enfin, une solution permettant l’integration de modeles de Central Processing Units (CPU) integres dans QuickEMUlator (QEMU), un emulateur / virtualisateur de systeme, a ete etudiee. Finalement, toutes ces contributions ont ete associees a travers la modelisation d’un ensemble d’objets connectes a une passerelle.
9 citations
01 Oct 2019
TL;DR: Testing and evaluation show that the MPDFStego is capable of hiding the secret text into one or many PDF documents (s) and one of the steganography technique chosen in this research is the Least Significant Bit (LSB).
Abstract: Security is one important issue regarding data and information today. Steganography along with cryptography is used to hide and secure information. It is already an established practice to put watermark and to secure a single document using encryption. However, for large information requiring multiple documents has not received any attention. Here a program which can do steganography to multiple PDF documents to increase its steganography capacity is proposed, it is named MPDFStego. One of the steganography technique chosen in this research is the Least Significant Bit (LSB). LSB technique can be applied to Portable Document Format (PDF) by making use of its Tj Operator. Secret text is encrypted using Advanced Encryption Standard with 128-bit key size in Cipher Block Chaining (CBC) mode before it is embedded into the PDF document(s). Recompression and decompression of the PDF document(s) are done outside MPDFStego, with the help of QPDF tool. Testing and evaluation show that the MPDFStego is capable of hiding the secret text into one or many PDF documents (s).
4 citations
Cites background from "A scalable and configurable Multipr..."
...Recent studies on hardware simulation using virtual prototyping platform [14] and [15] enable early software development and system integration....
[...]
05 Nov 2018
3 citations
References
More filters
01 Jan 2005
351 citations
"A scalable and configurable Multipr..." refers background in this paper
...Interrupt function can be modeled in high level using tlm_analysis_port, to allow the interrupt signal to be propagated directly without having the need to wait for the end of its quantum [5]....
[...]
01 Jan 2011
34 citations
"A scalable and configurable Multipr..." refers background in this paper
...The architecture and configuration of the system such as computing power, processing speed, interconnect architecture, memory capacity and others will be based on the application designated to it [1]....
[...]
...Nowadays such scenario is no longer feasible given the long design lead-time, resulting in unacceptable delay on the deliverables to the market [1]....
[...]
01 Jan 2008
11 citations
"A scalable and configurable Multipr..." refers background in this paper
...The global time quantum can be redefined into a certain time unit, when it is necessary to attain more synchronization, the global time quantum can be set into smaller amount of time unit [11]....
[...]