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Proceedings ArticleDOI

A statistically rigorous approach for improving simulation methodology

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TLDR
This paper demonstrates the application of a rigorous statistical technique to the setup and analysis phases of the simulation process by applying a Plackett and Burman design to identify key processor parameters and classify benchmarks based on how they affect the processor.
Abstract
Due to cost, time, and flexibility constraints, simulators are often used to explore the design space when developing new processor architectures, as well as when evaluating the performance of new processor enhancements. However, despite this dependence on simulators, statistically rigorous simulation methodologies are not typically used in computer architecture research. A formal methodology can provide a sound basis for drawing conclusions gathered from simulation results by adding statistical rigor, and consequently, can increase confidence in the simulation results. This paper demonstrates the application of a rigorous statistical technique to the setup and analysis phases of the simulation process. Specifically, we apply a Plackett and Burman design to: (1) identify key processor parameters; (2) classify benchmarks based on how they affect the processor; and (3) analyze the effect of processor performance enhancements. Our technique expands on previous work by applying a statistical method to improve the simulation methodology instead of applying a statistical model to estimate the performance of the processor.

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The Design and Analysis of Experiments

TL;DR: This book by a teacher of statistics (as well as a consultant for "experimenters") is a comprehensive study of the philosophical background for the statistical design of experiment.
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Efficiently exploring architectural design spaces via predictive modeling

TL;DR: This work builds accurate, confident predictive design-space models that produce highly accurate performance estimates for other points in the space, can be queried to predict performance impacts of architectural changes, and are very fast compared to simulation, enabling efficient discovery of tradeoffs among parameters in different regions.
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A characterization of the Rodinia benchmark suite with comparison to contemporary CMP workloads

TL;DR: Recent extensions to Rodinia are presented and a detailed characterization of the Rodinia benchmarks are conducted, showing that many of the workloads in Rodinia and Parsec are complementary, capturing different aspects of certain performance metrics.
Proceedings ArticleDOI

Informed Microarchitecture Design Space Exploration Using Workload Dynamics

TL;DR: This paper proposes accurate and efficient techniques and models to reason about workload dynamics across the microarchitecture design space without using detailed cycle- level simulations and demonstrates that the proposed techniques can be used to efficiently explore workload scenario-driven architecture optimizations.
Proceedings ArticleDOI

Analysis of redundancy and application balance in the SPEC CPU2006 benchmark suite

TL;DR: This paper analyzes the SPEC CPU2006 benchmarks using performance counter based experimentation from several state of the art systems, and uses statistical techniques such as principal component analysis and clustering to draw inferences on the similarity of the benchmarks and the redundancy in the suite and arrive at meaningful subsets.
References
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Journal Article

The Design and Analysis of Experiments

TL;DR: This book by a teacher of statistics (as well as a consultant for "experimenters") is a comprehensive study of the philosophical background for the statistical design of experiment.
Journal ArticleDOI

The design of optimum multifactorial experiments

R. L. Plackett, +1 more
- 01 Jun 1946 - 
Journal ArticleDOI

The SimpleScalar tool set, version 2.0

TL;DR: This document describes release 2.0 of the SimpleScalar tool set, a suite of free, publicly available simulation tools that offer both detailed and high-performance simulation of modern microprocessors.
Journal ArticleDOI

The Alpha 21264 microprocessor

R.E. Kessler
- 01 Mar 1999 - 
TL;DR: A unique combination of high clock speeds and advanced microarchitectural techniques, including many forms of out-of-order and speculative execution, provide exceptional core computational performance in the 21264.
Journal ArticleDOI

The Mips R10000 superscalar microprocessor

K.C. Yeager
- 01 Apr 1996 - 
TL;DR: The Mips R10000 is a dynamic, superscalar microprocessor that implements the 64-bit Mips 4 instruction set architecture that fetches and decodes four instructions per cycle and dynamically issues them to five fully-pipelined, low-latency execution units.
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