A survey of synchronous RAM architectures
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Cites background from "A survey of synchronous RAM archite..."
...read or write This section is concluded by an overview of available RAM types A more thorough discussion can be found in [66] Only the most recent RAMs with a synchronous interface are considered in this section...
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Cites methods from "A survey of synchronous RAM archite..."
...Fast-Page Mode (FPM) DRAM, Extended Data Out (EDO) DRAM, Synchronous DRAM (SDRAM), Double Data Rate (DDR) SDRAM and Enhanced SDRAM (ESDRAM) [52] represent a straightforward evolutionary technology path of advances to how the DRAM is accessed and of caching within the DRAM device from the basic design of an array of memory cells [53,54]....
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References
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"A survey of synchronous RAM archite..." refers methods in this paper
...In addition, the coupling of reconfigurable logic and DRAMs is investigated in reconfigurable architecture DRAMs (RADRAM [57]) and was considered in the transit project [6]....
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163 citations
"A survey of synchronous RAM archite..." refers methods in this paper
...This parameter can be determined from the tCAC and tCWD times given in a RDRAM data sheet and from tRWD in the SLDRAM case. tRAW: (not drawn in Fig....
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...This parameter is called tCWD in a RDRAM data sheet and tPW in a SLDRAM data sheet. tREF: The maximal refresh interval of the whole memory chip is specified by this value....
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...The length is fixed for RDRAMs (eight items, 16 bit each) and may be set to four or eight items (16 bit) individually for each data packet in the SLDRAM case. tWAR: This is the minimal write-after-read operation delay....
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...RDRAM [5], [60, 18, 19, 20, 73] is a memory specification developed by Rambus Inc....
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...This parameter is called tRC in the RDRAM data sheet and tRC1 in the SLDRAM specification. tAAI: (not drawn in Fig....
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146 citations
"A survey of synchronous RAM archite..." refers methods in this paper
..., intelligent RAM (IRAM [58]), parallel processing RAM (PPRAM [54]), and computing RAM (CRAM [11]) are concepts to integrate RAM with logic circuits....
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