A theory of transistor cutoff frequency (f T ) falloff at high current densities
TL;DR: In this paper, it was shown that the observed falloff in the f T of a transistor at high currents is due to the spreading of the neutral base layer into the collector region of the device at high current densities.
Abstract: It is shown that the observed falloff in the f T of a transistor at high currents is due to the spreading of the neutral base layer into the collector region of the device at high current densities. The base layer spreading mechanism derives from an analysis of the effect of the current-dependent buildup of the mobile-carrier space-charge density in the collector transition layer. Calculations show that at sufficiently high collector current levels, the mobile space-charge density in the collector transition layer cannot be considered negligible in comparison to the fixed charge density of that region. The over-all effect of taking the mobile space charge into account in analyzing the collector transition region is that, at high current densities, the transition region boundary adjacent to the neutral base layer is displaced toward the collector metal contact with increasing collector current. The attendant widening of the neutral base layer results in the observed, high-current falloff in f T . The application of this theory to transistor structures of both the alloy and mesa variety yields, in each case, calculated curves of f T vs I c which are in reasonably good agreement with experiment.
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IBM1
TL;DR: In this article, the authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices.
Abstract: Learn the basic properties and designs of modern VLSI devices, as well as the factors affecting performance, with this thoroughly updated second edition. The first edition has been widely adopted as a standard textbook in microelectronics in many major US universities and worldwide. The internationally-renowned authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices. Equations and parameters provided are checked continuously against the reality of silicon data, making the book equally useful in practical transistor design and in the classroom. Every chapter has been updated to include the latest developments, such as MOSFET scale length theory, high-field transport model, and SiGe-base bipolar devices.
2,680 citations
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TL;DR: In this paper, a self-consistent iterative scheme for the numerical calculation of dc potentials and currents in a one-dimensional transistor model is presented, where boundary conditions are applied only at points representing contacts.
Abstract: A self-consistent iterative scheme for the numerical calculation of dc potentials and currents in a one-dimensional transistor model is presented. Boundary conditions are applied only at points representing contacts. Input data are: doping profile, parameters governing excess carrier recombination, parameters describing the dependence of mobility on doping and on electric field, applied emitter and collector voltages, and a trial solution for the electrostatic potential. The major limitation of the present approach results from use of Boltzmann rather than Fermi statistics. Convergence of the iteration scheme is good for low and moderate injection levels.
1,128 citations
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TL;DR: A compact model of bipolar transistors suitable for network analysis computer programs is presented, through the use of a new charge control relation linking junction voltages, collector current, and base charge, which substantially exceeds that of existing models of comparable complexity.
Abstract: We present in this paper a compact model of bipolar transistors, suitable for network analysis computer programs. Through the use of a new charge control relation linking junction voltages, collector current, and base charge, the model includes high injection effects. The performance substantially exceeds that of existing models of comparable complexity. For low bias and with some additional idealization, the model reduces to the conventional Ebers-Moll model.
635 citations
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TL;DR: In this paper, design aspects of high-speed digital and analog IC's are discussed which allow the designer to exhaust the high speed potential of advanced Si-bipolar technologies, starting from the most promising circuit concepts and an adequate resistance level, the dimensions of individual transistors in the IC's must be optimized very carefully using advanced transistor models.
Abstract: In this paper, design aspects of high-speed digital and analog IC's are discussed which allow the designer to exhaust the high-speed potential of advanced Si-bipolar technologies. Starting from the most promising circuit concepts and an adequate resistance level, the dimensions of the individual transistors in the IC's must be optimized very carefully using advanced transistor models. It is shown how the bond inductances can be favourably used to improve circuit performance and how the critical on-chip wiring must be taken into account. Moreover, special modeling aspects and ringing problems, caused by emitter followers, are discussed. An inexpensive mounting technique is presented which proved to be well suited up to 50 Gb/s, the highest data rate ever achieved in any IC technology. The suitability of the design aspects discussed is confirmed by measurements of digital circuits and broadband amplifiers developed for 10 and 40 Gb/s optical-fiber links.
284 citations
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TL;DR: In this article, a method for solving numerically the two-dimensional (2D) semiconductor steady-state transport equations is described, where Poisson's equation and the two continuity equations are discretized on two networks of different rectangular meshes.
Abstract: A method for solving numerically the two-dimensional (2D) semiconductor steady-state transport equations is described. The principles of this method have been published earlier [1]. This paper discusses in detail the method and a number of considerable improvements. Poisson's equation and the two continuity equations are discretized on two networks of different rectangular meshes. The 2D continuity equations are approximated by a set of difference equations assuming that the hole and electron current density components along the meshlines are constant between two neighboring meshpoints in a way similar to that used by Gummel and Scharfetter [2] for the one-dimensional (1D) continuity equations. The resulting difference approximations have generally a much larger validity range than the conventional difference formulations where it is assumed that the change in electrostatic potential between two neighboring points is small compared with k T/q . Therefore, a much smaller number of meshpoints is necessary than for the conventional difference approximations. This reduces considerably the computation time and the required memory space. It will be shown that the matrix of the coefficients of this set of difference equations is always positive definite. This is an important property and guarantees convergence and stability of the numerical solution of the continuity equations. The way in which the difference approximations for the continuity equations are derived gives directly consistent expressions for the current densities that can be used for calculating the currents. In order to demonstrate the kind of solutions obtainable, steady-state results for a bipolar n-p-n silicon transistor are presented and discussed.
196 citations
Cites background from "A theory of transistor cutoff frequ..."
...Particularly for high current densities when base widening occurs (see, e.g., [ 18 ]; [19]), current and voltage dependent current spreading takes p,lace directly behind the emitter-base junction (see Section VII)....
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References
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TL;DR: The theory of potential distribution and rectification for p-n junctions is developed with emphasis on germanium, resulting in an admittance for a simple case varying as (1 + iωτ p )1/2 where τ p is the lifetime of a hole in the n-region.
Abstract: In a single crystal of semiconductor the impurity concentration may vary from p-type to n-type producing a mechanically continuous rectifying junction. The theory of potential distribution and rectification for p-n junctions is developed with emphasis on germanium. The currents across the junction are carried by the diffusion of holes in n-type material and electrons in p-type material, resulting in an admittance for a simple case varying as (1 + iωτ p )1/2 where τ p is the lifetime of a hole in the n-region. Contact potentials across p-n junctions, carrying no current, may develop when hole or electron injection occurs. The principles and theory of a p-n-p transistor are described.
1,844 citations
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TL;DR: In this paper, the field dependence of mobility has been determined for electrons and holes in both germanium and silicon, and the observed critical field at 298\ifmmode^\circ\else\textdegree\fi{}K beyond which $\ensuremath{\mu}$ varies as ${E}^{-}\frac{1}{2}}$.
Abstract: The field dependence of mobility has been determined for electrons and holes in both germanium and silicon. The observed critical field at 298\ifmmode^\circ\else\textdegree\fi{}K beyond which $\ensuremath{\mu}$ varies as ${E}^{\ensuremath{-}\frac{1}{2}}$ is 900 volts/cm for $n$-type germanium, 1400 volts/cm for $p$-type germanium, 2500 volts/cm for $n$-type silicon, and 7500 volts/cm for $p$-type silicon. These values of critical field are between two to four times those calculated on the basis of spherical constant energy surfaces in the Brillouin zone. A saturation drift velocity of ${6(10)}^{6}$ cm/sec is observed in germanium which is in good agreement with predictions based on scattering by the optical modes. Data on $n$-type germanium at 20\ifmmode^\circ\else\textdegree\fi{}K show a range over which impurity scattering decreases and the mobility increases with field until lattice scattering dominates as at the higher temperatures.
292 citations
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230 citations
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01 Jan 1956TL;DR: In this article, a method of analyzing transistor behavior for any base-layer impurity distribution is presented, in particular expressions for emitter efficiency, transverse sheet resistance R, transit time, and frequency cut-off f?.
Abstract: This paper presents a method of analyzing transistor behavior for any base-layer impurity distribution. In particular, expressions are derived for emitter efficiency ?, transverse sheet resistance R, transit time ?, and frequency cut-off f?. The parameters ? and R are functions only of the total number of impurities in the base layer. The analysis is used to derive ?, R, ? and f? for four different distributions-uniform, linear, exponential, and complementary error function. For each of these distributions a transistor base-layer design equivalent in R and f? is obtained. Comparison shows that for equivalent parameters the nonuniform distributions permit the use of wider base layers, but require greater maximum impurity concentrations and must be operated at high current densi
160 citations
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01 Dec 1958TL;DR: In this article, the authors compared the power gain of the junction triode with those of the field effect transistor and the analog transistor and showed that the gain-band product is nearly independent of the particular alpha cutoff frequency selected.
Abstract: This paper discusses some fundamental frequency limitations of the junction triode. It also describes briefly practical accomplishments with germanium diffused base transistors of the type reported by Lee. Finally, the frequency limitations of the junction triode are compared with those of the field effect transistor and the analog transistor. For transistors of the mesa type with linear emitter and base electrodes (i.e., an emitter stripe with parallel base contact stripes a fraction of the emitter width distant on each side), the (power gain)?(bandwidth) product is found to be about 7.5 × 106/s cps where s is emitter stripe width in centimeters. This is an order of magnitude better than the corresponding figures for field effect and analog transistors. For operation at or below the alpha cutoff fre quency, the gain-band product is shown to be nearly independent of the particular alpha cutoff frequency selected. This independence arises from the reciprocity between collector depletion layer capaci tance per unit area and collector depletion layer transit time. This transit time effectively determines alpha cutoff frequency in optimunm gain-band designs.
73 citations