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Journal ArticleDOI

Academic and industry research progress in germanium nanodevices

Ravi Pillarisetty1
17 Nov 2011-Nature (Nature Publishing Group)-Vol. 479, Iss: 7373, pp 324-328
TL;DR: Germanium-based transistors have the potential to operate at high speeds with low power requirements and might therefore be used in non-silicon-based semiconductor technology in the future.
Abstract: Silicon has enabled the rise of the semiconductor electronics industry, but it was not the first material used in such devices. During the 1950s, just after the birth of the transistor, solid-state devices were almost exclusively manufactured from germanium. Today, one of the key ways to improve transistor performance is to increase charge-carrier mobility within the device channel. Motivated by this, the solid-state device research community is returning to investigating the high-mobility material germanium. Germanium-based transistors have the potential to operate at high speeds with low power requirements and might therefore be used in non-silicon-based semiconductor technology in the future.
Citations
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Journal ArticleDOI
TL;DR: Detailed electrical characterization of a high-κ epitaxial oxide gate stack based on crystalline SrHfO3 grown on Ge by atomic layer deposition shows extremely low gate leakage, small and scalable EOT, and good and reducible D(it).
Abstract: Germanium (Ge)-based metal–oxide–semiconductor field-effect transistors are a promising candidate for high performance, low power electronics at the 7 nm technology node and beyond. However, the availability of high quality gate oxide/Ge interfaces that provide low leakage current density and equivalent oxide thickness (EOT), robust scalability, and acceptable interface state density (Dit) has emerged as one of the most challenging hurdles in the development of such devices. Here we demonstrate and present detailed electrical characterization of a high-κ epitaxial oxide gate stack based on crystalline SrHfO3 grown on Ge (001) by atomic layer deposition. Metal–oxide–Ge capacitor structures show extremely low gate leakage, small and scalable EOT, and good and reducible Dit. Detailed growth strategies and postgrowth annealing schemes are demonstrated to reduce Dit. The physical mechanisms behind these phenomena are studied and suggest approaches for further reduction of Dit.

9 citations

Journal ArticleDOI
TL;DR: In this article, the authors demonstrate that wet-chemical surface bromination is an effective and simple etching method for Ge surface oxide removal, providing excellent reoxidation resistance.
Abstract: We demonstrate that wet-chemical surface bromination is an effective and a simple etching method for Ge surface oxide removal, providing excellent reoxidation resistance. Oxide removal and halide passivation for n-type Ge (100) were investigated using time-resolved photoluminescence and X-ray photoemission spectroscopy (XPS). In contrast to HCl, HBr treated Ge surfaces show a strong decrease in minority carrier lifetime, pointing to a surface state spectrum modification. The results from XPS using in situ sample preparation confirm that HBr effectively removes GeO2 and suboxides, providing an air stable surface. Isopropyl alcohol rinsing after Br passivation maintains the chemical surface composition and the electronic structure. In contrast, during H2O treatment in an Ar atmosphere, the brominated Ge surface is unstable, evidenced by emerging Ge-OH groups. The distinct observed upward shift of the surface Fermi level indicates an e- donating behavior of H2O.

9 citations

Journal ArticleDOI
TL;DR: In this article, the authors reported an enhanced performance of flexible titanium nitride/germanium-tin (TiN/GeSn) photodetectors (PDs) with an extended photoderivergence range based on sub-bandgap absorption.
Abstract: We report an enhanced performance of flexible titanium nitride/germanium-tin (TiN/GeSn) photodetectors (PDs) with an extended photodetection range based on sub-bandgap absorption. Single-crystalline GeSn membranes transfer-printed on poly(ethylene terephthalate) are integrated with plasmonic TiN to form a TiN/GeSn heterojunction. Formation of the heterojunction creates a Schottky contact between the TiN and GeSn. A Schottky barrier height of 0.49 eV extends the photodetection wavelength to 2530 nm and further enhances the light absorption capability within the detection range. In addition, finite-difference time-domain simulation proves that the integration of TiN and GeSn could enhance average absorption from 0.13 to 0.33 in the near-infrared (NIR) region (e.g., 1400-2000 nm) and more than 70% of light is absorbed in TiN. The responsivity of the fabricated TiN/GeSn PDs is increased from 30 to 148.5 mA W-1 at 1550 nm. There is also an ∼180 nm extension in the optical absorption wavelength of the flexible TiN/GeSn PD. The enhanced performance of the device is attributed to the absorption and separation of plasmonic hot carriers via TiN and the TiN/GeSn junction, respectively. The effect of external uniaxial strain is also investigated. A tensile strain of 0.3% could further increase the responsivity from 148.5 to 218 mA W-1, while it is decreased to 102 mA W-1 by 0.25% compressive strain. In addition, the devices maintain stable performance after multiple and long bending cycles. Our results provide a robust and cost-effective method to extend the NIR photodetection capability of flexible group IV PDs.

9 citations

Journal ArticleDOI
TL;DR: In this article, the structural modifications induced during the recrystallization and the related dopant diffusion were first investigated, showing that P doping results in a lattice expansion, with a perpendicular lattice strain per atom βPs = +0.7 ± 0.1 A3.
Abstract: Laser Thermal Annealing (LTA) at various energy densities was used to recrystallize and activate amorphized germanium doped with phosphorous by ion implantation. The structural modifications induced during the recrystallization and the related dopant diffusion were first investigated. After LTA at low energy densities, the P electrical activation was poor while the dopant distribution was mainly localized in the polycrystalline Ge resulting from the anneal. Conversely, full dopant activation (up to 1 × 1020 cm−3) in a perfectly recrystallized material was observed after annealing at higher energy densities. Measurements of lattice parameters performed on the fully activated structures show that P doping results in a lattice expansion, with a perpendicular lattice strain per atom βPs = +0.7 ± 0.1 A3. This clearly indicates that, despite the small atomic radius of P compared to Ge, the “electronic contribution” to the lattice parameter modification (due to the increased hydrostatic deformation potential in the conduction band of P doped Ge) is larger than the “size mismatch contribution” associated with the atomic radii. Such behavior, predicted by theory, is observed experimentally for the first time, thanks to the high sensitivity of the measurement techniques used in this work.

9 citations

Journal ArticleDOI
TL;DR: In this paper, the structural stability order and electronic properties of the transition metal M@Ge12 (M = Co, Pd, Tc, and Zr) doped germanium cage has been carried out at B3LYP/LANL2DZ ECP level by using spin polarized density functional theory.

9 citations

References
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Proceedings ArticleDOI
01 Dec 2007
TL;DR: In this paper, a 45 nm logic technology is described that for the first time incorporates high-k + metal gate transistors in a high volume manufacturing process, resulting in the highest drive currents yet reported for NMOS and PMOS.
Abstract: A 45 nm logic technology is described that for the first time incorporates high-k + metal gate transistors in a high volume manufacturing process. The transistors feature 1.0 nm EOT high-k gate dielectric, dual band edge workfunction metal gates and third generation strained silicon, resulting in the highest drive currents yet reported for NMOS and PMOS. The technology also features trench contact based local routing, 9 layers of copper interconnect with low-k ILD, low cost 193 nm dry patterning, and 100% Pb-free packaging. Process yield, performance and reliability are demonstrated on 153 Mb SRAM arrays with SRAM cell size of 0.346 mum2, and on multiple microprocessors.

973 citations

Proceedings ArticleDOI
08 Dec 2003
TL;DR: In this article, the authors describe a novel strained transistor architecture which is incorporated into a 90nm logic technology on 300mm wafers, which features an epitaxially grown strained SiGe film embedded in the source drain regions.
Abstract: This paper describes the details of a novel strained transistor architecture which is incorporated into a 90nm logic technology on 300mm wafers The unique strained PMOS transistor structure features an epitaxially grown strained SiGe film embedded in the source drain regions Dramatic performance enhancement relative to unstrained devices are reported These transistors have gate length of 45nm and 50nm for NMOS and PMOS respectively, 12nm physical gate oxide and Ni salicide World record PMOS drive currents of 700/spl mu/A//spl mu/m (high V/sub T/) and 800/spl mu/A//spl mu/m (low V/sub T/) at 12V are demonstrated NMOS devices exercise a highly tensile silicon nitride capping layer to induce tensile strain in the NMOS channel region High NMOS drive currents of 126mA//spl mu/m (high VT) and 145mA//spl mu/m (low VT) at 12V are reported The technology is mature and is being ramped into high volume manufacturing to fabricate next generation Pentium/spl reg/ and Intel/spl reg/ Centrino/spl trade/ processor families

729 citations

Journal ArticleDOI
TL;DR: In this paper, a method of controlling threading dislocation densities in Ge on Si involving graded SiGe layers and chemical-mechanical polishing (CMP) is presented.
Abstract: A method of controlling threading dislocation densities in Ge on Si involving graded SiGe layers and chemical-mechanical polishing (CMP) is presented. This method has allowed us to grow a relaxed graded buffer to 100% Ge without the increase in threading dislocation density normally observed in thick graded structures. This sample has been characterized by transmission electron microscopy, etch-pit density, atomic force microscopy, Nomarski optical microscopy, and triple-axis x-ray diffraction. Compared to other relaxed graded buffers in which CMP was not implemented, this sample exhibits improvements in threading dislocation density and surface roughness. We have also made process modifications in order to eliminate particles due to gas-phase nucleation and cracks due to thermal mismatch strain. We have achieved relaxed Ge on Si with a threading dislocation density of 2.1×106 cm−2, and we expect that further process refinements will lead to lower threading dislocation densities on the order of bulk Ge su...

620 citations

Journal ArticleDOI
Yoshiki Kamata1
TL;DR: In this article, the opportunities and challenges of high-k/Ge MOSFETs are discussed on the basis of the material properties of Ge oxide to provide insights for future progress.

443 citations