Journal ArticleDOI
Academic and industry research progress in germanium nanodevices
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TLDR
Germanium-based transistors have the potential to operate at high speeds with low power requirements and might therefore be used in non-silicon-based semiconductor technology in the future.Abstract:
Silicon has enabled the rise of the semiconductor electronics industry, but it was not the first material used in such devices. During the 1950s, just after the birth of the transistor, solid-state devices were almost exclusively manufactured from germanium. Today, one of the key ways to improve transistor performance is to increase charge-carrier mobility within the device channel. Motivated by this, the solid-state device research community is returning to investigating the high-mobility material germanium. Germanium-based transistors have the potential to operate at high speeds with low power requirements and might therefore be used in non-silicon-based semiconductor technology in the future.read more
Citations
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Journal ArticleDOI
Sub-10 nm two-dimensional transistors: Theory and experiment
Ruge Quhe,Lin Xu,Shiqi Liu,Chen Yang,Yangyang Wang,Hong Li,Jie Yang,Qiuhui Li,Bowen Shi,Ying Li,Yuanyuan Pan,Xiaotian Sun,Jingzhen Li,Mouyi Weng,Han Zhang,Ying Guo,Linqiang Xu,Hao Tang,Jichao Dong,Jinbo Yang,Zhiyong Zhang,Ming Lei,Feng Pan,Jing Lu +23 more
TL;DR: In this paper, the authors introduce the recent experimental and ab initio quantum transport simulation progress in the 2D FETs with a gate length less than 10nm and outline the challenges and outlook on the future development directions in the sub-10-nm 2D tunneling FET.
Journal ArticleDOI
Next Generation Device Grade Silicon-Germanium on Insulator
Callum G. Littlejohns,Milos Nedeljkovic,Christopher F. Mallinson,John F. Watts,Goran Z. Mashanovich,Graham T. Reed,Frederic Y. Gardes +6 more
TL;DR: A rapid melt growth technique enables the fabrication of multiple single crystal silicon-germanium-on-insulator layers of different compositions, on the same Si wafer, using only a single deposition process and a single anneal process, simply by modifying the structural design and/or theAnneal temperature.
Journal ArticleDOI
Strengthening brittle semiconductor nanowires through stacking faults: Insights from in situ mechanical testing
Bin Chen,Jun Wang,Qiang Gao,Yujie Chen,Xiaozhou Liao,Chunsheng Lu,Hark Hoe Tan,Yiu-Wing Mai,Jin Zou,Simon P. Ringer,Huajian Gao,Chennupati Jagadish +11 more
TL;DR: Interestingly, wurtzite Nanowires with a high density of stacking faults fail at a very high compressive stress of ~9.0 GPa, demonstrating that the nanowires can be strengthened through defect engineering.
Journal ArticleDOI
High-efficiency normal-incidence vertical p - i - n photodetectors on a germanium-on-insulator platform
TL;DR: In this paper, a normal incidence vertical p-i-n photodetectors on a germanium-on-insulator (GOI) platform were demonstrated.
Journal ArticleDOI
Strain engineering and mechanical assembly of silicon/germanium nanomembranes
TL;DR: In this article, a review of the recent progress in strain engineering and mechanical assembly of semiconductor NMs is presented, ranging from fundamental principles to device applications, with a focus on Si/Ge NMs.
References
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Proceedings ArticleDOI
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