Adaptive Transport in High Performance (I on), Steep Sub-Threshold Slope (SS < 60 mV/dec) MoS2 Transistors
15 Oct 2019-IEEE Transactions on Nanotechnology (Institute of Electrical and Electronics Engineers (IEEE))-Vol. 18, pp 1071-1078
TL;DR: In this paper, a dual-gated multilayer MoS 1/2-layer FET is proposed to combine the advantages of a tunnel FET (steep subthreshold slope) and a high ON current in the same device, which is capable of operating in two distinct regimes (i) a low power tunnelling regime with steep SS and operational voltages <; 0.5 V, OR (ii) a high mobility and I
Abstract: We demonstrate a rendition of an `ideal' low power transistor, by combining the advantages of a tunnel FET (steep subthreshold slope (SS <; 60 mV/dec)) with that of a thermionic FET (high ON current) in the same device. A dual-gated multilayer MoS
2
FET is fabricated keeping in view independent gate control and careful deliberation of device architecture and materials processing. This device is capable of operating in two distinct regimes (i) A low power tunnelling regime with steep SS and operational voltages <; 0.5 V OR (ii) A high mobility and I
on
, thermionic regime. Second, an intuitive modification in the device structure can dynamically tune the threshold voltage (V
th
) and transport from OFF (tunnelling) to ON (thermionic) state, yielding the dual benefits of tunnelling and thermionic transport in the same operational cycle. The devices demonstrate hysteresis-free, steep SS (SS
min
3.4 mV/dec and SS
avg
29.3 mV/dec for 3 dec) and high mobility/Ion (100 cm
2
V
-1
s
-1
/0.16 μA μm
-1
) at an ultra-scaled Vds of 10 mV. To gather further insight into the transport mechanism of these devices, temperature dependent analysis of SS and Ion is presented, and explained using a simple semi-classical model.
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05 Mar 2020
TL;DR: The multiple TFET device structures are examined and compared their performances for attaining the desired ION/IOFF and higher transconductance per bias current than MOSFET.
Abstract: Tunnel FET(TFET) can provide ultra-low quiescent (~pA) current. Some of the essential parameters for determining the characteristics of TFET are high I ON current, constrained Subthreshold slope value, and reduced ambipolar leakage. TFET experiences a sub-threshold decrease of less than 60mV/decade in the process of the sub-threshold slope and hence higher transconductance per bias current than MOSFET. This article would be beneficial to get a review of various device structures and their performances of Tunnel FET. In this paper, we examined the multiple TFET device structures and compared their performances for attaining the desired I ON /I OFF .
4 citations
TL;DR: In this paper, the authors compare molybdenum sulphoselenide (MoS2(1-x)Se2x) alloys, MoS1Se1 and MoS0.4Se1.6, and demonstrate n-channel field effect transistors (FETs) with SiO2 and high-k HfO2 as gate dielectrics, and show tunability in threshold voltage, subthreshold slope, drain current, and mobility.
Abstract: Ultra-thin channel materials with excellent tunability of their electronic properties are necessary for the scaling of electronic devices. Two-dimensional materials such as transition metal dichalcogenides (TMDs) are ideal candidates for this due to their layered nature and great electrostatic control. Ternary alloys of these TMDs show composition-dependent electronic structure, promising excellent tunability of their properties. Here, we systematically compare molybdenum sulphoselenide (MoS2(1-x)Se2x) alloys, MoS1Se1and MoS0.4Se1.6. We observe variations in strain and carrier concentration with their composition. Using them, we demonstrate n-channel field-effect transistors (FETs) with SiO2and high-k HfO2as gate dielectrics, and show tunability in threshold voltage, subthreshold slope, drain current, and mobility. MoS1Se1shows better promise for low-power FETs with a minimum subthreshold slope of 70 mV/dec, whereas MoS0.4Se1.6, with its higher mobility, is suitable for faster operations. Using HfO2as gate dielectric, there is an order of magnitude reduction in interface traps and 2x improvement in mobility and drain current, compared to SiO2. In contrast to MoS2, the FETs on HfO2also display enhancement-mode operation, making them better suited for CMOS applications.
References
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TL;DR: Tunnels based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal–oxide–semiconductor transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.
Abstract: Power dissipation is a fundamental problem for nanoelectronic circuits. Scaling the supply voltage reduces the energy needed for switching, but the field-effect transistors (FETs) in today's integrated circuits require at least 60 mV of gate voltage to increase the current by one order of magnitude at room temperature. Tunnel FETs avoid this limit by using quantum-mechanical band-to-band tunnelling, rather than thermal injection, to inject charge carriers into the device channel. Tunnel FETs based on ultrathin semiconducting films or nanowires could achieve a 100-fold power reduction over complementary metal-oxide-semiconductor (CMOS) transistors, so integrating tunnel FETs with CMOS technology could improve low-power integrated circuits.
2,390 citations
TL;DR: By replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation.
Abstract: It is well-known that conventional field effect transistors (FETs) require a change in the channel potential of at least 60 mV at 300 K to effect a change in the current by a factor of 10, and this minimum subthreshold slope S puts a fundamental lower limit on the operating voltage and hence the power dissipation in standard FET-based switches. Here, we suggest that by replacing the standard insulator with a ferroelectric insulator of the right thickness it should be possible to implement a step-up voltage transformer that will amplify the gate voltage thus leading to values of S lower than 60 mV/decade and enabling low voltage/low power operation. The voltage transformer action can be understood intuitively as the result of an effective negative capacitance provided by the ferroelectric capacitor that arises from an internal positive feedback that in principle could be obtained from other microscopic mechanisms as well. Unlike other proposals to reduce S, this involves no change in the basic physics of the FET and thus does not affect its current drive or impose other restrictions.
1,722 citations
TL;DR: This simulation results show that while MoS(2) transistors may not be ideal for high-performance applications due to heavier electron effective mass and a lower mobility, they can be an attractive alternative for low power applications thanks to the large band gap and the excellent electrostatic integrity inherent in a two-dimensional system.
Abstract: Monolayer molybdenum disulfide (MoS2), unlike its bulk form, is a direct band gap semiconductor with a band gap of 1.8 eV. Recently, field-effect transistors have been demonstrated experimentally using a mechanically exfoliated MoS2 monolayer, showing promising potential for next generation electronics. Here we project the ultimate performance limit of MoS2 transistors by using nonequilibrium Green’s function based quantum transport simulations. Our simulation results show that the strength of MoS2 transistors lies in large ON–OFF current ratio (>1010), immunity to short channel effects (drain-induced barrier lowering ∼10 mV/V), and abrupt switching (subthreshold swing as low as 60 mV/decade). Our comparison of monolayer MoS2 transistors to the state-of-the-art III–V materials based transistors, reveals that while MoS2 transistors may not be ideal for high-performance applications due to heavier electron effective mass (m* = 0.45m0) and a lower mobility, they can be an attractive alternative for low power...
1,397 citations
"Adaptive Transport in High Performa..." refers background in this paper
...45) in MoS2, often faulted for lower mobility [34], aids in efficient tunnelling and steep sub-threshold slope [35]....
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25 Oct 2010
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Abstract: Steep subthreshold swing transistors based on interband tunneling are examined toward extending the performance of electronics systems. In particular, this review introduces and summarizes progress in the development of the tunnel field-effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges. The promise of the TFET is in its ability to provide higher drive current than the MOSFET as supply voltages approach 0.1 V.
1,389 citations
TL;DR: Molybdenum disulfide (MoS2) transistors with a 1-nm physical gate length using a single-walled carbon nanotube as the gate electrode are demonstrated, which exhibit excellent switching characteristics with near ideal subthreshold swing of ~65 millivolts per decade and an On/Off current ratio of ~106.
Abstract: Scaling of silicon (Si) transistors is predicted to fail below 5-nanometer (nm) gate lengths because of severe short channel effects. As an alternative to Si, certain layered semiconductors are attractive for their atomically uniform thickness down to a monolayer, lower dielectric constants, larger band gaps, and heavier carrier effective mass. Here, we demonstrate molybdenum disulfide (MoS2) transistors with a 1-nm physical gate length using a single-walled carbon nanotube as the gate electrode. These ultrashort devices exhibit excellent switching characteristics with near ideal subthreshold swing of ~65 millivolts per decade and an On/Off current ratio of ~106 Simulations show an effective channel length of ~3.9 nm in the Off state and ~1 nm in the On state.
1,078 citations
"Adaptive Transport in High Performa..." refers background in this paper
...Superior electrostatics inherent to two-dimensional semiconductors such as MoS2 offers promising solutions for the next generation of ultra-scaled FETs [11]–[14]....
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...(a) 2D materials enable excellent electrostatic control and as a result these transistors can be scaled to very small channel lengths with minimal short channel effects [12]–[14] (b) the...
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