Advanced scanning probe lithography
Summary (2 min read)
Introduction
- 4, 8803 Rueschlikon, Switzerland 3. School of Physics, Georgia Institute of Technology, Atlanta, GA, USA.
- Here, the authors review the fundamentals of scanning probe lithography and its use in materials science and nanotechnology.
- The success of many of the above applications relies on the existence of suitable nanolithography approaches.
- Scanning probe lithographies can be either classified by emphasizing the distinction between the general nature of the process, chemical versus physical, or by considering if SPL implies the removal or addition of material.
Challenges in nanoscale lithography
- The workhorse of large volume CMOS fabrication, optical lithography at a wavelength of 192 nm, has reached the physical limits in terms of minimal achievable pitch of a single patterning run of about 80 nm.
- Economic reasons dictate throughputs of more than 100 wafers/h corresponding to >10 12 µm 2 /h for high volume production techniques (Fig. 2a).
- This mask-based highvolume lithography environment needs of accompanying techniques for flexible low- volume production, mask fabrication and prototyping of the next generation devices.
- At high resolutions the trade-off between resolution and throughput is determined by the sustainable beam current and resist sensitivity.
- Recent developments for ambient atmosphere have shown that some scanning probe nanolithography approaches could also be competitive in terms of resolution, throughput and versatility of the materials that can be patterned.
Thermal and Thermochemical SPL
- Thermal scanning probe lithography (t-SPL) was first developed for data storage purposes in the early 90s 23 .
- For sharp tips with radii on the order of 5 nm, and polymer films thicker than the lateral size of the contact, the temperature of the heater is reduced by about a factor of two at the polymer surface.
- In t-SPL 26,27 either molecular glass resists 4 or the thermally responsive polymer polyphthalaldehyde (PPA) 28 are used as substrate, and they perform exceptionally well for topographic patterning.
- Field effect transistors have also been demonstrated by using these nanowires.
- An example is shown in Figure 4a depicting the final topographical pattern imaged during the closed loop writing process.
Bias-induced SPL
- Force microscopy offers a flexible and versatile interface to control chemical processes at the nanoscale.
- The chemical contrast between those regions has been combined to fabricate the smallest lithographically engineered electron devices 5,57-58 The electric field at the tip-surface interface can invert the polarization of a small region in a ferroelectric film.
- This mechanism has been proposed for data storage 55,59-60 .
- The potential of b-SPL goes beyond the field of nanolithography.
- The method has been applied to understand new processes to decompose very stable chemical species such as carbon dioxide 39 .
Oxidation SPL
- The generality and robustness of the underlying chemical process (anodic oxidation) has transformed Dagata’s observation into a reliable a versatile nanolithography approach for patterning and device fabrication 42 .
- Oxidation SPL can be either performed with the tip in contact with the sample surface or in a non-contact mode.
- Third, it drives the oxyanions to the sample interface and facilitates the oxidation process 100 .
- The local oxide protects the underneath silicon from the etching.
- The quantum dot is structure is generated by locally oxidizing regions in the graphene layer.
Additional SPL methods
- The versatility of force microscopy to modify and manipulate surfaces (Fig. 1b) has generated some other approaches such as nanomachining 104 , nanoscale dispensing 105 or dip-pen nanolithography 106 .
- Nanoscale dispensing uses hollow cantilevers integrated fluidic channels to deliver small liquid drops onto a surface 110 .
- By depositing several different kinds of molecules on the same substrate, dp-SPL can pattern a range of desired chemistries with sub-100 nm control.
- The tip temperature can be used to control the ink deposition 112 .
- The advantage of this approach is twofold.
Large area patterning
- One of the main drawbacks of SPL techniques for technological oriented applications is the limited throughput due to the serial writing process and the required interaction time scales (Fig. 2b).
- For fully controlled parallel systems integration of actuators and sensors into the individual cantilevers is required.
- Together with the high linear speed of t-SPL throughput values of >10 8 µm 2 /h are within reach which would open up new application fields such as nanoimprint master or optical mask fabrication.
- Resolution down to sub-50 nm over areas of 500 m and parallel complex 3D-patterning of conjugated polymers have been demonstrated.
Outlook
- Scanning probe lithography has experienced a quiet evolution over the last twenty years.
- Those features, together with the wide range of materials that can be patterned, the ability to pattern in ambient conditions and the relatively few requirements to transform a conventional AFM into a nanolithography instrument explain the interest and relevance of SPL in the scientific community.
- Some milestones towards this goal have been achieved just recently.
- This Review provides an update of SPL methods based on either physical or chemical processes that better preserve the tip’s geometry and chemical nature.
- The first approach involves the use of arrays of several SPL cantilevers, which can write and read in parallel.
44. Li, Y., Maynor, B.W. & Liu, J. Electrochemical AFM ‘dip-pen’ nanolithography. J.
- Toward quantitative electrochemical measurements on the nanoscale by scanning probe microscopy: Environmental and current spreading effects.
- Centimeter scale atomic force microscope imaging and lithography.
- Panel b reprinted with permission from ref. 97.
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Frequently Asked Questions (12)
Q2. What is the remarkable application of nanoscale dispensing?
One remarkable application of nanoscale dispensing has been the stimulation of single living cells under physiological conditions 105 .
Q3. What is the common method of removing material from a surface?
Mechanical SPL (nanomachining) uses the mechanical force exerted by the tip to induce the selective removal of material from a surface.
Q4. How can dp-spl be used to pattern a range of chem?
By depositing several different kinds of molecules on the same substrate, dp-SPL can pattern a range of desired chemistries with sub-100 nm control.
Q5. How can the patterning depth be controlled?
By exploiting the ‘closed loop lithography‘ scheme mentioned above, the absolute patterning depth in a PPA polymer film can be controlled to about single nanometer precision, less than the linear dimension of a single resist molecule.
Q6. What is the main drawback of a single-cantilever AFM?
A typical single-cantilever AFM employs an optical-lever deflection schemewhich cannot be easily scaled up to large cantilever arrays due to the complexity in the optical setup, signal processing, and restrictions on cantilever geometries 118 .
Q7. What is the advantage of dip-pen scanning probe lithography?
Dip-pen scanning probe lithography (dp-SPL) offers high resolution andregistration with direct write patterning capabilities 106 .
Q8. What is the trade-off between resolution and throughput?
Both higher currents and enhanced sensitivity through chemical amplification (chemically amplified resists, CAR) lead to a reduction in resolution, limiting the throughput at high resolutions (GEB).
Q9. What was the first example of thermo-mechanical writing?
In the early experiments, laser heating with pulse times of microseconds and linear scan speeds of 25 mm/s demonstrated the high speed potential of thermo-mechanical writing schemes.
Q10. What is the effect of the heat transfer at the tip-sample contact area?
the heat is highlylocalized at the tip-sample contact area, which is of the order of a few nm 2 due to the nanoscale dimensions of the SPM tip.
Q11. What are the other milestones towards technical readiness of the technique?
Other milestones towards technical readiness of the technique are the stitching of patterningfields at < 10 nm precision 30 and a high-quality pattern transfer into the underlying silicon substrate at high resolution and low line edge roughness (Fig. 3c).
Q12. What is the process of fabricating a silicon nanowire transistor?
The fabrication of a silicon nanowire transistor process involves the patterning of a narrow oxide mask on top of the active layer of a silicon-on-insulator substrate 15, 61,102 (Fig. 6a).