Algorithms for Reducing Crosstalk in Two-Layer Channel Routing
01 Jan 2006-
TL;DR: This paper has developed heuristic algorithms for computing reduced crosstalk two-layer channel routing solutions for simplest as well as general channel instances and the results obtained are highly encouraging.
Abstract: Crosstalk minimization is one of the most important high performance aspects in interconnecting VLSI circuits. With advancement of fabrication technology, devices and interconnecting wires are placed in closer proximity and circuits operate at higher frequencies. This results in crosstalk between wire segments. Crosstalk minimization problem for the reserved two-layer Manhattan channel routing is NP-hard, even if the channel instances are free from any vertical constraint (simplest channel instances). In this paper we have developed heuristic algorithms for computing reduced crosstalk two-layer channel routing solutions for simplest as well as general channel instances. In general, the results obtained are highly encouraging.
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01 Jan 2020
TL;DR: Heuristic algorithms have been devised to optimize bottleneck crosstalk in order to augment circuit performance in two-layer channel routing and results obtained are highly encouraging.
Abstract: Channel routing and crosstalk minimization are important issues while we talk about high-performance circuits for VLSI physical design automation. Interconnection among the net terminals satisfying constraints in an intelligent way is a necessity to realize a circuit in a minimum possible area, as this is a primary requirement to reduce cost as well as to increase yield. In this paper, along with area minimization, the performance of the computed circuits has also been enhanced by computing routing solutions with a specified amount of bottleneck crosstalk in two-layer channel routing. Usually, crosstalk is measured by the amount of overlapping of a pair of nets assigned to adjacent tracks. The crosstalk minimization problem in the reserved two-layer Manhattan channel routing model is NP-hard. Thus, in this paper, heuristic algorithms have been devised to optimize bottleneck crosstalk in order to augment circuit performance in two-layer channel routing. Experimental results obtained are highly encouraging.
4 citations
10 Dec 2010
TL;DR: The crosstalk noise model is a proposed concept of effective signal transition consideration and is developed based on a decreasing coupling technique exhibiting a total energy of 6.9 as compared to average energy of all possible patterns.
Abstract: Crosstalk appears in various electrical circuits and chip design. This is due to stretches of overlapping wires that produce parasitic coupling between adjacent signal lines. In VLSI design, crosstalk creates a lot of problems. Crosstalk minimization problem is NP complete. The research is to find the solution with minimum crosstalk by using signal transition avoidance technique. We use simulated annealing algorithm to search for the optimal layout pattern. Different generation sequence of a graph give diverse alternatives for horizontal constraint graph of a VLSI channel. The energy function can be designed to take care of crosstalk in the channel. The optimization result, gives the routing solution with minimum crosstalk and minimal total energy. We reduce total energy through capacitance by rearranging wire signal transition. The crosstalk noise model is a proposed concept of effective signal transition consideration. The proposed technique is developed based on a decreasing coupling technique exhibiting a total energy of 6.9 as compared to average energy of all possible patterns. In addition, the result of optimal pattern is 24.4% less than cost of the original layout pattern.
3 citations
TL;DR: It has been shown that the crosstalk minimization problem in the reserved two-layer Manhattan routing model is NP-complete, even if channels are free from all vertical constraints, and that all results hold even if doglegging is allowed.
2 citations
TL;DR: Algorithms for generating random channel instances for their use in computing channel routing solutions in VLSI physical design and a heuristic algorithm for solving these problems is developed.
Abstract: In this paper we have developed algorithms for generating random channel instances for their use in computing channel routing solutions in VLSI physical design. Channel instances are usually of two types: simple and general, and there are usually two kinds of inherent constraints involving channel routing problem: horizontal constraint and vertical constraint. Simple channel instances do not contain any vertical constraint, whereas, general channel instances contain both horizontal as well as vertical constraints. Most of the optimization problems in two-, three-, and multi-layer channel routing are NP-hard and, in fact, very few are polynomial time computable. Hence for each of the NP-hard problems in channel routing, it is unlikely to design a polynomial time deterministic algorithm. Developing heuristic algorithm may be a probable way out that hopefully provides good solutions for most of the instances available in literature. Novelty of a heuristic algorithm is judged better if it works for a variety of large number of randomly generated instances of the problem.
1 citations
01 Dec 2008
TL;DR: Algorithms for generating random channel specifications of channel routing problem in VLSI design and convergence of results of a heuristic algorithm is well established.
Abstract: In this paper we develop algorithms for generating random channel specifications of channel routing problem in VLSI design. A channel is a rectangular routing region containing two sets of fixed terminals on two of its opposite sides and the other two opposite sides (of the rectangle) are open ends, may or may not contain any terminal of a net but the terminal position is not fixed before a routing solution is computed. Most of the problems in two-, three-, and multi-layer channel routing are beyond polynomial time computable. Hence for each of these problems it is unlikely to design a polynomial time deterministic algorithm. Developing heuristic algorithm might be a probable way out that hopefully provides good solutions for most of the instances occur in practice. Novelty of a heuristic algorithm is judged better if it works for a variety of large number of randomly generated instances of the problem. In fact, convergence of results of a heuristic algorithm is well established when the algorithm of a problem is executed for a huge number of randomly generated similar instances and the final result is computed making an average on all of them.
Cites background from "Algorithms for Reducing Crosstalk i..."
...…to mention that the net numbers are nothing but symbols to differentiate themselves, we want to obtain the channel specifications where the net numbers would present randomly along the length of the channel, i.e., the nets are not sorted in succession based on their starting column positions from…...
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...To do so we first generate channel specifications having twoterminal nets only, where none of the channel specifications contains any vertical constraint....
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...We know that the two-layer channel routing problem of area minimization is polynomial time solvable for simple channel specifications [1, 7, 8], but the problem of crosstalk minimization in two-layer channel routing is NPhard even if the channel specifications are free from any vertical constraint…...
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References
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Book•
01 Jan 1980
TL;DR: This new Annals edition continues to convey the message that intersection graph models are a necessary and important tool for solving real-world problems and remains a stepping stone from which the reader may embark on one of many fascinating research trails.
Abstract: Algorithmic Graph Theory and Perfect Graphs, first published in 1980, has become the classic introduction to the field. This new Annals edition continues to convey the message that intersection graph models are a necessary and important tool for solving real-world problems. It remains a stepping stone from which the reader may embark on one of many fascinating research trails. The past twenty years have been an amazingly fruitful period of research in algorithmic graph theory and structured families of graphs. Especially important have been the theory and applications of new intersection graph models such as generalizations of permutation graphs and interval graphs. These have lead to new families of perfect graphs and many algorithmic results. These are surveyed in the new Epilogue chapter in this second edition. New edition of the "Classic" book on the topic Wonderful introduction to a rich research area Leading author in the field of algorithmic graph theory Beautifully written for the new mathematician or computer scientist Comprehensive treatment
4,090 citations
1,324 citations
28 Jun 1971
TL;DR: The purpose of this paper is to introduce a new wire routing method for two layer printed circuit boards based on the newly developed channel assignment algorithm and requires many via holes.
Abstract: The purpose of this paper is to introduce a new wire routing method for two layer printed circuit boards. This technique has been developed at the University of Illinois Center for Advanced Computation and has been programmed in ALGOL for a B5500 computer. The routing method is based on the newly developed channel assignment algorithm and requires many via holes. The primary goals of the method are short execution time and high wireability. Actual design specifications for ILLIAC IV Control Unit boards have been used to test the feasibility of the routing technique. Tests have shown that this algorithm is very fast and can handle large boards.
655 citations
TL;DR: Two new algorithms merge nets instead of assigning horizontal tracks to individual nets to route a specified net list between two rows of terminals across a two-layer channel in the layout design of LSI chips.
Abstract: In the layout design of LSI chips, channel routing is one of the key problems. The problem is to route a specified net list between two rows of terminals across a two-layer channel. Nets are routed with horizontal segments on one layer and vertical segments on the other. Connections between two layers are made through via holes. Two new algorithms are proposed. These algorithms merge nets instead of assigning horizontal tracks to individual nets. The algorithms were coded in Fortran and implemented on a VAX 11/780 computer. Experimental results are quite encouraging. Both programs generated optimal solutions in 6 out of 8 cases, using examples in previously published papers. The computation times of the algorithms for a typical channel (300 terminals, 70 nets) are 1.0 and 2.1 s, respectively.
539 citations
28 Jun 1976
TL;DR: The routing algorithm presented here was developed as part of LTX, a computer-aided design system for integrated circuit layout and was implemented on an HP-2100 minicomputer.
Abstract: This paper presents an algorithm for interconnecting two sets of terminals across an intervening channel. It is assumed that the routing is done on two distinct levels with all horizontal paths being assigned to one level and all vertical paths to the other. Connections between the levels are made through contact windows. A single net may result in many horizontal and vertical segments. Experimental results indicate that this algorithm is very successful in routing channels that contain severe constraints. Usually, the routing is accomplished within one track of the mathematical lower bound. The routing algorithm presented here was developed as part of LTX, a computer-aided design system for integrated circuit layout and was implemented on an HP-2100 minicomputer. A typical channel (300 terminals, 100 nets) can be routed in less than 5 seconds. Routing results are presented both for polycell chips under development at Bell Laboratories and for examples that exist in the published literature. For the latter, reductions of 10% in the wiring area were typical.
364 citations