An accurate closed-expression model for FinFETs parasitic resistance
TL;DR: A new closed-expression analytic model for parasitic resistance of FinFETs (Fin-Field-Effect-Transistors), which allows a fast estimation of this parasitic element, is proposed and evaluated and is very accurate when compared to experimental data.
About: This article is published in Microelectronics Reliability.The article was published on 2015-02-01. It has received 4 citations till now. The article focuses on the topics: Parasitic element & Contact resistance.
Citations
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TL;DR: In this paper, the authors compute the contact resistances of trigate and FinFET devices with widths and heights in the 4-24-nm range using a Non-Equilibrium Green's Functions approach.
Abstract: We compute the contact resistances Rc in trigate and FinFET devices with widths and heights in the 4–24 nm range using a Non-Equilibrium Green's Functions approach. Electron-phonon, surface roughness, and Coulomb scattering are taken into account. We show that Rc represents a significant part of the total resistance of devices with sub-30 nm gate lengths. The analysis of the quasi-Fermi level profile reveals that the spacers between the heavily doped source/drain and the gate are major contributors to the contact resistance. The conductance is indeed limited by the poor electrostatic control over the carrier density under the spacers. We then disentangle the ballistic and diffusive components of Rc and analyze the impact of different design parameters (cross section and doping profile in the contacts) on the electrical performances of the devices. The contact resistance and variability rapidly increase when the cross sectional area of the channel goes below ≃50 nm2. We also highlight the role of the charg...
18 citations
TL;DR: In this article, the authors compute the contact resistances of trigate and FinFET devices with widths and heights in the 4 to 24 nm range using a Non-Equilibrium Green's Functions approach.
Abstract: We compute the contact resistances $R_{\rm c}$ in trigate and FinFET devices with widths and heights in the 4 to 24 nm range using a Non-Equilibrium Green's Functions approach. Electron-phonon, surface roughness and Coulomb scattering are taken into account. We show that $R_{\rm c}$ represents a significant part of the total resistance of devices with sub-30 nm gate lengths. The analysis of the quasi-Fermi level profile reveals that the spacers between the heavily doped source/drain and the gate are major contributors to the contact resistance. The conductance is indeed limited by the poor electrostatic control over the carrier density under the spacers. We then disentangle the ballistic and diffusive components of $R_{\rm c}$, and analyze the impact of different design parameters (cross section and doping profile in the contacts) on the electrical performances of the devices. The contact resistance and variability rapidly increase when the cross sectional area of the channel goes below $\simeq 50$ nm$^2$. We also highlight the role of the charges trapped at the interface between silicon and the spacer material.
18 citations
10 Sep 2015
TL;DR: In this article, the authors analyzed the parasitic components of FinFETs w.r.t. fin geometry as well as metal contact thickness and showed that S/D parasitic components are mainly dependent on the structural geometry of finFET.
Abstract: The FinFET technology is one of the ultimate solutions for Moores Law. Since sizes of device channel shrink, several Short Channel Effects (SCEs) appear. The FinFET or Multigate are best solutions for SCEs. However, this device provides several parasitic components which may reduce the performance. The parasitic components are in form of parasitic resistance and in parasitic capacitance. Here, in this paper, source/drain region parasitic components with respect to geometry of FinFET are analyzed. The study shows S/D parasitic components are mainly dependent on the structural geometry of FinFET. The parasitic components w.r.t fin geometry as well as metal contact thickness have been analyze. So in order to reduce these parasitic the device geometry is to be optimized.
4 citations
Cites background from "An accurate closed-expression model..."
...[5] and to get parasitic capacitance Wu and Chan [6] and Lee et al....
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References
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14,205 citations
"An accurate closed-expression model..." refers background or methods in this paper
...[27] according to the doping concentration of these regions....
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...The resistivity of the source and drain extensions and high doped (HDD) regions were calculated from the carrier’s mobility in these regions, as shown in [27] and given by (17)...
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TL;DR: In this paper, a self-aligned double-gate MOSFET, FinFET was proposed by using boron-doped Si/sub 04/Ge/sub 06/ as a gate material.
Abstract: MOSFETs with gate length down to 17 nm are reported To suppress the short channel effect, a novel self-aligned double-gate MOSFET, FinFET, is proposed By using boron-doped Si/sub 04/Ge/sub 06/ as a gate material, the desired threshold voltage was achieved for the ultrathin body device The quasiplanar nature of this new variant of the vertical double-gate MOSFETs can be fabricated relatively easily using the conventional planar MOSFET process technologies
1,668 citations
"An accurate closed-expression model..." refers background in this paper
...The evolution from planar to three-dimensional devices allowed the reduction of short channel effects (SCE) and gave them higher drivability [1,2]....
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IBM1
TL;DR: In this article, two basic models for rectangular contacts to planar devices, the Kennedy-Murley Model (KMM) and the Transmission Line Model (TLM), are discussed and compared.
Abstract: Two basic models for rectangular contacts to planar devices, the Kennedy-Murley Model (KMM) and the Transmission Line Model (TLM) are discussed and compared. The KMM does not take into account the interface resistance between metal and semiconductor, whereas the TLM disregards the vertical structure of the semiconductor layer. An extension of the TLM is derived (ETLM), which approximately considers this vertical structure. KMM and TLM thus appear as special cases of the ETLM. The calibration of the latter on the KMM then yields a simple quantitative criterion for the applicability of the KMM or the pure TLM. Measurement results on typical aluminum-silicon contacts are described satisfactorily by the (E)TLM. Concurrently with the applicability criterion, the KMM proves inadequate for these contacts due to the disregard of interface resistance. Conclusions are derived from the TLM pertaining to current distribution over the contact area and to contact resistance. In particular, the contacts are classified according to their operation mode. Finally, the TLM approach is applied also to circular contacts.
956 citations
TL;DR: In this paper, the authors describe the evolution and properties of a new class of MOSFETs, called triple-plus (3 + )-gate devices, which offer a practical solution to the problem of the ultimate, yet manufacturable, silicon MOS-FET.
Abstract: In an ever increasing need for higher current drive and better short-channel characteristics, silicon-on-insulator MOS transistors are evolving from classical, planar, single-gate devices into three-dimensional devices with multiple gates (double-, triple- or quadruple-gate devices). The evolution and the properties of such devices are described and the emergence of a new class of MOSFETs, called triple-plus (3 + )-gate devices offer a practical solution to the problem of the ultimate, yet manufacturable, silicon MOSFET.
878 citations