An algorithm for finding a non-trivial lower bound for channel routing
TL;DR: A deterministic polynomial time algorithm is proposed that computes a better and non-trivial lower bound on the number of tracks required for routing a channel without doglegging.
About: This article is published in Integration.The article was published on 1998-09-01. It has received 7 citations till now. The article focuses on the topics: Destination-Sequenced Distance Vector routing & Routing (electronic design automation).
Citations
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01 Dec 2011
TL;DR: This paper considers a general channel routing problem for channel instances with fixed and floating terminals, and develops an efficient graph based heuristic algorithm for reducing area in the reserved two-layer Manhattan channel routing model.
Abstract: The main objective of VLSI channel routing problem is to compute a feasible reduced area routing solution which reduces the height of the channel. A channel is a rectangular routing region with two open ends (left and right) and two sets of fixed terminals (top terminals and bottom terminals) are placed in the upper and lower sides of the channel. A net is a set of terminals that need to be electrically connected (usually using rectilinear wiring). Routing is a process to interconnect all nets within the channel considering all constraints (horizontal and vertical constraints) of that channel. The terminals along the left and right ends of the channel are not fixed, known as floating terminals. Generally, channel routing problem for area minimization is NP-complete. So developing a heuristic algorithm is really interesting. In this paper, we consider a general channel routing problem for channel instances with fixed and floating terminals, and develop an efficient graph based heuristic algorithm for reducing area in the reserved two-layer Manhattan channel routing model.
01 Jan 2012
TL;DR: Four methods to estimate channel height for congestion analysis in VLSI design automation consider constraint graphs and net types in a channel to yield better results than existing methods.
Abstract: Given an instance of channel routing problem (CRP) in VLSI design, the number of tracks used in a solution for the instance is called the channel height of the solution. The objective of CRP is to minimize the channel heights, that is, to find a solution with minimum channel height. In an instance of CRP, HCG and VCG denote the horizontal and vertical constraint graphs, respectively. Let GM be the graph obtained from HCG by adding edges whose ends are connected by a directed path in VCG. Pal et al. first gave lower bounds on the channel heights in terms of the clique number of GM, and presented algorithms to find such lower bounds. In this paper, we find some interesting theoretic properties, about the structure of the cliques in GM, which can be used to improve Pal’s algorithms. So far, little is known about upper bounds on the channel heights. We find that CRP can be translated into an orientation problem on HCG with arcs in VCG oriented and keeping directed acyclic, and it is also proved that the channel height is determined by the longest directed path in the orientation. Moreover,we show that a lemma on the lower bound in [2] is incorrect and thus another lemma is given to modify it.
Cites background or methods from "An algorithm for finding a non-triv..."
...CRP is a key problem in VLSI chip design [1, 3] and has been known to be NP-hard [6, 5]....
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...in [3]....
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...We give some interesting properties on the cliques in GM which can be used to improve Pal’s algorithms in [3] and [2]....
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...Basically, the algorithm in [3] is to find a large chordal subgraph in GM , by adding edges, one by one, from GP to HCG, without violating chordality....
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...[3] gave a non-trivial lower bound for no-dogleg reserved 2-layer Manhattan model of CRP and an O(n4) time algorithms to compute a nontrivial lower bound in 2- or 3-layer channel routing....
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References
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Book•
01 Jan 1980
TL;DR: This new Annals edition continues to convey the message that intersection graph models are a necessary and important tool for solving real-world problems and remains a stepping stone from which the reader may embark on one of many fascinating research trails.
Abstract: Algorithmic Graph Theory and Perfect Graphs, first published in 1980, has become the classic introduction to the field. This new Annals edition continues to convey the message that intersection graph models are a necessary and important tool for solving real-world problems. It remains a stepping stone from which the reader may embark on one of many fascinating research trails. The past twenty years have been an amazingly fruitful period of research in algorithmic graph theory and structured families of graphs. Especially important have been the theory and applications of new intersection graph models such as generalizations of permutation graphs and interval graphs. These have lead to new families of perfect graphs and many algorithmic results. These are surveyed in the new Epilogue chapter in this second edition. New edition of the "Classic" book on the topic Wonderful introduction to a rich research area Leading author in the field of algorithmic graph theory Beautifully written for the new mathematician or computer scientist Comprehensive treatment
4,090 citations
28 Jun 1971
TL;DR: The purpose of this paper is to introduce a new wire routing method for two layer printed circuit boards based on the newly developed channel assignment algorithm and requires many via holes.
Abstract: The purpose of this paper is to introduce a new wire routing method for two layer printed circuit boards. This technique has been developed at the University of Illinois Center for Advanced Computation and has been programmed in ALGOL for a B5500 computer. The routing method is based on the newly developed channel assignment algorithm and requires many via holes. The primary goals of the method are short execution time and high wireability. Actual design specifications for ILLIAC IV Control Unit boards have been used to test the feasibility of the routing technique. Tests have shown that this algorithm is very fast and can handle large boards.
655 citations
TL;DR: Two new algorithms merge nets instead of assigning horizontal tracks to individual nets to route a specified net list between two rows of terminals across a two-layer channel in the layout design of LSI chips.
Abstract: In the layout design of LSI chips, channel routing is one of the key problems. The problem is to route a specified net list between two rows of terminals across a two-layer channel. Nets are routed with horizontal segments on one layer and vertical segments on the other. Connections between two layers are made through via holes. Two new algorithms are proposed. These algorithms merge nets instead of assigning horizontal tracks to individual nets. The algorithms were coded in Fortran and implemented on a VAX 11/780 computer. Experimental results are quite encouraging. Both programs generated optimal solutions in 6 out of 8 cases, using examples in previously published papers. The computation times of the algorithms for a typical channel (300 terminals, 70 nets) are 1.0 and 2.1 s, respectively.
539 citations
TL;DR: It is shown that an efficient optimal algorithm for interconnecting two rows of points across an intervening channel is unlikely to exist by establishing that this problem is NP-complete.
Abstract: Interconnecting two rows of points across an intervening channel is an important problem in the design of LSI circuits. The most common methodology for producing such interconnections uses two orthogonal layers of parallel conductors and allows wires to "dogleg" arbitrarily. Although effective heuristic procedures are available for routing channels with this methodology, no efficient optimal algorithm has yet been discovered for the general case problem. We show that such an algorithm is unlikely to exist by establishing that this problem is NP-complete.
209 citations
TL;DR: Two special types of three-layer channel routing, VHV and HVH, are introduced in this paper, and the merging algorithm and the left edge algorithm used in two-layer routing can be extended to three layers.
Abstract: With the advent of VLSI technology, multiple-layer routing becomes feasible. Two special types of three-layer channel routing, VHV and HVH, are introduced in this paper. The merging algorithm and the left edge algorithm used in two-layer routing can be extended to three layers. Attempts are made to compare the lower bounds of channel width of three types of routing--two-layer, VHV, and HVH. The algorithms were coded in PASCAL and implemented on VAX 11/780 computer. The computational results are satisfactory, since all the results lead to a further reduction in routing area.
105 citations