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An efficient approach to design a reversible control unit of a processor

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TLDR
Two new 4 × 4 reversible gates, namely HL gate and BJ gate, are proposed to design reversible decoder and J-K flip-flop and some lower bounds on the numbers of gates and garbage outputs of the proposed control unit have been presented.
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This article is published in Sustainable Computing: Informatics and Systems.The article was published on 2013-12-01. It has received 16 citations till now. The article focuses on the topics: Three-input universal logic gate & Toffoli gate.

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Journal ArticleDOI

A modular approach for testable conservative reversible multiplexer circuit for nano-electronic confine application

TL;DR: The significant module of a multiplexer, an extended to n:1 is framed with prominent application in the control unit of the processor, and the gate count, quantum cost and unit delay are optimal.
Proceedings ArticleDOI

Design and Implementation of a Reversible Central Processing Unit

TL;DR: This work addresses the reversible circuit design using novel modularization approach by presenting architecture of a logically reversible processor based on the Von Neumann architecture that can operate with very low power consumption, protection of power analysis attack and long span of life due to less heat dissipation.
Journal ArticleDOI

Evolution of structure of some binary group based n bit comparator, n-to-2n decoder by reversible technique.

TL;DR: The relative results shows that the novel reversible gate wide utility, group-based reversible comparator outperforms the present design style in terms of number of gates, garbage outputs and constant input.
Posted Content

Design of a Compact Reversible Read-Only-Memory with MOS Transistors

TL;DR: A new reversible gate named as Nowrin Papiya (NP) gate is proposed and an algorithm as well as several theorems on the numbers of gates, transistors and garbage outputs have been presented to show the optimality of the reversible ROM.
References
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Journal ArticleDOI

Logical reversibility of computation

TL;DR: This result makes plausible the existence of thermodynamically reversible computers which could perform useful computations at useful speed while dissipating considerably less than kT of energy per logical step.
Book

Conservative logic

TL;DR: Conservative logic shows that it is ideally possible to build sequential circuits with zero internal power dissipation and proves that universal computing capabilities are compatible with the reversibility and conservation constraints.
Proceedings Article

Reversible Computing

TL;DR: According to a physical interpretation, the central result of this paper is that i¢ is ideally possible to build sequential c/rcuits with zero internal power dissipation.
Journal ArticleDOI

Quantum Mechanical Computers

TL;DR: The physical limitations due to quantum mechanics on the functioning of computers are analyzed in this article, where the physical limitations of quantum mechanics are discussed and the physical limits of quantum computing are analyzed.
Proceedings ArticleDOI

BDD-based synthesis of reversible logic for large functions

TL;DR: This paper presents a technique to derive reversible circuits for a function given by a binary decision diagram (BDD), and shows better results and a significantly better scalability in comparison to previous synthesis approaches.