TL;DR: This work presents a simple analytical model for electrothermal heating in multifinger bipolar transistors under realistic operating condition where all fingers are heating simultaneously and simulates 40% faster than the conventional model in a transient simulation of a five-finger transistor.
Abstract: In this work, we present a simple analytical model for electrothermal heating in multifinger bipolar transistors under realistic operating condition where all fingers are heating simultaneously. The proposed model intuitively incorporates the effect of thermal coupling among the neighboring fingers in the framework of self-heating bringing down the overall model complexity. Compared to the traditional thermal modeling approach for an ${n}$ -finger transistor where the number of circuit nodes increases as ${n}^{{2}}$ , our model requires only ${n}$ -number of nodes. The proposed model is scalable for any number of fingers and with different emitter geometries. The model is validated with 3-D thermal simulations and measured data from STMicroelectronics B4T technology. The Verilog-A implemented model simulates 40% faster than the conventional model in a transient simulation of a five-finger transistor.
Therefore, it has been a common practice to partition a large emitter into smaller fingers each having small enough emitter width (WE) leading to a multi-finger transistor.
This makes the straightforward application of superposition to include both the self-heating and thermal coupling effects in calculating the overall finger temperature questionable.
Section II presents the elaborate model formulation with a hint towards model implementation.
II. MODEL FORMULATION
Electrothermal effect in HBTs causes heat generation at the base-collector junction.
Cross sectional view of (a) two-finger and (b) three-finger transistor structure with no trench isolation showing heat source, heat sink, isothermal lines and the imaginary boundaries.
In case of a system with three heat sources as shown in Fig. 2(b), the thermal boundaries of heat source in the middle are governed by two adjacent heat sources.
In order to accurately predict the temperature at each finger, an effective heat spreading angle (θ1) has to be defined between the adjacent heat sources as shown by the dashed lines in Fig. 2(b).
While testing against TCAD simulation (as presented in the next section) the authors have found that in most of the geometries θ = 46◦ yields excellent accuracy.
A. Comparison with 3D TCAD simulation
First, the authors test their proposed model against 3D TCAD thermal simulation results of multifinger SiGe HBT structures having no trench isolation.
Fig. 6(a) compares their modeling results for the T (z) variation with the 3D TCAD simulation data corresponding to the corner fingers in case of multifinger structures with STI.
As a next step, the authors test their model for multifinger transistor system where each finger is individually surrounded by STI and the whole transistor is housed within a deep trench isolation (DTI).
Since the heat flow volume inside the DTI region is equally shared among the fingers, this assumption leads to the prediction of the same temperature at the bottom of DTI and identical T (z) for all fingers.
The proposed model (solid lines) demonstrates an excellent agreement with the TCAD results .
IV. CONCLUSION
The authors have presented a simple, analytical, thermal model for multifinger SiGe HBTs.
The proposed model is highly accurate as it considers the temperature dependence of thermal conductivity of silicon and at the same time requires no extra circuit node to account for the thermal coupling effects between nearby fingers.
Other than the dissipated power, the input for the model are the dimensions and relative locations of emitter fingers and different trenches in order to compute the temperature at each finger.
The model is implemented within the framework of existing self-heating sub-circuit of the main electrical model of bipolar transistor.
The model is found to simulate 40% faster than the stateof-the-art thermal coupling model while tested for transient simulation.
TL;DR: In this article , GaN vertical FinFETs on a bulk GaN substrate were fabricated with various fin widths and 400 ns pulsed I-V measurements were performed to investigate their self-heating and DC-RF dispersion.
Abstract: GaN vertical FinFETs on a bulk GaN substrate were fabricated with various fin widths and 400 ns pulsed I-V measurements were performed to investigate their self-heating and DC-RF dispersion. With low-temperature post-gate processes including Ar plasma-enhanced Ohmic contact, a high drain current density ($>$ 175 kA cm$^{-{2}}$ ) and a low gate leakage ($< 1\times 10^{-{17}}$ kA cm$^{-{2}}$ ) could be achieved simultaneously. When normalized by the active fin area, the specific on-resistance was 0.030 $\text{m}\Omega $ cm2 at the drain on-current of 119 kA cm$^{-{2}}$ for the 300 mm fin-width single-finger device. A 25-finger device with the same fin width and fin-to-fin pitch of 3 $\mu \text{m}$ showed the on-resistance of 0.043 $\text{m}\Omega $ cm2 (0.43 $\text{m}\Omega $ cm2 when normalized by the total device area of 6000 $\mu \text{m}^{{2}}$ ), which was one of the lowest values reported. Low DC-RF dispersion was observed for the devices more than 2.5 mm away from the wafer edge. This study also reports that more influence of self-heating was observed as the fin width scaled down or the number of fingers increased.
TL;DR: In this article, a collector-base-emitter (CBE) SiGe HBT was merged into a single EBCBE SiGeHBT, not only to double its maximum voltage swing, but also to decrease its active area and parasitics.
Abstract: This letter proposes a new emitter-base-collector-base-emitter (EBCBE) SiGe HBT suited for high power RF switches. Two collector-base-emitter (CBE) SiGe HBTs are merged into a single EBCBE SiGe HBT, not only to double its maximum voltage swing, but also to decrease its active area and parasitics. To further boost its power handling, a capacitive voltage distribution and a collector floating are incorporated into the new EBCBE SiGe HBT. A X-band $\lambda $ /4 shunt single-pole-double-throw (SPDT) switch using the EBCBE SiGe HBT achieves measured insertion losses and isolations of 1.2/1.3 and 29.2/23.0 dB at 10 GHz in TX/RX modes, respectively. In TX mode, measured input 1-dB power compression ( $\text{P}_{\text {1dB}}$ ) is 25.4 dBm, and it can be extended to 28.5 dBm at −0.6 V base bias of the EBCBE SiGe HBT.
TL;DR: In this article, a dual-band MMIC power amplifier with a single-chip MMIC and single-path output matching network is demonstrated by adopting a newly proposed on-chip linearizer, composed of the base-emitter diode of an active bias transistor and a capacitor to provide an RF short at the base node of the active bias transistors.
Abstract: A personal communications service/wide-band code division multiple access (PCS/W-CDMA) dual-band monolithic microwave integrated circuit (MMIC) power amplifier with a single-chip MMIC and a single-path output matching network is demonstrated by adopting a newly proposed on-chip linearizer. The linearizer is composed of the base-emitter diode of an active bias transistor and a capacitor to provide an RF short at the base node of the active bias transistor. The linearizer enhances the linearity of the power amplifier effectively for both PCS and W-CDMA bands with no additional DC power consumption, and has negligible insertion power loss with almost no increase in die area. It improves the input 1-dB gain compression point by 18.5 (20) dB and phase distortion by 6.1/spl deg/ (12.42/spl deg/) at an output power of 28 (28) dBm for the PCS (W-CDMA) band while keeping the base bias voltage of the power amplifier as designed. A PCS and W-CDMA dual-band InGaP heterojunction bipolar transistor MMIC power amplifier with single input and output and no switch for band selection is embodied by implementing the linearizer and by designing the amplifier to have broad-band characteristics. The dual-band power amplifier exhibits an output power of 30 (28.5) dBm, power-added efficiency of 39.5 % (36 %), and adjacent channel power ratio of -46 (-50) dBc at the output power of 28 (28) dBm under 3.4-V operation voltage for PCS (W-CDMA) applications.
TL;DR: In this article, the emitter ballasting resistor for power heterojunction bipolar transistors (HBTs) was investigated and the current handling capability of power HBTs was found to improve with ballasting resistance.
Abstract: A systematic investigation of the emitter ballasting resistor for power heterojunction bipolar transistors (HBTs) is presented. The current handling capability of power HBTs is found to improve with ballasting resistance. An equation for the optimal ballasting resistance is presented, where the effects of thermal conductivity of the substrate material and the temperature coefficient of the ballasting resistor are taken into account. Current levels of 400 to 800 mA/mm of emitter periphery at case temperatures of 25 to -80 degrees C for power AlGaAs/GaAs HBTs have been obtained using an on-chip lightly doped GaAs emitter ballasting resistor. Device temperature has been measured using both an infrared microradiometer and temperature-sensitive electrical parameters. Steady-state and transient thermal modeling are also performed. Although the measured temperature is spatially nonuniform, the modeling results show that such nonuniformities would occur for a uniform current distribution, as would be expected for an HBT with emitter ballasting resistors. >
122 citations
"An Efficient Thermal Model for Mult..." refers background in this paper
TL;DR: This book begins with an overview on the different device designs of modern bipolar transistors, along with their relevant operating conditions; while the subsequent chapter on transistor theory is subdivided into a review of mostly classical theories, brought into context with modern technology.
Abstract: "Compact Hierarchical Bipolar Transistor Modeling with HICUM" will be of great practical benefit to professionals from the process development, modeling and circuit design community who are interested in the application of bipolar transistors, which include the SiGe:C HBTs fabricated with existing cutting-edge process technology. This book begins with an overview on the different device designs of modern bipolar transistors, along with their relevant operating conditions; while the subsequent chapter on transistor theory is subdivided into a review of mostly classical theories, brought into context with modern technology, and a chapter on advanced theory that is required for understanding modern device designs. This book aims to provide a solid basis for the understanding of modern compact models.
109 citations
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TL;DR: In this article, an extension of the constant angle heat spreading, taking into account chip and substrate dimensions, and changing the spreading angle accordingly, yields to closed form expressions accurate enough for most practical applications.
Abstract: The model presented in this work is based on an extension of the constant angle heat spreading, taking into account chip and substrate dimensions, and changing the spreading angle accordingly. This yields to closed form expressions accurate enough for most practical applications. Circular, square, and rectangular geometries have been analyzed and the results compared with Bessel and Fourier series-like solutions.
79 citations
"An Efficient Thermal Model for Mult..." refers background in this paper
TL;DR: In this article, a computer program was written to perform steady-state analysis for hybrid circuits, where the output of the program gives the temperature of each power dissipating element in the hybrid, based upon solution of Laplace's equation in three dimensions using Fourier techniques.
Abstract: A computer program was written to perform steady-state analysis for hybrid circuits. The output of the program gives the temperature of each power dissipating element in the hybrid. The program is based upon solution of Laplace's equation in three dimensions using Fourier techniques. The assumptions made are: no convection or radiation, constant and isotropic thermal conductivity for any single material, and constant temperature at the bottom of the hybrid package. Bessel's inequality allows one to input the desired accuracy and to determine where the infinite series should be truncated. Theoretically, the program will attain any desired accuracy less than 100 percent, but practical considerations of computer run times limit accuracies to the 90- to 95-percent region. The program has been tested by comparing computer results to known theoretical exact solutions and to actual measurements on sample hybrids. When compared to known theoretical exact solutions, the computer result accuracy is between 95 and 100 percent. When compared to actual measurements on sample hybrids, the computer result accuracy is between 90 and 95 percent. This program has been used successfully on over twenty circuit designs. It has also been used to evaluate simpler types of thermal anal- yses.
51 citations
"An Efficient Thermal Model for Mult..." refers background in this paper
Q1. What are the contributions in "An efficient thermal model for multifinger sige hbts under real operating condition" ?
In this work, the authors present a simple analytical model for electrothermal heating in multifinger bipolar transistors under realistic operating condition where all fingers are heating simultaneously.
Q2. What is the effect of the temperature insensitive bias technique in a multi-finger transistor?
The modern application circuits such as power amplifiers are equipped with temperature insensitive bias techniques to ensure a near constant operating current [6]–[9].
Q3. What is the geometry factor for the heating finger?
In the present work, since the authors have computed the geometry factor (fG) for each heating finger, the corresponding thermal resistance is easily obtained and can be used within the already existing self-heating network.
Q4. What is the way to estimate the temperature at each finger?
In order to accurately predict the temperature at each finger, an effective heat spreading angle (θ1) has to be defined between the adjacent heat sources as shown by the dashed lines in Fig. 2(b).
Q5. What is the speed improvement of the model?
In order to quantify the speed improvement of their model over the stateof-the-art thermal model for multifinger transistor [2], quasistationary and transient simulations of a 5-finger SiGe HBT are carried out for both the models using QucsStudio.
Q6. What is the geometry factor for the STI and DTI?
The corresponding geometry factor fG(z) is evaluated with a symmetric lateral spread of θ (=46◦) or by a simple depth/area ratio (as applicable in different sections) and eventually the T (z) profile is obtained using (1).
Q7. What is the simplest way to capture the thermal effect of a transistor finger?
In practice, each transistor finger is to be modeled using separate electrical model where a thermal sub-circuit is available in order to capture the self-heating effect.