scispace - formally typeset
Search or ask a question
Journal ArticleDOI

An Efficient Thermal Model for Multifinger SiGe HBTs Under Real Operating Condition

TL;DR: This work presents a simple analytical model for electrothermal heating in multifinger bipolar transistors under realistic operating condition where all fingers are heating simultaneously and simulates 40% faster than the conventional model in a transient simulation of a five-finger transistor.
Abstract: In this work, we present a simple analytical model for electrothermal heating in multifinger bipolar transistors under realistic operating condition where all fingers are heating simultaneously. The proposed model intuitively incorporates the effect of thermal coupling among the neighboring fingers in the framework of self-heating bringing down the overall model complexity. Compared to the traditional thermal modeling approach for an ${n}$ -finger transistor where the number of circuit nodes increases as ${n}^{{2}}$ , our model requires only ${n}$ -number of nodes. The proposed model is scalable for any number of fingers and with different emitter geometries. The model is validated with 3-D thermal simulations and measured data from STMicroelectronics B4T technology. The Verilog-A implemented model simulates 40% faster than the conventional model in a transient simulation of a five-finger transistor.

Summary (2 min read)

Introduction

  • Therefore, it has been a common practice to partition a large emitter into smaller fingers each having small enough emitter width (WE) leading to a multi-finger transistor.
  • This makes the straightforward application of superposition to include both the self-heating and thermal coupling effects in calculating the overall finger temperature questionable.
  • Section II presents the elaborate model formulation with a hint towards model implementation.

II. MODEL FORMULATION

  • Electrothermal effect in HBTs causes heat generation at the base-collector junction.
  • Cross sectional view of (a) two-finger and (b) three-finger transistor structure with no trench isolation showing heat source, heat sink, isothermal lines and the imaginary boundaries.
  • In case of a system with three heat sources as shown in Fig. 2(b), the thermal boundaries of heat source in the middle are governed by two adjacent heat sources.
  • In order to accurately predict the temperature at each finger, an effective heat spreading angle (θ1) has to be defined between the adjacent heat sources as shown by the dashed lines in Fig. 2(b).
  • While testing against TCAD simulation (as presented in the next section) the authors have found that in most of the geometries θ = 46◦ yields excellent accuracy.

A. Comparison with 3D TCAD simulation

  • First, the authors test their proposed model against 3D TCAD thermal simulation results of multifinger SiGe HBT structures having no trench isolation.
  • Fig. 6(a) compares their modeling results for the T (z) variation with the 3D TCAD simulation data corresponding to the corner fingers in case of multifinger structures with STI.
  • As a next step, the authors test their model for multifinger transistor system where each finger is individually surrounded by STI and the whole transistor is housed within a deep trench isolation (DTI).
  • Since the heat flow volume inside the DTI region is equally shared among the fingers, this assumption leads to the prediction of the same temperature at the bottom of DTI and identical T (z) for all fingers.
  • The proposed model (solid lines) demonstrates an excellent agreement with the TCAD results .

IV. CONCLUSION

  • The authors have presented a simple, analytical, thermal model for multifinger SiGe HBTs.
  • The proposed model is highly accurate as it considers the temperature dependence of thermal conductivity of silicon and at the same time requires no extra circuit node to account for the thermal coupling effects between nearby fingers.
  • Other than the dissipated power, the input for the model are the dimensions and relative locations of emitter fingers and different trenches in order to compute the temperature at each finger.
  • The model is implemented within the framework of existing self-heating sub-circuit of the main electrical model of bipolar transistor.
  • The model is found to simulate 40% faster than the stateof-the-art thermal coupling model while tested for transient simulation.

Did you find this useful? Give us your feedback

Content maybe subject to copyright    Report

HAL Id: hal-03015948
https://hal.archives-ouvertes.fr/hal-03015948
Submitted on 20 Nov 2020
HAL is a multi-disciplinary open access
archive for the deposit and dissemination of sci-
entic research documents, whether they are pub-
lished or not. The documents may come from
teaching and research institutions in France or
abroad, or from public or private research centers.
L’archive ouverte pluridisciplinaire HAL, est
destinée au dépôt et à la diusion de documents
scientiques de niveau recherche, publiés ou non,
émanant des établissements d’enseignement et de
recherche français ou étrangers, des laboratoires
publics ou privés.
An Ecient Thermal Model for Multinger SiGe HBTs
Under Real Operating Condition
Nidhin K, Shubham Pande, Shon Yadav, Suresh Balanethiram, Deleep R
Nair, Sebastien Fregonese, Thomas Zimmer, Anjan Chakravorty
To cite this version:
Nidhin K, Shubham Pande, Shon Yadav, Suresh Balanethiram, Deleep R Nair, et al.. An Ecient
Thermal Model for Multinger SiGe HBTs Under Real Operating Condition. IEEE Transactions
on Electron Devices, Institute of Electrical and Electronics Engineers, 2020, 67 (11), pp.5069-5075.
�10.1109/TED.2020.3021626�. �hal-03015948�

1
An Efficient Thermal Model for Multifinger SiGe
HBTs under Real Operating Condition
Nidhin K, Shubham Pande, Shon Yadav, Suresh Balanethiram, Deleep R Nair, Sebastien Fregonese, Thomas
Zimmer, Senior Member, IEEE Anjan Chakravorty, Member, IEEE
Abstract—In this work, we present a simple analytical model
for electrothermal heating in multifinger bipolar transistors
under realistic operating condition where all fingers are heating
simultaneously. The proposed model intuitively incorporates the
effect of thermal coupling among the neighboring fingers in the
framework of self-heating bringing down the overall model com-
plexity. Compared to the traditional thermal modeling approach
for an n-finger transistor where the number of circuit nodes
increases as n
2
, our model requires only n-number of nodes.
The proposed model is scalable for any number of fingers and
with different emitter geometries. The model is validated with 3D
thermal simulations and measured data from STMicroelectronics
B4T technology. The Verilog-A implemented model simulates
40% faster than the conventional model in a transient simulation
of a five-finger transistor.
Index Terms—SiGe HBTs, multifinger transistor, electrother-
mal effect, thermal modeling, self-heating, thermal resistance.
I. INTRODUCTION
S
ILICON germanium heterojunction bipolar transistors
(SiGe HBTs) are popularly used as power amplifiers in
the RF front end modules. Power amplifiers are often expected
to have large emitter area in order to allow large amount of
currents. However, large emitter widths lead to a higher base
resistance resulting in a lower maximum oscillation frequency
(f
max
) of the device. Therefore, it has been a common practice
to partition a large emitter into smaller fingers each having
small enough emitter width (W
E
) leading to a multi-finger
transistor. Although in such a structure, each emitter finger
is electrically isolated by shallow trenches (ST), they are
thermally coupled through the common Silicon substrate.
Self heating is a serious problem in modern bipolar transis-
tors where lateral dimensions are significantly scaled down and
additional trench isolations are used. In case of multi-finger
transistors, additional thermal coupling from nearby fingers
further increases the device temperature. Conventionally, this
additional increment in temperature is captured by considering
Nidhin K, S. Pande, D. R. Nair, A. Chakravorty are with the Depart-
ment of Electrical Engineering, IIT Madras, Chennai 600036 India. email:
anjan@ee.iitm.ac.in.
S. Balanethiram is with the Department of Electronics and Communica-
tion Engineering, IIIT Tiruchirappali, Trichy 620015. email: sureshbalanethi-
ram@gmail.com
S. Yadav is with Globalfoundries, Bangalore.
S. Fregonese, and T. Zimmer are with IMS Laboratory, University of Bor-
deaux, 33400 Talence, France. email: sebastien.fregonese@ims-bordeaux.fr,
thomas.zimmer@ims-bordeaux.fr.
This work was supported in part by the EU under Project Taranto, in part
by ISRO project ELE/17-18/176/ISRO/ANJA and in part by Department of
Science and Technology, India, under Project EMR/2016/004726.The authors
would like to thank STMicroelectronics for providing the B9MW wafer.
thermal coupling effects from other nearby fingers. For the
calculation of the overall temperature at a finger, thermal
effect of each finger is considered at a time and finally all
effects are added up assuming the validity of superposition.
The temperature dependence of thermal conductivity makes
the temperature-power relationship nonlinear. This makes the
straightforward application of superposition to include both
the self-heating and thermal coupling effects in calculating
the overall finger temperature questionable. The real operating
condition within a power amplifier circuit exciting all the
fingers in a multi-finger transistor together instead of exciting
one finger at a time was elaborated in [1]. A state-of-the-
art static thermal model to cater the self-heating as well as
thermal coupling effects in an n-finger transistor requires n
2
number of nodes as reported in [2]. Besides, modeling thermal
coupling using voltage controlled-voltage-sources (VCVS) in
series with the self-heating resistances degrades the speed
performance of a thermal network as illustrated in [3].
In this work, we present an intuitive thermal model to
predict the overall temperature at each finger in a multifinger
transistor when all the fingers are excited together. Unlike the
conventional methods, our model uses no VCVS as the thermal
coupling effects are considered within the framework of self-
heating. Eventually, the use of superposition can be avoided
altogether resulting in just n number of nodes for an n-finger
transistor. The proposed model also considers the temperature-
dependent thermal conductivity of the semiconductor material
and does not need to use any superposition theorem to calcu-
late the overall device temperature at any finger. The paper is
organized as follows. Section II presents the elaborate model
formulation with a hint towards model implementation. Sec-
tion III presents a detailed model validation against 3D TCAD
simulation and experimental data. The speed performance of
the proposed model is also compared with the conventional
thermal model. Finally, we present our conclusions in section
IV.
II. MODEL FORMULATION
Electrothermal effect in HBTs causes heat generation at
the base-collector junction. Most of the generated heat flows
down towards the substrate contact because of the high thermal
resistance offered by the upward path due to the interlayer
dielectric of the back-end-of-line (BEOL) structures as re-
ported in [1], [4], [5]. Therefore, the upward heat-flow is
neglected in the initial analysis and is added later by adding an
effective BEOL thermal resistance in parallel. In the front-end-
of-line (FEOL) portion, the base and emitter regions are also
Published in: IEEE Transactions on Electron Devices (Volume: 67 , Issue: 11 , Nov. 2020)

2
T
j
T
amb
W
E
θ θ
x
z
y
z = 0
z = H
Fig. 1. Cross sectional view of a single finger bipolar transistor structure with
no trench isolation showing heat source, heat sink, isothermal lines and the
imaginary boundaries.
neglected because of their negligible thickness. This allows us
to model the emitter finger as a rectangular heat source on a
semi-infinite substrate as shown in Fig 1. Note that the effect
of base and emitter region can always be clubbed with the
BEOL thermal resistance. For modeling purpose, it is assumed
that the bottom of the substrate is maintained at an ambient
temperature (T
amb
) and the substrate extends to infinity in the
lateral directions. In case of multifinger transistor, multiple
heat sources are to be considered simultaneously under real
operating condition. The modern application circuits such as
power amplifiers are equipped with temperature insensitive
bias techniques to ensure a near constant operating current
[6]–[9]. Adopting such biasing techniques in a multifinger
transistor yields similar amount of collector current (I
C
)
through all the fingers at a given collector-emitter voltage
(V
CE
). This leads to an identical amount of power dissipation
(P
diss
) in each finger (since P
diss
I
C
× V
CE
). Accordingly
the modeling framework presented in this work assumed that
identical amount of P
diss
is generated at each finger.
Fig. 1 depicts the heat spread from a single heat source in
a semi-infinite environment. Vertical position (z) dependent
temperature variation, T (z), inside the system from the heat
source (at a temperature T
j
) to the heat sink (at T
amb
) is
indicated by the isothermal contours. In order to obtain a
simplified model for T (z) in such a system, a single heat-
spreading angle (θ) under conical approximation is used
defining the imaginary thermal boundary [10]. If P
diss
is the
power dissipated by the heat source, using average thermal
conductivity formulation [11], the temperature variation along
the z-direction (T (z)) can be written as
T (z) =
T
1α
ref
+ P
diss
f
G
(z)
1 α
β
1/(1α)
(1)
where T
ref
= T
amb
at z = H (signifying a heat-sink at the
substrate contact). α, β are the parameters of temperature
dependent thermal conductivity in Silicon, κ
si
(T ) = βT
α
[12]. f
G
(z) signifies the position dependent geometry factor
of the heat spread [13]. First, T (z) is evaluated at the heat sink
(z = H) with T
ref
= T
amb
in (1). Eventually, for calculating
T (z z), T (z) from the previous calculation is taken as T
ref
in (1). This is repeated to obtain the temperature variation for
all z in the system from heat sink to the heat source.
The above formulation can be generalized for an asymmetric
heat spread of a planar heat source with W as width in the
x-direction and L as length in the y-direction. In that case,
T
j1
T
j2
T
amb
s
θ θ
x
z
y
(a)
T
j1
T
j2
T
j3
T
amb
θ
θ
1
θ
1
θ
x
z
y
(b)
Fig. 2. Cross sectional view of (a) two-finger and (b) three-finger transistor
structure with no trench isolation showing heat source, heat sink, isothermal
lines and the imaginary boundaries.
the position-dependent cross-sectional area of the heat spread
can be written as [14]
A(x, y, z) = (W + (H z
x
).(L + (H z
y
) (2)
with
Θ
x
= tan(θ
x,l
) + tan(θ
x,r
) and Θ
y
= tan(θ
y,l
) + tan(θ
y,r
)
(3)
where H is the total height of the heat spread. Here θ
x,l
(θ
y,l
)
and θ
x,r
(θ
y,r
) are the heat spreading angles on the left and
right sides along W
E
(L
E
) respectively. Resultant geometry
factor can be obtained as
f
G
(z) =
Z
z
0
dz
0
A(x, y, z
0
)
=
ln
h
W (L+zΘ
x
)
L(W +zΘ
y
)
i
W Θ
y
LΘ
x
. (4)
This equation presents a generic formulation and can be
used to estimate the geometry factor of any asymmetric heat
spread. Note that (4) need not be used in case of vertical heat
spread, where a simple ratio between the height and the cross
sectional area yields f
G
(z). Accordingly, the depth-dependent
temperatures (including that at the heat source, z = 0) can be
obtained using (1). Note that our aim is to find out the finger
temperature i.e., at z = 0 and as such there is no need to
compute any other T (z). However, this calculation is exercised
in order to showcase the model’s capability to capture the
underlying physics and accordingly gain a confidence on the
proposed model.
Estimation of the temperatures becomes difficult for a
system with two or more heat sources. Consider a case in
which two heat sources (having same area) each dissipating
a power of P
diss
are kept close to each other (with centre-
to-centre spacing s in between them) along the x-direction as
shown in Fig. 2(a). Similar to the single-heat-source structure,
total heat spread of the system can be shown by dashed lines
with spreading angle θ (which may be equal to 45
) [10], [15].
For such a system, one can obtain the rise in temperature by

3
considering this overall heat spread and total power dissipation
of 2P
diss
. Alternatively, one can also obtain temperature rise at
one finger by defining individual heat spread. As the structure
is symmetric, one can intuitively say that T
1
(z) = T
2
(z).
Hence, the total heat spread in the x-z plane must be divided
into identical halves as shown by the dashed line in Fig. 2(a).
The vertical thermal boundary or zero spreading angle from
the z-point where the spread of the two heat sources intersect
essentially ensures equal heat flow volume in this case. This
divided heat-flow volume with power dissipation P
diss
yields
the same finger temperatures. In case of a system with three
heat sources as shown in Fig. 2(b), the thermal boundaries
of heat source in the middle are governed by two adjacent
heat sources. On the other hand, for the first and third heat
sources, only one thermal boundary depends on the adjacent
(middle) heat source and the other boundary is defined by a
heat spreading line of θ. Depending on the spreading angles
for individual heat sources, this framework can allow a higher
temperature rise at the second heat source compared to the
other two. However the first and third heat sources have an
equal rise in temperature (T
1
= T
3
) due to identical boundary
conditions. This is also evident from the identical isothermal
lines (obtained from TCAD simulation) under the first and
third heat sources as shown in Fig. 2(b). Under the second heat
source, these lines appear more crowded indicating a higher
temperature than the rest.
In order to accurately predict the temperature at each finger,
an effective heat spreading angle (θ
1
) has to be defined
between the adjacent heat sources as shown by the dashed lines
in Fig. 2(b). Prior to the intersection of the heat sources, the
spreading angles of all the heat sources were same θ. If θ
1
is
estimated accurately, separate geometry factors corresponding
to all heat sources can be obtained. Since all the fingers are
dissipating the same amount of power and since the heat flux
is continuous, the same amount of heat flux lines must be
crossing the x-y plane at the depth of intersection of the flux
lines from different fingers. Therefore, estimation of θ
1
can be
guided by a principle based on the symmetric total spreading
as elaborated below. In case of two-finger device, the first heat
spread in Fig. 2(a) is characterized by θ on one side and 0
on
other. A similar approach follows for the second heat spread
as well. Therefore, both the spreads have effective spreading
angle of θ + 0
. In case of three-finger device (Fig. 2(b)), heat
spread for the first finger has an angle of θ in one side and
θ
1
in the other. Similarly for the second finger, the angle is
θ
1
in both the sides. Equating the effective total angles of the
two fingers results into θ θ
1
= 2 × θ
1
yielding θ
1
= θ/3.
Therefore, the essential principle is to find out the total heat
spreading angle associated with each finger and to equate them
in order to obtain the effective heat spreading between the
adjacent heat sources. Extending this technique to a system
with n number of fingers, one can obtain a single equation
for heat spreading angles as
θ
i
=
θ
n
(n 2i) i = 1, 2, 3, ...
n
2
for even n,
i = 1, 2, 3, ...
n 1
2
for odd n.
(5)
Here θ is the angle of outer heat spreading for the corner
fingers. Note that the constant spreading angle framework does
not always ensure θ = 45
as have been reported in several
cases [15]–[17]. While testing against TCAD simulation (as
presented in the next section) we have found that in most of
the geometries θ = 46
yields excellent accuracy. Once the
heat spreading angles are obtained, they are used to compute
the cross-sectional area of each heat spread and the geometry
factors corresponding to each heating finger using (2) to (4)
and subsequently the temperature at each finger using (1).
In practice, each transistor finger is to be modeled using
separate electrical model where a thermal sub-circuit is avail-
able in order to capture the self-heating effect. Conventionally
the thermal coupling effect is captured by using a more com-
plicated thermal network that uses voltage-controlled voltage
sources [2]. In the present work, since we have computed the
geometry factor (f
G
) for each heating finger, the corresponding
thermal resistance is easily obtained and can be used within
the already existing self-heating network. This way one can get
rid of the thermal coupling network altogether and reduce the
overall node-count of the thermal network from n
2
(required
for conventional model) to just n for an n-finger transistor.
The resulting improvement in the simulation speed will be
discussed in the next section.
III. MODEL EVALUATION
A. Comparison with 3D TCAD simulation
First, we test our proposed model against 3D TCAD ther-
mal simulation results of multifinger SiGe HBT structures
having no trench isolation. Using Synopsys Sentaurus [18],
we simulated a single finger structure and four multifinger
structures with two, three, four and five fingers, respectively,
having an emitter area (A
E
) of 0.2×5 µm
2
for each finger.
Following the modeling framework, each heat source of area
0.2×5 µm
2
corresponding to each transistor finger is located
at the top of the Silicon substrate. A constant power of
30 mW is dissipated at each heating finger. This simulation
scenario is illustrated through a cross-sectional view (x-z
plane) of a 5-finger structure in Fig. 3. Each finger is isolated
from the neighboring finger with a centre-to-centre spacing
of s = 2.5 µm. The total simulated area of the substrate
is 300×300 µm
2
with a Silicon thickness of 100 µm. In the
TCAD simulation, values for the temperature coefficients of
thermal conductivity for Silicon, α = 1.263 and β = 2099
are used. For all the TCAD simulations, the bottom surface
is maintained at ambient temperature (T
amb
=300 K) and the
heat source injects a constant uniform heat flux into the
silicon substrate. All other surfaces, including the part of the
top surface not covered by the heat source, are considered
adiabatic.
Fig. 4(a) compares our model results for the z-dependent
temperature variation along the middle of the heat source
(T (z)) with TCAD simulation data corresponding to a single
finger structure and corner (first) fingers in case of multifinger
structures, without any trench isolation. Similarly, Fig. 4(b)
compares our model results for the T (z) variation with TCAD
simulation data corresponding to the internal fingers in multi-
finger structures without any trench isolation. Note that for

4
T
j2
T
j3
T
j4
T
j5
T
j1
θ
θ
1
θ
2
θ
2
θ
1
θ
z [µm]
x [µm]
Fig. 3. The imaginary boundary used in the model overlaid on the TCAD
simulated temperature profile in the x z plane of a 5-finger device without
any trenches. θ
1
and θ
2
can be calculated using (5). For θ = 46
, the resulting
values are θ
1
= 27.6
and θ
2
= 9.2
.
10
4
10
3
10
2
10
1
10
0
10
1
10
2
300
320
340
360
380
400
z [µm]
T (z) [K]
1-Finger
2-Finger
3-Finger
4-Finger
5-Finger
(a)
10
4
10
3
10
2
10
1
10
0
10
1
10
2
300
320
340
360
380
400
420
z [µm]
T (z) [K]
3-Finger pos 2
4-Finger pos 2
5-Finger pos 2
5-Finger pos 3
(b)
Fig. 4. T (z) variation at the middle of (a) corner (first) fingers (b) inner
fingers in multifinger structures without any trench isolation: a comparison
between TCAD simulation (symbols) and proposed model (lines).
optimum model fitting, we have used θ = 46
for all the
structures. Accordingly the spreading angles of internal fingers
are calculated using (5). Excellent model agreement with the
TCAD simulated T (z) data for all the structures builds up our
confidence in the calculation of all the heat spreading angles
corresponding to each finger and subsequently the imaginary
boundaries. This motivates us to extend our modeling frame-
work for shallow trench isolated (STI) isolated multifinger
transistor structures as detailed below.
In case of multifinger structure with STI, each finger is
housed within a STI with a constant finger-edge to trench-
edge distance of 0.14 µm along both x- and y-directions.
Cross sectional view of an ST-isolated 5-finger HBT structure
simulated in TCAD is shown in Fig. 5. Corresponding to
STMicroelectronics B4T technology, the width (and height)
of STI is chosen as 0.45 µm (and 0.36 µm) [19]. The material
chosen for the trench has very low thermal conductivity (SiO
2
with κ = 0.014 W/cm-K) compared to that of the substrate
material (Silicon). The dimensions of the substrate, emitter
finger(s) and finger spacing remain identical with the previous
study carried out for no-trench devices. A constant power of
30 mW is dissipated at each finger for the TCAD simulation
as well as for the model. In this case, the heat flow volume of
each finger is divided into three regions as shown in Fig. 5.
The symmetric trapezoidal volume within STI, followed by
T
j2
T
j3
T
j4
T
j5
T
j1
θ
θ
1
θ
2
θ
2
θ
1
θ
z [µm]
x [µm]
Fig. 5. The imaginary boundary used in the model overlaid on the TCAD
simulated temperature profile in the x z plane of a 5-finger device with
STI. Inset shows the region near STI.
10
4
10
3
10
2
10
1
10
0
10
1
10
2
300
320
340
360
380
400
420
440
z [µm]
T (z) [K]
2-Finger
3-Finger
4-Finger
5-Finger
(a)
10
4
10
3
10
2
10
1
10
0
10
1
10
2
300
350
400
450
z [µm]
T (z) [K]
3-Finger pos 2
4-Finger pos 2
5-Finger pos 2
5-Finger pos 3
(b)
Fig. 6. T (z) variation at the middle of (a) corner fingers (b) inner fingers
in multifinger structures with STI: a comparison between TCAD simulation
(symbols) and proposed model (lines).
the cuboidal volume within STI, and the rest below STI. Note
that in order to evaluate the temperature profile in the section
below STI, one can apply the proposed model from the bottom
of STI to the heat sink in the same fashion as explained in the
no-trench case. Temperature profile within STI can be obtained
following the technique generally applied for calculating the
self-heating temperature since no effect of thermal coupling
from other fingers need to be considered within this heat flow
volume. A simple depth/area ratio is used to calculate f
G
(z)
inside the cuboidal section and (4) is used for the remaining
sections.
Fig. 6(a) compares our modeling results for the T (z)
variation with the 3D TCAD simulation data corresponding to
the corner fingers in case of multifinger structures with STI.
Thermal boundaries corresponding to the internal fingers from
the bottom of the STI are estimated using (5). Eventually using
θ and θ
i
in (4) and then using (4) in (1) the overall temperature
profile is obtained. In Fig. 6(b), we compare our modeling
results for T (z) variation with the TCAD simulation data
corresponding to the internal fingers in multifinger structures
with STI. Excellent model agreement is observed both in
Fig. 6(a) and (b). Although our model assumes the STI to
be a prefect thermal insulator, TCAD simulation considers a
slight heat leakage through the STI due to the non-zero κ of
SiO
2
. However, model correlation with TCAD data justifies
our approximation of the perfect insulator used for SiO
2
. This

Citations
More filters
DOI

[...]

TL;DR: In this article , GaN vertical FinFETs on a bulk GaN substrate were fabricated with various fin widths and 400 ns pulsed I-V measurements were performed to investigate their self-heating and DC-RF dispersion.
Abstract: GaN vertical FinFETs on a bulk GaN substrate were fabricated with various fin widths and 400 ns pulsed I-V measurements were performed to investigate their self-heating and DC-RF dispersion. With low-temperature post-gate processes including Ar plasma-enhanced Ohmic contact, a high drain current density ( $>$ 175 kA cm $^{-{2}}$ ) and a low gate leakage ( $< 1\times 10^{-{17}}$ kA cm $^{-{2}}$ ) could be achieved simultaneously. When normalized by the active fin area, the specific on-resistance was 0.030 $\text{m}\Omega $ cm2 at the drain on-current of 119 kA cm $^{-{2}}$ for the 300 mm fin-width single-finger device. A 25-finger device with the same fin width and fin-to-fin pitch of 3 $\mu \text{m}$ showed the on-resistance of 0.043 $\text{m}\Omega $ cm2 (0.43 $\text{m}\Omega $ cm2 when normalized by the total device area of 6000 $\mu \text{m}^{{2}}$ ), which was one of the lowest values reported. Low DC-RF dispersion was observed for the devices more than 2.5 mm away from the wafer edge. This study also reports that more influence of self-heating was observed as the fin width scaled down or the number of fingers increased.
Journal ArticleDOI

[...]

TL;DR: In this article, a collector-base-emitter (CBE) SiGe HBT was merged into a single EBCBE SiGeHBT, not only to double its maximum voltage swing, but also to decrease its active area and parasitics.
Abstract: This letter proposes a new emitter-base-collector-base-emitter (EBCBE) SiGe HBT suited for high power RF switches. Two collector-base-emitter (CBE) SiGe HBTs are merged into a single EBCBE SiGe HBT, not only to double its maximum voltage swing, but also to decrease its active area and parasitics. To further boost its power handling, a capacitive voltage distribution and a collector floating are incorporated into the new EBCBE SiGe HBT. A X-band $\lambda $ /4 shunt single-pole-double-throw (SPDT) switch using the EBCBE SiGe HBT achieves measured insertion losses and isolations of 1.2/1.3 and 29.2/23.0 dB at 10 GHz in TX/RX modes, respectively. In TX mode, measured input 1-dB power compression ( $\text{P}_{\text {1dB}}$ ) is 25.4 dBm, and it can be extended to 28.5 dBm at −0.6 V base bias of the EBCBE SiGe HBT.
References
More filters
Journal ArticleDOI

[...]

TL;DR: In this article, a dual-band MMIC power amplifier with a single-chip MMIC and single-path output matching network is demonstrated by adopting a newly proposed on-chip linearizer, composed of the base-emitter diode of an active bias transistor and a capacitor to provide an RF short at the base node of the active bias transistors.
Abstract: A personal communications service/wide-band code division multiple access (PCS/W-CDMA) dual-band monolithic microwave integrated circuit (MMIC) power amplifier with a single-chip MMIC and a single-path output matching network is demonstrated by adopting a newly proposed on-chip linearizer. The linearizer is composed of the base-emitter diode of an active bias transistor and a capacitor to provide an RF short at the base node of the active bias transistor. The linearizer enhances the linearity of the power amplifier effectively for both PCS and W-CDMA bands with no additional DC power consumption, and has negligible insertion power loss with almost no increase in die area. It improves the input 1-dB gain compression point by 18.5 (20) dB and phase distortion by 6.1/spl deg/ (12.42/spl deg/) at an output power of 28 (28) dBm for the PCS (W-CDMA) band while keeping the base bias voltage of the power amplifier as designed. A PCS and W-CDMA dual-band InGaP heterojunction bipolar transistor MMIC power amplifier with single input and output and no switch for band selection is embodied by implementing the linearizer and by designing the amplifier to have broad-band characteristics. The dual-band power amplifier exhibits an output power of 30 (28.5) dBm, power-added efficiency of 39.5 % (36 %), and adjacent channel power ratio of -46 (-50) dBc at the output power of 28 (28) dBm under 3.4-V operation voltage for PCS (W-CDMA) applications.

129 citations

Journal ArticleDOI

[...]

TL;DR: In this article, the emitter ballasting resistor for power heterojunction bipolar transistors (HBTs) was investigated and the current handling capability of power HBTs was found to improve with ballasting resistance.
Abstract: A systematic investigation of the emitter ballasting resistor for power heterojunction bipolar transistors (HBTs) is presented. The current handling capability of power HBTs is found to improve with ballasting resistance. An equation for the optimal ballasting resistance is presented, where the effects of thermal conductivity of the substrate material and the temperature coefficient of the ballasting resistor are taken into account. Current levels of 400 to 800 mA/mm of emitter periphery at case temperatures of 25 to -80 degrees C for power AlGaAs/GaAs HBTs have been obtained using an on-chip lightly doped GaAs emitter ballasting resistor. Device temperature has been measured using both an infrared microradiometer and temperature-sensitive electrical parameters. Steady-state and transient thermal modeling are also performed. Although the measured temperature is spatially nonuniform, the modeling results show that such nonuniformities would occur for a uniform current distribution, as would be expected for an HBT with emitter ballasting resistors. >

122 citations


"An Efficient Thermal Model for Mult..." refers background in this paper

  • [...]

Book

[...]

25 Nov 2010
TL;DR: This book begins with an overview on the different device designs of modern bipolar transistors, along with their relevant operating conditions; while the subsequent chapter on transistor theory is subdivided into a review of mostly classical theories, brought into context with modern technology.
Abstract: "Compact Hierarchical Bipolar Transistor Modeling with HICUM" will be of great practical benefit to professionals from the process development, modeling and circuit design community who are interested in the application of bipolar transistors, which include the SiGe:C HBTs fabricated with existing cutting-edge process technology. This book begins with an overview on the different device designs of modern bipolar transistors, along with their relevant operating conditions; while the subsequent chapter on transistor theory is subdivided into a review of mostly classical theories, brought into context with modern technology, and a chapter on advanced theory that is required for understanding modern device designs. This book aims to provide a solid basis for the understanding of modern compact models.

109 citations


"An Efficient Thermal Model for Mult..." refers methods in this paper

  • [...]

Journal ArticleDOI

[...]

TL;DR: In this article, an extension of the constant angle heat spreading, taking into account chip and substrate dimensions, and changing the spreading angle accordingly, yields to closed form expressions accurate enough for most practical applications.
Abstract: The model presented in this work is based on an extension of the constant angle heat spreading, taking into account chip and substrate dimensions, and changing the spreading angle accordingly. This yields to closed form expressions accurate enough for most practical applications. Circular, square, and rectangular geometries have been analyzed and the results compared with Bessel and Fourier series-like solutions.

79 citations


"An Efficient Thermal Model for Mult..." refers background in this paper

  • [...]

Journal ArticleDOI

[...]

TL;DR: In this article, a computer program was written to perform steady-state analysis for hybrid circuits, where the output of the program gives the temperature of each power dissipating element in the hybrid, based upon solution of Laplace's equation in three dimensions using Fourier techniques.
Abstract: A computer program was written to perform steady-state analysis for hybrid circuits. The output of the program gives the temperature of each power dissipating element in the hybrid. The program is based upon solution of Laplace's equation in three dimensions using Fourier techniques. The assumptions made are: no convection or radiation, constant and isotropic thermal conductivity for any single material, and constant temperature at the bottom of the hybrid package. Bessel's inequality allows one to input the desired accuracy and to determine where the infinite series should be truncated. Theoretically, the program will attain any desired accuracy less than 100 percent, but practical considerations of computer run times limit accuracies to the 90- to 95-percent region. The program has been tested by comparing computer results to known theoretical exact solutions and to actual measurements on sample hybrids. When compared to known theoretical exact solutions, the computer result accuracy is between 95 and 100 percent. When compared to actual measurements on sample hybrids, the computer result accuracy is between 90 and 95 percent. This program has been used successfully on over twenty circuit designs. It has also been used to evaluate simpler types of thermal anal- yses.

51 citations


"An Efficient Thermal Model for Mult..." refers background in this paper

  • [...]

  • [...]

Frequently Asked Questions (7)
Q1. What are the contributions in "An efficient thermal model for multifinger sige hbts under real operating condition" ?

In this work, the authors present a simple analytical model for electrothermal heating in multifinger bipolar transistors under realistic operating condition where all fingers are heating simultaneously. 

The modern application circuits such as power amplifiers are equipped with temperature insensitive bias techniques to ensure a near constant operating current [6]–[9]. 

In the present work, since the authors have computed the geometry factor (fG) for each heating finger, the corresponding thermal resistance is easily obtained and can be used within the already existing self-heating network. 

In order to accurately predict the temperature at each finger, an effective heat spreading angle (θ1) has to be defined between the adjacent heat sources as shown by the dashed lines in Fig. 2(b). 

In order to quantify the speed improvement of their model over the stateof-the-art thermal model for multifinger transistor [2], quasistationary and transient simulations of a 5-finger SiGe HBT are carried out for both the models using QucsStudio. 

The corresponding geometry factor fG(z) is evaluated with a symmetric lateral spread of θ (=46◦) or by a simple depth/area ratio (as applicable in different sections) and eventually the T (z) profile is obtained using (1). 

In practice, each transistor finger is to be modeled using separate electrical model where a thermal sub-circuit is available in order to capture the self-heating effect.