# An electrically-programmable switched capacitor filter

TL;DR: The filter is designed so that binary changes in the sampling frequency provide new sets of center frequencies which smoothly continue the logarithmic progression, and the accuracy and reproducibility inherent in the switched capacitor approach are retained.

Abstract: Techniques are presented for the design of a second-order switched capacitor filter which has its frequency response parameters programmed by the application of digital control signals. Two different types of weighted capacitor arrays are used to achieve programmability in the center frequency, peak gain, and selectivity. Experimental results are given for an integrated NMOS version with eight logarithmically-spaced center frequencies programmed by a 3 bit digital word, and 64 Q and gain values programmed by two 6 bit words. The filter is designed so that binary changes in the sampling frequency provide new sets of center frequencies which smoothly continue the logarithmic progression. Since the response depends on monolithic MOS capacitor ratios, the accuracy and reproducibility inherent in the switched capacitor approach are retained.

##### Citations

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01 Mar 1993TL;DR: In this article, the authors presented design considerations for high-frequency CMOS continuous-time current-mode filters with differential current integrator with its gain constant set by a small-signal transconductance and a gate capacitance.

Abstract: Design considerations for high-frequency CMOS continuous-time current-mode filters are presented. The basic building block is a differential current integrator with its gain constant set by a small-signal transconductance and a gate capacitance. A prototype fifth-order low-pass ladder filter implemented in a standard digital 2 mu m n-well CMOS process achieved a -3 dB cutoff frequency (f/sub 0/) of 42 MHz; f/sub 0/ was tunable from 24 to 42 MHZ by varying a reference bias current from 50 to 150 mu A. Using a single 5 V power supply with a nominal reference current of 100 mu A, the five-pole filter dissipated 25.5 mW. The active filter area was 0.056 mm/sup 2//pole. With the minimum input signal defined as the input-referred noise integrated over a 40 MHz bandwidth, and the maximum input signal defined at the 1% total intermodulation distortion (TIMD) level, the measured dynamic range was 69 dB. A third-order elliptic low-pass ladder filter was also integrated in the 2 mu m n-well CMOS process to verify the implementation of finite transmission zeros. >

146 citations

### Cites background from "An electrically-programmable switch..."

...Thus, according to (1 3), Q can be varied by tuning the total capacitance [ 29 ] on the first stage....

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06 Apr 1998TL;DR: In this article, a programmable integrated circuit capacitor array includes a plurality of binarily weighted capacitors and switches that selectively couple the capacitors in parallel between first and second terminals.

Abstract: A programmable integrated circuit capacitor array includes a plurality of binarily weighted capacitors (16) and a plurality of switches (18) selectively coupling the capacitors in parallel between first and second terminals. A control circuit (10) responds to a plurality of capacitance selection inputs (CS0,1,2) in conjunction with a plurality of trim inputs (TR0,1) and a sign input (TRS) to produce a plurality of selection signals (SEL0,1...7) on control electrodes of the switches to couple one or more of the capacitors and thereby provide an accurate value of the desired capacitance between the first and second terminals despite any manufacturing deviations in capacitance per unit area.

89 citations

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TL;DR: A 6.4 μ W electrocorticography/EEG processing integrated circuit (EPIC) with 0.46 μVrms noise floor intended for emerging brain-computer interface (BCI) applications and measured results from in vivo ECoG recording from the primary motor cortex of an awake monkey are presented.

Abstract: Electrocorticography (ECoG) implants have recently demonstrated promising results towards potential use in brain-computer interfaces (BCIs). Spectral changes in ECoG signals can provide insight on functional mapping of sensorimotor cortex. We present a 6.4 μ W electrocorticography (ECoG)/electroencephalography (EEG) processing integrated circuit (EPIC) with 0.46 μVrms noise floor intended for emerging brain-computer interface (BCI) applications. This chip conditions the signal and simultaneously extracts energy in four fully programmable frequency bands. Functionality is demonstrated by tuning the four bands to important frequency bands used by ECoG/EEG applications: α (8-12 Hz), β (18-26 Hz), low-γ (30-50 Hz), and γ (70-100 Hz). Measured results from in vivo ECoG recording from the primary motor cortex of an awake monkey are presented.

73 citations

### Cites background from "An electrically-programmable switch..."

...components or trimming because frequency response depends on monolithic capacitor ratios and clock frequency [31]....

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...In capacitor banks, unused capacitors are connected to the output on one end, and virtual ground on the other to reduce switching glitches in the output [31]....

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TL;DR: Although the SC oscillator is practical only when its oscillating frequency is less than about 1/25 the clock frequency, it is useful in a number of low frequency applications, especially when stability is important.

Abstract: A new switched-capacitor (SC) oscillator is described. The oscillator is easily modified to be either voltage controlled or digitally programmed. Although the oscillator is practical only when its oscillating frequency is less than about 1/25 the clock frequency (because of the excess phase jitter that develops at higher ratios), it is useful in a number of low frequency applications, especially when stability is important.

57 citations

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13 Jul 1992

TL;DR: Analog-signal integrators have a transfer function containing a composite parameter that is the product of two parameters each of which is separately changeable, via application of digital programming signals.

Abstract: Analog-signal integrators are described that have a transfer function containing a composite parameter that is the product of two parameters each of which is separately changeable, via application of digital programming signals. In a continuous analog-signal integrator the integrating capacitor is a programmable capacitor array, preceded in the feed back branch with a programmable voltage divider. In a discrete-time analog-signal integrator the integrating resistor is a switched-capacitor resistor including a programmable capacitor array that is preceded in the input circuit branch by a programmable voltage divider.

55 citations

##### References

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TL;DR: The theory emphasizes the decomposition into second-order systems that are developed, following state-space concepts, with special reference to their sensitivity, which is shown to be very low for high operational amplifier gains.

Abstract: Using state-variable flow graphs and simple operational configurations suitable for integration, a theory for insensitive transfer function realization in terms of integrated circuits is discussed. The theory emphasizes the decomposition into second-order systems that are developed, following state-space concepts, with special reference to their sensitivity which is shown to be very low for high operational amplifier gains.

328 citations

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TL;DR: A new technique to analog sampled data filtering is presented which can be fully integrated using MOS technology, and advantages of this new approach are reduced circuit complexity, low sensitivity to coefficient variations, and efficient utilization of silicon area.

Abstract: A new technique to analog sampled data filtering is presented which can be fully integrated using MOS technology. Advantages of this new approach are reduced circuit complexity, low sensitivity to coefficient variations, and efficient utilization of silicon area. Performance of monolithic low Q(Q=1) and high Q(Q=73) filters are presented which were implemented using NMOS technology. In implementing the high Q filter a new operational amplifier design was used which had a 14-V output range, rms noise voltage of 45 /spl mu/V, an open-loop gain of 6000, and a unity-gain bandwidth of 2 MHz.

282 citations

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01 Jan 1979TL;DR: In this paper, the basic operation of switched-capacitor filters is reviewed, followed by a discussion of the properties of the various circuit building blocks in MOS technology, and a summary of several filter organizations which appear to be well suited to switch-capACitor implementation is presented.

Abstract: In the past several years, much progress has been made in bringing the economies of integrated-circuit technology to bear on the realization of voiceband frequency selective filters. This paper will review one approach to this problem, the use of switched-capacitor techniques. The paper emphasizes the practical aspects of switched-capacitor filter design under the constraints imposed by MOS integrated-circuit technology. The basic operation of switched-capacitor filters is reviewed, followed by a discussion of the properties of the various circuit building blocks in MOS technology. Finally, a summary of several filter organizations which appear to be well suited to switched-capacitor implementation is presented.

238 citations

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TL;DR: In this paper, the authors describe design techniques for monolithic, high-precision, MOS sampled-data active-ladder filters, which are used to simulate doubly terminated LC ladder networks.

Abstract: Design techniques for monolithic, high-precision, MOS sampled-data active-ladder filters are described. Switched capacitor integrators are used to implement the "leapfrog" configuration for simulating doubly terminated LC ladder networks. Techniques are presented for designing all-pole low-pass filters, as well as methods for including transmission zeros. An approach for implementing bandpass filters is described which is derived from the conventional low-pass-to-bandpass transformation. Monolithic realizations for two different low-pass filters are briefly described which show excellent agreement with theory.

217 citations

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TL;DR: In this paper, a class of low-sensitivity digital ladder filters may be realized in the voltage-current domain by direct analogy with the continuous resistively terminated LC ladder filter by using transformations that correspond to LC elements that exhibit finite Cube factors.

Abstract: A class of low-sensitivity digital ladder filters may be realized in the voltage-current domain by direct analogy with the continuous resistively terminated LC ladder filter The problem of unrealizability that is implied by delay-free loops in the discrete signal flow graph is overcome by using transformations that correspond to LC elements that exhibit finite Cube factors The resultant deterioration in the passband of the transfer function is determined from the Blowstein LC ladder sensitivity theory and is, thereby, shown to be low valued at high sampling frequencies The sensitivity properties of this class of digital ladder filters are directly analogous to the LC prototype because each LC element is replaced by a digital multiplier Consequently, if maximum power transfer is approximately maintained throughout the passband of the LC prototype, then the first-order sensitivity of the corresponding digital transfer function to multiply a coefficient quantization is necessarily low valued

200 citations