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Proceedings ArticleDOI

An FPGA based implementation of baseband and passband modulation for wireless transmitters

TL;DR: A complete hardware architecture for transmitter is presented which is then synthesized and mapped on the Spartan 3E FPGA kit, which is particularly suited for use in a typical WiMAX environment or any other SDR based system that performs downstream digital signal processing.
Abstract: There is a plethora of silicon options available for implementing the various functions of a transmitter, but FPGAs are an attractive alternative for many of these tasks due to performance, power consumption and flexibility. This paper presents a complete hardware architecture for transmitter which is then synthesized and mapped on the Spartan 3E FPGA kit. The transmitter carries out data formatting, NRZ line encoding, baseband modulation, pulse shaping and passband modulation. A ROM based raised cosine filter is designed to mitigate the effects of Inter-symbol Interference. Passband modulation is accomplished by designing hardware using Direct Digital Synthesizer. A dedicated module to introduce channel imperfections is also designed to study the behavior of transmitter on practical interfaces. The implemented subsystem is particularly suited for use in a typical WiMAX environment or any other SDR based system that performs downstream digital signal processing.
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Journal ArticleDOI
Joseph Mitola1
TL;DR: A closer look at the canonical functional partitioning of channel coding into antenna, RF, IF, baseband, and bitstream segments and a brief treatment of the economics and likely future directions of software radio technology are provided.
Abstract: As communications technology continues its rapid transition from analog to digital, more functions of contemporary radio systems are implemented in software, leading toward the software radio. This article provides a tutorial review of software radio architectures and technology, highlighting benefits, pitfalls, and lessons learned. This includes a closer look at the canonical functional partitioning of channel coding into antenna, RF, IF, baseband, and bitstream segments. A more detailed look at the estimation of demand for critical resources is key. This leads to a discussion of affordable hardware configurations, the mapping of functions to component hardware, and related software tools. This article then concludes with a brief treatment of the economics and likely future directions of software radio technology. >

2,002 citations

Journal ArticleDOI
TL;DR: How emerging FPGA technology's unique combination of size and power efficiency plus field programmability offers a transition of FPCAs from ASIC prototyping to embedded products is described.
Abstract: As new radio standards are deployed without substantially supplanting existing ones, the need for multimode multiband handsets and infrastructure increases. This article describes how emerging FPGA technology's unique combination of size and power efficiency plus field programmability offers a transition of FPCAs from ASIC prototyping to embedded products. Software-defined receiver examples suggest an enlarged role for FPGAs in pragmatic paths toward the productization of software radio technology.

256 citations

Proceedings ArticleDOI
07 Apr 2008
TL;DR: This paper demonstrates a practical design and implementation procedure for a wireless digital modem on software defined radio platforms and reports a detailed description of the baseband signal processing logic design in the FPGA portion of it.
Abstract: Software defined radio (SDR) is an important element of wireless technology and fast becoming a hot topic in the telecommunication field. Determining the digital hardware composition of a software radio is a key design step in its creation. Hybrid GPP/DSP/FPGA architecture is a viable solution for software defined radio technology. This paper demonstrates a practical design and implementation procedure for a wireless digital modem on software defined radio platforms and reports a detailed description of the baseband signal processing logic design in the FPGA portion of it. Design verification is performed through hardware in the loop testing methodology. A framework for designing wireless digital modems on hybrid software radio platforms is discussed.

24 citations


"An FPGA based implementation of bas..." refers background in this paper

  • ...Processing blocks in a transmitter sub-system Some work on BPSK implementations has already been carried out on GPP/DSP/FPGA or a hybrid of these platforms [6] [7]....

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Journal ArticleDOI
TL;DR: The merits of good FPGA designs must parallelize at every opportunity, minimize timing delays through intelligent floor planning, and use each logic block to its fullest are demonstrated by comparing the performance of popular finite field multiplier designs.
Abstract: Among the various tasks performed by software radios is the reconfiguration of the error control coding algorithm to match the requirement of the radio personality. In the digital radio processor, proper assignment of tasks between DSPs and FPGAs provides performance improvements over the use of DSPs alone. Error control coding functions are good candidates to reside on the FPGA side of this functional partition. Unfortunately, good VLSI designs for codes using BCH or Reed-Solomon codes do not map well to FPGAs. Good FPGA designs must parallelize at every opportunity, minimize timing delays through intelligent floor planning, and use each logic block to its fullest. We demonstrate the merits of these concepts by comparing the performance of popular finite field multiplier designs.

20 citations

Proceedings ArticleDOI
16 Oct 2006
TL;DR: An overview of the main aspects of the enabling devices and systems of software defined radios, and shed light on the design methods and tools available to link the algorithmic and implementation domains to help to achieve design optimisation and shorten the prototyping time is presented.
Abstract: A software defined radios (SDR) is highly configurable hardware and software platforms that enable the implementation of the rapidly expanding 3G and 4G digital wireless communication infrastructures. Many sophisticated signal processing tasks are performed in a SDR, for example: channel estimation, equalisation, forward error correction, adaptive antennas, rake receiving, modulation, advanced compression algorithms, and vocoding. There are many silicon solutions for implementing the various functions of SDR, mainly: field programmable gate array (FPGA), digital signal processor (DSP), general purpose processor (GPP) and application specific IC (ASIC). This paper presents an overview of the main aspects of these enabling devices and systems. Also, we shed light on the design methods and tools available to link the algorithmic and implementation domains to help to achieve design optimisation and shorten the prototyping time. Finally, we suggest a generalized SDR scheme, FPGA+DSP based, and that is suitable for several mobile air interfaces

17 citations


"An FPGA based implementation of bas..." refers background in this paper

  • ...8 Electronic Devices Volume 3 Number 1 March 2014 (ASICs) [5]....

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