TL;DR: An approach for system design architecture optimization driven by the safety and cost constraints is proposed that takes into account the safety constraints in the ISO 26262 context and allows, at one hand, to reach a system preliminary architecture by choosing the best component that reduce the overall cost.
Abstract: Safety critical systems are present, today, almost in every car. They ensure different functionalities such as braking, steering and airbag deployment etc… The failure of these systems could lead to hazardous situations. To ensure that the risk in these systems is reduced to an acceptable level, the automotive industry refers to ISO-26262. It is the functional safety standard for electrical and electronic systems in road vehicles. It focuses on the requirements, processes and methods to deal with the ef fects of systematic failures and unsystematic hardware failures. Reaching a compliant design is, often, challenging particularly for high safety constraints systems. It has been also noted that, sometimes, due to safety constraints a design could lead to a cost derive. Ensuring that the design remains competitive in terms of cost is vital. With the growing complexity in funct ionalities and in size, the system design cycle can benefit from an approach that can help the designers make the best architectural choices to reach an optimal design. In this paper, we propose an approach for system design architecture optimization driven by the safety and cost constraints. It consists of an architecture synthesis and mapping approach that takes into account the safety constraints in the ISO 26262 context. It allows, at one hand, to reach a system preliminary architecture by choosing the best component that reduce the overall cost. On the other hand, it leads to a mapping that respects the safety constraints related to safety levels or to dependant failures.
TL;DR: An architecture synthesis and mapping approach that takes into account the safety constraints in the ISO 26262 context is proposed that allows, at one hand, to reach a system preliminary architecture by choosing the best component that reduce the overall cost.
Abstract: In this paper, we propose an approach for system design and architecture optimization driven by safety and cost constraints. It consists of an architecture synthesis and mapping approach that takes into account the safety constraints in the ISO 26262 context. It allows, at one hand, to reach a system preliminary architecture by choosing the best component that reduce the overall cost. On the other hand, it leads to a mapping that respects the safety constraints related to safety levels and to dependent failures. We use exhaustive and genetic algorithm based approaches for the optimization. The use of these two approaches depends on the size of the considered problem. We demonstrate that these approaches can be used efficiently to reach an optimal design.
4 citations
Cites background from "An Optimization Approach for Automo..."
...The first steps are described in further details in [8]....
TL;DR: SystemCoDesigner is the first fully automated ESL synthesis tool providing a correct-by-construction generation of hardware/software SoC implementations, and is presented as a case study, a model of a Motion-JPEG decoder was automatically optimized and implemented using System coDesigner.
Abstract: With increasing design complexity, the gap from ESL (Electronic System Level) design to RTL synthesis becomes more and more crucial to many industrial projects. Although several behavioral synthesis tools exist to automatically generate synthesizable RTL code from C/C++/SystemC-based input descriptions and software generation for embedded processors is automated as well, an efficient ESL synthesis methodology combining both is still missing. This article presents SystemCoDesigner, a novel SystemC-based ESL tool to automatically optimize a hardware/software SoC (System on Chip) implementation with respect to several objectives. Starting from a SystemC behavioral model, SystemCoDesigner automatically extracts the mathematical model, performs a behavioral synthesis step, and explores the multiobjective design space using state-of-the-art multiobjective optimization algorithms. During design space exploration, a single design point is evaluated by simulating highly accurate performance models, which are automatically generated from the SystemC behavioral model and the behavioral synthesis results. Moreover, SystemCoDesigner permits the automatic generation of bit streams for FPGA targets from any previously optimized SoC implementation. Thus SystemCoDesigner is the first fully automated ESL synthesis tool providing a correct-by-construction generation of hardware/software SoC implementations. As a case study, a model of a Motion-JPEG decoder was automatically optimized and implemented using SystemCoDesigner. Several synthesized SoC variants based on this model show different tradeoffs between required hardware costs and achieved system throughput, ranging from software-only solutions to pure hardware implementations that reach real-time performance for QCIF streams on a 50MHz FPGA.
255 citations
"An Optimization Approach for Automo..." refers methods in this paper
...We may cite for example Daedalus(Nikolov and Thompson 2008), SystemCoDesigner (Keinert et al. 2009), System-On-chip Environment (Dömer et al. 2008) ....
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...―SystemCoDesigner—an Automatic ESL Synthesis Approach by Design Space Exploration and Behavioral Synthesis for Streaming Applications....
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...We may cite for example Daedalus(Nikolov and Thompson 2008), SystemCoDesigner (Keinert et al. 2009), System-On-chip Environment (Dömer et al....
TL;DR: An extendable Eclipse-based tool is presented, called ArcheOpterix, which provides a framework to implement evaluation techniques and optimization heuristics for AADL specifications, and experiments with a set of initial deployment architectures provide evidence that the tool can successfully find architecture specifications with better quality.
Abstract: For embedded systems quality requirements are equally if not even more important than functional requirements. The foundation for the fulfillment of these quality requirements has to be set in the architecture design phase. However, finding a suitable architecture design is a difficult task for software and system architects. Some of the reasons for this are an ever-increasing complexity of today's systems, strict design constraints and conflicting quality requirements. To simplify the task, this paper presents an extendable Eclipse-based tool, called ArcheOpterix, which provides a framework to implement evaluation techniques and optimization heuristics for AADL specifications. Currently, evolutionary strategies have been implemented to identify optimized deployment architectures with respect to multiple quality objectives and design constraints. Experiments with a set of initial deployment architectures provide evidence that the tool can successfully find architecture specifications with better quality.
181 citations
"An Optimization Approach for Automo..." refers methods in this paper
...In the automotive domain context, Archeopterix (Aleti and Bjornander 2009) adopted a slightly similar approach to ESL synthesis methodologies....
TL;DR: This paper develops and proposes a novel classification for ESL synthesis tools, and presents six different academic approaches in this context based on common principles and needs that are ultimately required for a true ESL synthesis solution.
Abstract: With ever-increasing system complexities, all major semiconductor roadmaps have identified the need for moving to higher levels of abstraction in order to increase productivity in electronic system design. Most recently, many approaches and tools that claim to realize and support a design process at the so-called electronic system level (ESL) have emerged. However, faced with the vast complexity challenges, in most cases at best, only partial solutions are available. In this paper, we develop and propose a novel classification for ESL synthesis tools, and we will present six different academic approaches in this context. Based on these observations, we can identify such common principles and needs as they are leading toward and are ultimately required for a true ESL synthesis solution, covering the whole design process from specification to implementation for complete systems across hardware and software boundaries.
TL;DR: This paper describes the first industrial deployment experiences with the Daedalus framework and performs a DSE study with a JPEG encoder application, which exploits both task and data parallelism.
Abstract: Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which design space exploration (DSE), system-level synthesis, application mapping, and system prototyping of MP-SoCs are highly automated. In this paper, we describe our first industrial deployment experiences with the Daedalus framework. Daedalus is currently being deployed in the early stages of the design of an image compression system for very high resolution cameras targeting medical appliances. In this context, we performed a DSE study with a JPEG encoder application, which exploits both task and data parallelism. This application was mapped onto a range of different MP-SoC architectures. We achieved a performance speed-up of up to 20 x compared to a single processor system. In addition, the results show that the Daedalus high-level MP-SoC models accurately predict the overall system performance, i.e., the performance error is around 5%.
153 citations
"An Optimization Approach for Automo..." refers methods in this paper
...We may cite for example Daedalus(Nikolov and Thompson 2008), SystemCoDesigner (Keinert et al. 2009), System-On-chip Environment (Dömer et al. 2008) ....
TL;DR: The Hierarchically Performed Hazard Origin & Propagation Studies (HiP-HOPS) as discussed by the authors is a state-of-the-art approach for failure analysis.
147 citations
"An Optimization Approach for Automo..." refers methods in this paper
...While the approaches presented above focus on optimizing the mapping, the approach proposed by HIP-HOPS (Papadopoulos et al. 2011) focus on the redundancies introduction and the ASIL allocation as an optimization approach....
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...On the other hand, while it may still introduce redundancies in the architecture, it remains different from HIP-HOPS approach since the redundancies is not systematically introduced but results from the combination of functional decomposition, ASIL allocation and mapping onto an element....