Analysis, modeling, design and implementation of average current mode control for interleaved boost converter
Citations
2 citations
1 citations
Cites background from "Analysis, modeling, design and impl..."
...For operation in a stable mode, the BW of the converter is kept much smaller than the right half plane zero frequency of supercapacitor [270]....
[...]
1 citations
Cites result from "Analysis, modeling, design and impl..."
...Similar approach is also shown in [10] for an interleaved boost topology, which is the converter presented herein operating when the battery provides energy to the system (battery discharges)....
[...]
1 citations
1 citations
References
6,136 citations
611 citations
"Analysis, modeling, design and impl..." refers background in this paper
...Steady state gain and noise immunity are high in ACC [8]....
[...]
...ACC is free from instability problems unlike peak current mode control which requires slope compensation to make it stable at duty ratio D > 0.5....
[...]
...The control structure for ACC of interleaved boost converter shown in Fig.1 consists of two current loop controllers (HiL1(s), HiL2(s)) and one voltage loop controller (Hv(s))....
[...]
...Average current-mode control (ACC) is well established and it has advantages of achieving higher bandwidths when compared to voltage mode control [7]....
[...]
347 citations
"Analysis, modeling, design and impl..." refers methods in this paper
...State space averaging method is used to obtain small signal model of the converter [9]-[11]....
[...]
322 citations
"Analysis, modeling, design and impl..." refers background in this paper
...These paralleled converters can be operated in interleaved mode [3]&[4], where interleaving is process of operating boost converters in parallel, with a phase shift between their gate drive signals....
[...]
135 citations