Analytical Evaluation of VCO-ADC Quantization Noise Spectrum Using Pulse Frequency Modulation
TL;DR: This letter shows that the discrete Fourier transform of a VCO-ADC output sequence can be calculated analytically for single tone inputs and the SNDR predictions of the proposed model have been compared to behavioral simulations displaying only a deviation of 0.7 dB.
Abstract: Oversampled ADCs based on voltage-controlled oscillators have been analyzed using statistical models inherited from sigma-delta modulation. This letter shows that the discrete Fourier transform of a VCO-ADC output sequence can be calculated analytically for single tone inputs. The calculation is based on the transformation of the VCO output into a pulse frequency modulated signal that can be represented by a trigonometric series. Knowledge of the VCO-ADC output spectrum allows accurate evaluation of the SNDR dependence with the VCO oscillation frequency and gain constant. The SNDR predictions of the proposed model have been compared to behavioral simulations displaying only a deviation of 0.7 dB.
Citations
More filters
TL;DR: The architectural concept and implementation of a mostly digital voltage-controlled oscillator-analog-to-digital converter (VCO-ADC) with third-order quantization noise shaping and how this combination can function as a continuous- time integrator to form a high-order continuous-time sigma–delta modulator (CT-SDM) is presented.
Abstract: This paper presents the architectural concept and implementation of a mostly digital voltage-controlled oscillator-analog-to-digital converter (VCO-ADC) with third-order quantization noise shaping. The system is based on the combination of a VCO and a digital counter. It is shown how this combination can function as a continuous-time integrator to form a high-order continuous-time sigma–delta modulator (CT-SDM). The counter consists only of digital building blocks, and the VCOs are implemented using ring oscillators, which are also digital-friendly. No traditional analog blocks, such as opamps, OTAs, or comparators, are used. As a proof of concept, we have implemented a third-order VCO-based CT-SDM for a 10-MHz bandwidth in the low-power version of a 65-nm CMOS technology. This prototype shows a measured performance of 71/66.2/62.5-dB DR/SNR/SNDR at a 10-MHz bandwidth while consuming 1.8 mW from a 1.0-V analog and 1.9 mW from a 1.2-V digital supply. With digital calibration, the nonlinearity could be pushed below the noise level, leading to an improved peak SNDR of 66 dB.
60 citations
Cites background from "Analytical Evaluation of VCO-ADC Qu..."
...In this case, the signal prior to quantization can be reconstructed by low-pass filtering the quantized signal, and the quantized signal consists of a useful low-frequency component and highfrequency modulation spurs (which are at integer multiples of the VCO frequency) [28]....
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...The property was proven rigorously for the case of an input sine wave in [28] and for a more general class of bandwidth limited signals in [29]....
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TL;DR: This paper proposes to study voltage controlled oscillators (VCOs) based on the equivalence with pulse frequency modulators (PFMs) and describes circuit techniques to achieve a good approximation of the required pulse waveforms, which can easily be implemented by practical circuits.
Abstract: In this paper, we propose to study voltage controlled oscillators (VCOs) based on the equivalence with pulse frequency modulators (PFMs). This approach is applied to the analysis of VCO-based analog-to-digital converters (VCO-ADCs) and deviates significantly from the conventional interpretation, where VCO-ADCs have been described as the first-order $\Delta \Sigma $ modulators. A first advantage of our approach is that it unveils systematic error components not described by the equivalence with a conventional $\Delta \Sigma $ modulator. A second advantage is that, by a proper selection of the pulses generated by the PFM, we can theoretically construct an open loop VCO-ADC with an arbitrary noise shaping order. Unfortunately, with the exception of the first-order noise shaping case, the required pulse waveforms cannot easily be implemented on the circuit level. However, we describe circuit techniques to achieve a good approximation of the required pulse waveforms, which can easily be implemented by practical circuits. Finally, our approach enables a straightforward description of multistage $\Delta \Sigma $ modulator architectures, which is an alternative and practically feasible way to realize a VCO-ADC with extended noise shaping.
52 citations
Cites background from "Analytical Evaluation of VCO-ADC Qu..."
...The main target of this paper is to extend the mathematical foundations of [29] and to derive new VCO-based data converter architectures....
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...Building forth on [27], exact analytical expressions for the output spectrum of a VCO-ADC were calculated in [29]....
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...1(a) behaves similarly but automatically forces the sinc filter delay to be coincident with the sampling period [29]....
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...For the specific case of a zero order hold filter (of first order sinc, n = 1), a detailed analytical elaboration of the aliasing process is worked out in [29]....
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...For a sinusoidal input x(t), the signal d(t) can be expanded into a trigonometric series [29], [30], [33]....
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TL;DR: The basic principles of time encoding applied to analog-to-digital converters (ADCs) based on voltage-controlled oscillators (VCOs), one of the most successful time-encoding techniques to date are reviewed.
Abstract: The scaling of CMOS technology deep into the nanometer range has created challenges for the design of highperformance analog ICs The shrinking supply voltage and presence of mismatch and noise restrain the dynamic range, causing analog circuits to be large in area and have a high power consumption in spite of the process scaling Analog circuits based on time encoding [1], [2] and hybrid analog/digital signal processing [3] have been developed to overcome these issues Realizing analog circuit functionality with highly digital circuits results in more scalable design solutions that can achieve excellent performance This article reviews the basic principles of time encoding applied, in particular, to analog-to-digital converters (ADCs) based on voltage-controlled oscillators (VCOs), one of the most successful time-encoding techniques to date
44 citations
Cites background from "Analytical Evaluation of VCO-ADC Qu..."
...IEEE SOLID-STATE CIRCUITS MAGAZINE SPRING 2020 51 [33], [34]....
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TL;DR: A model to estimate the influence of phase noise in the performance of an oscillator-based system by reflecting the phase noise to the oscillator input is proposed, based on periodic steady-state analysis tools to predict the SNR of the oscillators.
Abstract: This paper analyzes the influence of phase noise and distortion on the performance of oscillator-based sensor data acquisition systems. Circuit noise inherent to the oscillator circuit manifests as phase noise and limits the SNR. Moreover, oscillator nonlinearity generates distortion for large input signals. Phase noise analysis of oscillators is well known in the literature, but the relationship between phase noise and the SNR of an oscillator-based sensor is not straightforward. This paper proposes a model to estimate the influence of phase noise in the performance of an oscillator-based system by reflecting the phase noise to the oscillator input. The proposed model is based on periodic steady-state analysis tools to predict the SNR of the oscillator. The accuracy of this model has been validated by both simulation and experiment in a 130 nm CMOS prototype. We also propose a method to estimate the SNDR and the dynamic range of an oscillator-based readout circuit that improves by more than one order of magnitude the simulation time compared to standard time domain simulations. This speed up enables the optimization and verification of this kind of systems with iterative algorithms.
31 citations
Cites background or methods from "Analytical Evaluation of VCO-ADC Qu..."
...The combination of an oscillator and the F2D converter of Figure 1 works as a continuous-time first-order Σ∆ modulator (CTΣ∆M), which shows first-order noise-shaping [15,16]....
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...The gain of this XOR-based VCO-ADC can be derived from the term BB introduced in [16]....
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TL;DR: In this article, a compact area, low power, and highly digital analog-to-digital converter (ADC) for audio applications is presented, which is implemented using only oscillators and digital circuitry, without operational amplifiers nor other highly linear circuits.
Abstract: This paper presents a compact-area, low-power, highly digital analog-to-digital converter (ADC) for audio applications. The proposed converter is implemented using only oscillators and digital circuitry, without operational amplifiers nor other highly linear circuits. The ADC consists of two twin second-order $\Sigma \Delta $ modulators, which can work both individually or in a pseudodifferential configuration. The proposed system has been implemented in a 0.13- $\mu \text{m}$ standard CMOS technology. The single-ended configuration occupies an active area of 0.02 mm2, is powered at 1.8 V with a current consumption of 155 $\mu \text{A}$ , and achieves an A-weighted dynamic range (DR) of 98 dB-A. The pseudodifferential configuration achieves 103 dB-A of A-weighted DR at the expense of doubling the area and power consumption.
27 citations
References
More filters
TL;DR: In this article, the performance of VCO-based ADCs in the presence of nonidealities such as jitter, nonlinearity, mismatch, and the metastability of D flip-flops is analyzed.
Abstract: A voltage-controlled oscillator (VCO) based analog-to-digital converter (ADC) is a time-based architecture with a first-order noise-shaping property, which can be implemented using a VCO and digital circuits. This paper analyzes the performance of VCO-based ADCs in the presence of nonidealities such as jitter, nonlinearity, mismatch, and the metastability of D flip-flops. Based on this analysis, design criteria for determining parameters for VCO-based ADCs are described. In addition, a digital calibration technique to enhance the spurious-free dynamic range degraded by the nonlinearity is also introduced. To verify the theoretical analysis, a prototype chip is implemented in a 0.13-?m CMOS process. With a 500-MHz sampling frequency, the prototype achieves a signal-to-noise ratio ranging from 71.8 to 21.3 dB for an input bandwidth of 100 kHz-247 MHz, while dissipating 12.6 mW and occupying an area of 0.078 mm2.
253 citations
Dissertation•
01 Jan 2008
TL;DR: This paper analyzes the performance of VCO-based ADCs in the presence of nonidealities such as jitter, nonlinearity, mismatch, and the metastability of D flip-flops and design criteria for determining parameters for VCO and digital ADCs are described.
230 citations
"Analytical Evaluation of VCO-ADC Qu..." refers background or methods in this paper
...1 displays the diagram of a single-bit VCO-ADC....
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...A characterization of its quantization noise spectrum and signal-to-quantization noise ratio (SQNR) would represent a valuable design tool....
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...Digital Object Identifier 10.1109/LSP.2014.2357071 In this letter, we propose an analysis complementary to [3], [4], in which a VCO-ADC is first transformed into a pulse frequency modulator whose spectrum is well known [10]–[12]....
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...1 where the XOR gate and discrete unit delay have been moved to the left side of the sampler....
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TL;DR: In this paper, the first integrator is extracted and implemented by a frequency modulator with the modulating signal as the input, and the result is a simple delta-sigma modulator, allowing straightforward multibit quantization.
Abstract: This paper describes a new first- and second-order delta-sigma modulator concept where the first integrator is extracted and implemented by a frequency modulator with the modulating signal as the input. The result is a simple delta-sigma modulator with no need for digital-to-analog converters, allowing straightforward multibit quantization. Without the frequency modulator, the circuit becomes a frequency-to-digital converter with delta-sigma noise shaping. An experimental first- and second-order modulator has been implemented in a 1.2-/spl mu/m standard digital CMOS process and the results confirm the theory. For the first-order modulator an input signal amplitude of 150 mV resulted in a signal-to-quantization noise ratio (SQNR) of /spl ap/115 dB at 2 MHz sampling frequency and signal bandwidth of 500 Hz.
205 citations
"Analytical Evaluation of VCO-ADC Qu..." refers background in this paper
...I. INTRODUCTION O NE of the most promising analog-to-digital converter(ADC) architectures nowadays is the VCO-based oversampled converter (VCO-ADC) [1]–[4]....
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TL;DR: Some results of an analysis of the spectrum of the frequency modulated pulses of the nervous system show that change in average pulse frequency is the likely information-carrying parameter of a neural pulse train.
Abstract: Spectral analysis is one of the more important design and evaluation tools available to the communications engineer and it could also be a key to increased understanding of the nervous system. Some results of an analysis of the spectrum of the frequency modulated pulses of the nervous system show that 1) change in average pulse frequency is the likely information-carrying parameter of a neural pulse train, since distortion-free recovery of this variable is possible by simple low-pass filtering, and 2) phase relationships existing between signal components and distortion components of a neural pulse train imply unusual distortion attenuating properties of multiple or duplicate information channels. These results are discussed in light of some known nervous system structures.
201 citations
27 Sep 2010
TL;DR: This paper presents a reconfigurable continuous-time delta-sigma modulator for analog-to-digital conversion that consists mostly of digital circuitry that is a voltage-controlled ring oscillator based design with new digital background calibration and self-cancelling dither techniques applied to enhance performance.
Abstract: This paper presents a reconfigurable continuous-time delta-sigma modulator for analog-to-digital conversion that consists mostly of digital circuitry. It is a voltage-controlled ring oscillator based design with new digital background calibration and self-cancelling dither techniques applied to enhance performance. Unlike conventional delta-sigma modulators, it does not contain analog integrators, feedback DACs, comparators, or reference voltages, and does not require a low-jitter clock. Therefore, it uses less area than comparable conventional delta-sigma modulators, and the architecture is well-suited to IC processes optimized for fast digital circuitry. The prototype IC is implemented in 65 nm LP CMOS technology with power dissipation, output sample-rate, bandwidth, and peak SNDR ranges of 8-17 mW, 0.5-1.15 GHz, 3.9-18 MHz, and 67-78 dB, respectively, and an active area of 0.07.
188 citations
"Analytical Evaluation of VCO-ADC Qu..." refers background or methods in this paper
...1 displays the diagram of a single-bit VCO-ADC....
[...]
...Digital Object Identifier 10.1109/LSP.2014.2357071 In this letter, we propose an analysis complementary to [3], [4], in which a VCO-ADC is first transformed into a pulse frequency modulator whose spectrum is well known [10]–[12]....
[...]
...1 where the XOR gate and discrete unit delay have been moved to the left side of the sampler....
[...]
...I. INTRODUCTION O NE of the most promising analog-to-digital converter(ADC) architectures nowadays is the VCO-based oversampled converter (VCO-ADC) [1]–[4]....
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