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Journal ArticleDOI

Analytical Evaluation of Via-Plate Capacitance for Multilayer Printed Circuit Boards and Packages

15 Aug 2008-IEEE Transactions on Microwave Theory and Techniques (IEEE)-Vol. 56, Iss: 9, pp 2118-2128
TL;DR: In this article, the via-plate capacitance for a via transition to a multilayer printed circuit board is evaluated analytically in terms of higher order parallel-plate modes.
Abstract: The via-plate capacitance for a via transition to a multilayer printed circuit board is evaluated analytically in terms of higher order parallel-plate modes. The Green's function in a bounded coaxial cavity for a concentric magnetic ring current is first derived by introducing reflection coefficients for cylindrical waves at the inner and outer cavity walls. These walls can be perfect electric conductor (PEC)/perfect magnetic conductor(PMC) or a nonreflective perfectly matched layer. By further assuming a magnetic frill current on the via-hole in the metal plate, an analytical formula is derived for the via barrel-plate capacitance by summing the higher order modes in the bounded coaxial cavity. The convergence of the formula with the number of modes, as well as with the radius of the outer PEC/PMC wall is discussed. The analytical formula is validated by both quasi-static numerical methods and measurements. Furthermore, the formula allows the investigation of the frequency dependence of the via-plate capacitance, which is not possible with quasi-static methods.

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Citations
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Journal ArticleDOI
TL;DR: This paper reviews recent progress and future directions of signal integrity design for high-speed digital circuits, focusing on four areas: signal propagation on transmission lines, discontinuity modeling and characterization, measurement techniques, and link-path design and analysis.
Abstract: This paper reviews recent progress and future directions of signal integrity design for high-speed digital circuits, focusing on four areas: signal propagation on transmission lines, discontinuity modeling and characterization, measurement techniques, and link-path design and analysis.

230 citations

Journal ArticleDOI
TL;DR: In this article, the state of the arts of IC, electronic package, and printed circuit board simulation and modeling technologies are summarized for both available structures [multilayered powerground planes and macromodeling of interconnect (INC)] and novel structures (nano-INCs and 3-D ICs based on through-silicon via technology).
Abstract: The ever-increasing demands of digital computing and wireless communication have been driving the semiconductor technology to change with each passing day. Modern electronic systems integrate more complex components and devices, which results in a very complex electromagnetic (EM) field environment. EM compatibility has become one of the major issues in ICs redesign, mainly due to the lack of efficient and accurate simulation tools and expertise on noise reduction and immunity improvement. This paper reviews the state of the arts of IC, electronic package, and printed circuit board simulation and modeling technologies. It summarizes the modeling technologies for both available structures [multilayered power-ground planes and macromodeling of interconnect (INC)] and novel structures (nano-INCs and 3-D ICs based on through-silicon via technology). It also illustrates the trends of simulation and modeling technologies in EM compatibility, signal integrity, and power integrity.

166 citations

Journal ArticleDOI
TL;DR: In this paper, an analytical model for vias and traces is presented for simulation of multilayer interconnects at the package and printed circuit board levels, which can be applied to efficiently simulate a wide range of structures.
Abstract: Analytical models for vias and traces are presented for simulation of multilayer interconnects at the package and printed circuit board levels. Vias are modeled using an analytical formulation for the parallel-plate impedance and capacitive elements, whereas the trace-via transitions are described by modal decomposition. It is shown that the models can be applied to efficiently simulate a wide range of structures. Different scenarios are analyzed including thru-hole and buried vias, power vias, and coupled traces routed into different layers. By virtue of the modal decomposition, the proposed method is general enough to handle structures with mixed reference planes. For the first time, these models have been validated against full-wave methods and measurements up to 40 GHz. An improvement on the computation speed of at least two orders of magnitude has been observed with respect to full-wave simulations.

153 citations

Journal ArticleDOI
TL;DR: In this paper, an irregular plate pair with multiple vias is analyzed by the segmentation method that divides the plate pair into a plate domain and via domains, all the parallel-plate modes are considered, while in the plate domain, only the propagating modes are included to account for the coupling among vias and the reflection from plate edges.
Abstract: An irregular plate pair with multiple vias is analyzed by the segmentation method that divides the plate pair into a plate domain and via domains. In the via domains, all the parallel-plate modes are considered, while in the plate domain, only the propagating modes are included to account for the coupling among vias and the reflection from plate edges. Boundary conditions at both vias and plate edges are enforced and all parasitic components of via circuit are expressed analytically in terms of parallel-plate modes. The work presented in this paper indicates that a previous physics-based via circuit model from intuition is a low-frequency approximation. Analytical and numerical simulations, as well as measurements, have been used to validate the intrinsic via circuit model.

92 citations

Journal ArticleDOI
TL;DR: In this article, a cascaded S-parameter method is proposed for signal/power integrity analysis of multiple vias in a multilayer printed circuit board (PCB), which enables efficient and accurate construction and simulation of physics-based via model for complex multi-layer PCB structures involving vias.
Abstract: A cascaded S-parameter method is proposed in this paper for signal/power integrity analysis of multiple vias in a multilayer printed circuit board (PCB). The proposed method enables efficient and accurate construction and simulation of physics-based via model for complex multilayer PCB structures involving vias. The physics-based via model describes the parasitic effects near each via region as well as mutual coupling among different vias. In this model, each via portion between two parallel plates is regarded as a three-port network with two coaxial ports and one radial port between the two plates. A procedure is first developed to obtain the S-parameters of a single plate pair, which combine the three-port via networks with the impedance matrix of the parallel-plate pair. Once the S-parameters of each plate pair are obtained, an assembling technique for cascading microwave networks is further developed. The method proposed in this paper has been validated by both simulations with a commercial circuit simulator and measurements.

67 citations

References
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Journal ArticleDOI
TL;DR: In this article, a simple theory based on the cavity model was developed to analyze microstrip antennas, and the theoretically predicted radiation patterns and impedance loci closely agree with those measured for many antennas of various shapes and dimensions investigated thus far.
Abstract: A simple theory based on the cavity model is developed to analyze microstrip antennas. Formulas for numerous canonical shapes are given. In general the theoretically predicted radiation patterns and impedance loci closely agree with those measured for many antennas of various shapes and dimensions investigated thus far. In fact, this theory enables the computation of both patterns and impedance loci with little effort. The input admittance locus generally follows a circle of nearly constant conductance, but its center is shifted to the inductive region in the Smith chart plot. Peculiar properties for the case with degenerate or slightly degenerate eigenvalues are discussed. An accurate formula for determining the resonant frequency of a rectangular microstrip antenna is also given.

882 citations

Book
01 Mar 1993
TL;DR: In this paper, the high speed properties of logic gates measurement techniques are discussed, including transmission lines, ground planes and layer stacking terminations, connectors, ribbon cables, clock distribution clock oscillators, etc.
Abstract: Fundamentals high speed properties of logic gates measurement techniques transmission lines ground planes and layer stacking terminations VIAS power systems connectors ribbon cables clock distribution clock oscillators.

639 citations

Book
25 Aug 2000
TL;DR: This book provides a much-needed, practical guide to the state of the art of modern digital system design, combining easily accessible explanations with immensely useful problem-solving strategies.
Abstract: From the Publisher: An understanding of high-speed interconnect phenomena is essential for digital designers who must deal with the challenges posed by the ever-increasing operating speeds of today's microprocessors This book provides a much-needed, practical guide to the state of the art of modern digital system design, combining easily accessible explanations with immensely useful problem-solving strategies Written by three leading Intel engineers, High-Speed Digital System Design clarifies difficult and often neglected topics involving the effects of high frequencies on digital buses and presents a variety of proven techniques and application examples Extensive appendices, formulas, modeling techniques as well as hundreds of figures are also provided

427 citations

Journal ArticleDOI
01 Apr 1995
TL;DR: In this article, the authors describe the development of a theoretical field-based or wave model which they are employing in an attempt to characterize the ground/power plane (e.g., the V/sub cc/plane) structure of a printed wiring board (PWB) or multichip module (MCM).
Abstract: In this paper, we describe the development of a theoretical field-based or "wave" model which we are employing in an attempt to characterize the ground/power plane (e.g., the V/sub cc/ plane) structure of a printed wiring board (PWB) or multichip module (MCM). A brief development of the model is presented, followed by simulation results and insight into the noise phenomena. A test structure and electrical measurements are used to confirm the correctness and applicability of the model. >

173 citations

Journal ArticleDOI
TL;DR: In this article, the equivalent circuit of a via connecting two semi-infinitely long transmission lines through a circular hole in a ground plane is found, and the pi-type equivalent circuit consists of two excess capacitances and an excess inductance.
Abstract: The equivalent circuit of a via connecting two semi-infinitely long transmission lines through a circular hole in a ground plane is found. The pi -type equivalent circuit consists of two excess capacitances and an excess inductance. These are quasistatic quantities and thus are computed statically by the method of moments from integral equations. The integral equations are established by introducing a sheet of magnetic current in the electrostatic case and a layer of magnetic charge in the magnetostatic case. Parametric plots of the excess capacitances, the excess inductance, and the characteristic admittance of the via are given. >

139 citations