Analytical modeling of quantization and volume inversion in thin Si-film DG MOSFETs

doi:10.1109/16.981219

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Analytical modeling of quantization and volume inversion in thin Si-film DG MOSFETs

Journal Article•DOI•

Analytical modeling of quantization and volume inversion in thin Si-film DG MOSFETs

Lixin Ge¹, Jerry G. Fossum¹•Institutions (1)

University of Florida¹

07 Aug 2002-IEEE Transactions on Electron Devices (IEEE)-Vol. 49, Iss: 2, pp 287-294

TL;DR: In this article, a compact physics-based quantum effects model for symmetrical double-gate (DG) MOSFETs of arbitrary Si-film thickness is developed and demonstrated.

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Abstract: A compact physics-based quantum-effects model for symmetrical double-gate (DG) MOSFETs of arbitrary Si-film thickness is developed and demonstrated. The model, based on the quantum-mechanical variational approach, not only accounts for the thin Si-film thickness dependence but also takes into account the gate-gate charge coupling and the electric field dependence; it can be used for FDSOI MOSFETs as well. The analytical solutions, verified via results obtained from self-consistent numerical solutions of the Poisson and Schrodinger equations, provide good physical insight with regard to the quantization and volume inversion due to carrier confinement, which is governed by the Si-film thickness and/or the transverse electric field. A design criterion for achieving beneficial volume-inversion operation in DG devices is quantitatively defined for the first time. Furthermore, the utility of the model for aiding optimal DG device design, including exploitation of the volume-inversion benefit to carrier mobility, is exemplified.

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Book•

FinFETs and Other Multi-Gate Transistors

[...]

Jean-Pierre Colinge

17 Oct 2007

TL;DR: FinFETs and Other Multi-Gate Transistors provides a comprehensive description of the physics, technology and circuit applications of multigate field-effect transistors (FET) and explains the physics and properties.

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Abstract: FinFETs and Other Multi-Gate Transistors provides a comprehensive description of the physics, technology and circuit applications of multigate field-effect transistors (FETs). It explains the physics and properties of these devices, how they are fabricated and how circuit designers can use them to improve the performances of integrated circuits. The International Technology Roadmap for Semiconductors (ITRS) recognizes the importance of these devices and places them in the "Advanced non-classical CMOS devices" category. Of all the existing multigate devices, the FinFET is the most widely known. FinFETs and Other Multi-Gate Transistors is dedicated to the different facets of multigate FET technology and is written by leading experts in the field.

...read moreread less

843 citations

Journal Article•DOI•

Nanoscale FinFETs with gate-source/drain underlap

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V.P. Trivedi¹, Jerry G. Fossum¹, M.M. Chowdhury¹•Institutions (1)

University of Florida¹

01 Jan 2005-IEEE Transactions on Electron Devices

TL;DR: In this article, the authors show that gate-source/drain (G-S/D) underlap can be achieved via large, doable straggle in the S-D fin-extension doping profile.

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Abstract: Using two-dimensional numerical device simulations, we show that optimally designed nanoscale FinFETs with undoped bodies require gate-source/drain (G-S/D) underlap that can be effectively achieved via large, doable straggle in the S-D fin-extension doping profile without causing S-D punch-through. The effective underlap significantly relaxes the fin-thickness requirement for control of short-channel effects (SCEs) via a bias-dependent effective channel length (L/sub eff/), which is long in weak inversion and approaches the gate length in strong inversion. Dependence of L/sub eff/ on the S/D doping profile defines a design tradeoff regarding SCEs and S/D series resistance that can be optimized, depending on the fin width, via engineering of the doping profile in the S/D fin-extensions. The noted optimization is exemplified via a well-tempered FinFET design with an 18-nm gate length, showing further that designs with effective underlap yield minimal parasitic capacitance and reduce leakage components such as gate-induced drain leakage current.

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253 citations

Journal Article•DOI•

Ultimately thin double-gate SOI MOSFETs

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T. Ernst¹, Sorin Cristoloveanu¹, Gerard Ghibaudo¹, Thierry Ouisse¹, Seiji Horiguchi², Yukinori Ono², Yasuo Takahashi², Katsumi Murase - Show less +4 more•Institutions (2)

Centre national de la recherche scientifique¹, Nippon Telegraph and Telephone²

05 Jun 2003-IEEE Transactions on Electron Devices

TL;DR: In this article, the operation of 1-3 nm thick SOI MOSFETs, in double-gate (DG) mode and single-gate mode (for either front or back channel), is systematically analyzed.

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Abstract: The operation of 1-3 nm thick SOI MOSFETs, in double-gate (DG) mode and single-gate (SG) mode (for either front or back channel), is systematically analyzed. Strong interface coupling and threshold voltage variation, a large influence of substrate depletion underneath the buried oxide, the absence of drain current transients, and degradation in electron mobility are typical effects in these ultra-thin MOSFETs. The comparison of SG and DG configurations demonstrates the superiority of DG-MOSFETs: ideal subthreshold swing and remarkably improved transconductance (consistently higher than twice the value in SG-MOSFETs). The experimental data and the difference between SG and DG modes is explained by combining classical models with quantum calculations. The key effect in ultimately thin DG-MOSFETs is volume inversion, which primarily leads to an improvement in mobility, whereas the total inversion charge is only marginally modified.

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243 citations

Additional excerpts

...Impressive compact and analytical models for DG-MOSFETs, which account for quantum, volume-inversion, short-channel, and nonstatic effects have been proposed in [20], [21]....
[...]

Journal Article•DOI•

A physical short-channel threshold voltage model for undoped symmetric double-gate MOSFETs

[...]

Qiang Chen¹, Evans M. Harrell¹, James D. Meindl¹•Institutions (1)

Georgia Institute of Technology¹

04 Aug 2003-IEEE Transactions on Electron Devices

TL;DR: In this article, a compact, physical, short-channel threshold voltage model for undoped symmetric double-gate MOSFETs is derived based on an analytical solution of the two-dimensional (2-D) Poisson equation with the mobile charge term included.

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Abstract: A compact, physical, short-channel threshold voltage model for undoped symmetric double-gate MOSFETs has been derived based on an analytical solution of the two-dimensional (2-D) Poisson equation with the mobile charge term included. The new model is verified by published numerical simulations with close agreement. Applying the newly developed model, threshold voltage sensitivities to channel length, channel thickness, and gate oxide thickness have been comprehensively investigated. For practical device designs the channel length causes 30-50% more threshold voltage variation than does the channel thickness for the same process tolerance, while the gate oxide thickness causes the least, relatively insignificant threshold voltage variation. Model predictions indicate that individual DG MOSFETs with good turn-off behavior are feasible at 10 nm scale; however, practical exploitation of these devices toward gigascale integrated systems requires development of novel technologies for significant improvement in process control.

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236 citations

Cites methods from "Analytical modeling of quantization..."

...As scales into nanometer regime, consideration of quantum mechanical confinement becomes important as eloquently discussed in [ 29 ]....
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Journal Article•DOI•

Explicit continuous model for long-channel undoped surrounding gate MOSFETs

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Benjamin Iniguez¹, David Jiménez, J. Roig², H. A. Hamid, Lluis F. Marsal, Josep Pallarès - Show less +2 more•Institutions (2)

Rovira i Virgili University¹, Spanish National Research Council²

18 Jul 2005-IEEE Transactions on Electron Devices

TL;DR: In this paper, an analytical and continuous dc model for cylindrical undoped surrounding-gate (SGT) MOSFETs is presented, in which the channel current is written as an explicit function of the applied voltages.

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Abstract: We present an analytical and continuous dc model for cylindrical undoped surrounding-gate (SGT) MOSFETs in which the channel current is written as an explicit function of the applied voltages. The model is based on a new unified charge control model developed for this device. The explicit model shows good agreement with the numerical exact solution obtained from the new charge control model, which was previously validated by comparison with three-dimensional numerical simulations.

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215 citations

Cites background from "Analytical modeling of quantization..."

...For films thinner than 10 nm, quantum confinement should be considered; it leads to a reduction of the channel charge density and an increase of the threshold voltage [7]....
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References

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Book•

Fundamentals of Modern VLSI Devices

[...]

Yuan Taur¹, Tak H. Ning¹•Institutions (1)

IBM¹

01 Jan 2016

TL;DR: In this article, the authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices.

...read moreread less

Abstract: Learn the basic properties and designs of modern VLSI devices, as well as the factors affecting performance, with this thoroughly updated second edition. The first edition has been widely adopted as a standard textbook in microelectronics in many major US universities and worldwide. The internationally-renowned authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices. Equations and parameters provided are checked continuously against the reality of silicon data, making the book equally useful in practical transistor design and in the classroom. Every chapter has been updated to include the latest developments, such as MOSFET scale length theory, high-field transport model, and SiGe-base bipolar devices.

...read moreread less

2,680 citations

"Analytical modeling of quantization..." refers background in this paper

...For relatively thick , the symmetrical DG MOSFET operates with two distinct channels, and decreases with increasing due to the electric field-governed confinement as in the bulk-Si MOSFET [3], [ 14 ]; for a given is virtually independent of . For relatively thin , the DG device operates with volume inversion, and independent of , even below the onset condition in (14)....
[...]
...Note the general trend, for high ,o f increasing with ; this translates to reduced gate capacitance, beyond that associated with the [5], [ 14 ]....
[...]
...Note in Fig. 9 that unless is very thin, the electron occupation is, unlike in bulk-Si MOSFETs [ 14 ], not predominantly in the lower-energy ladder, even for high . We stress, however, that ultrathin nm results in degraded due to severe surface-roughness and enhanced phonon scattering as shown in Fig. 7 [15], and can undermine the utility of (14) for device design as well....
[...]

Journal Article•DOI•

Properties of Semiconductor Surface Inversion Layers in the Electric Quantum Limit

[...]

Frank Stern¹, W. E. Howard¹•Institutions (1)

IBM¹

15 Nov 1967-Physical Review

TL;DR: In this article, the authors generalized the energy-level calculation to include arbitrary orientations of the constant energy ellipsoids in the bulk, the surface or interface, and an external magnetic field.

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Abstract: The strong surface electric field associated with a semiconductor inversion layer quantizes the motion normal to the surface. The bulk energy bands split into electric sub-bands near the surface, each of which is a two-dimensional continuum associated with one of the quantized levels. We treat the electric quantum limit, in which only the lowest electric sub-band is occupied. Within the effective-mass approximation, we have generalized the energy-level calculation to include arbitrary orientations of (1) the constant-energy ellipsoids in the bulk, (2) the surface or interface, and (3) an external magnetic field. The potential associated with a charged center located an arbitrary distance from the surface is calculated, taking into account screening by carriers in the inversion layer. The bound states in the inversion layer due to attractive Coulomb centers are calculated for a model potential which assumes the inversion layer to have zero thickness. The Born approximation is compared with a phase-shift calculation of the scattering cross section, and is found to be reasonably good for the range of carrier concentrations encountered in InAs surfaces. The low-temperature mobility associated with screened Coulomb scattering by known charges at the surface and in the semiconductor depletion layer is calculated for InAs and for Si (100) surfaces in the Born approximation, using a potential that takes the inversion-layer charge distribution into account. The InAs results are in good agreement with experiment. In Si, but not in InAs, freeze-out of carriers into inversion-layer bound states is expected at low temperatures and low inversion-layer charge densities, and the predicted behavior is in qualitative agreement with experiment. An Appendix gives the phase-shift method for two-dimensional scattering and the exact cross section for scattering by an unscreened Coulomb potential.

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1,468 citations

"Analytical modeling of quantization..." refers background in this paper

...The lower-energy ladder has a twofold degeneracy with ( [ 4 ]); these energy levels are designated as given by (11)....
[...]
...For all devices, because of the restricted momentum in the direction normal to the surface, inversion carriers must be treated quantum-mechanically as a two-dimensional (2-D) gas [3], [ 4 ]....
[...]
...The higher-energy ladder has a fourfold degeneracy with ( [ 4 ]); these energy levels are designated as , which are also given by (11) but with replacing ....
[...]

Journal Article•DOI•

Self-Consistent Results for n -Type Si Inversion Layers

[...]

Frank Stern¹•Institutions (1)

IBM¹

15 Jun 1972-Physical Review B

TL;DR: In this article, self-consistent results for energy levels, populations, and charge distributions are given for $n$-type inversion layers on $p$ -type silicon.

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Abstract: Self-consistent results for energy levels, populations, and charge distributions are given for $n$-type inversion layers on $p$-type silicon. Quantum effects are taken into account in the effective-mass approximation, and the envelope wave function is assumed to vanish at the surface. Approximate analytic results are given for some special cases. Numerical results are given for representative surface orientations, bulk acceptor concentrations, inversion-layer electron concentrations, and temperatures.

...read moreread less

987 citations

"Analytical modeling of quantization..." refers background or methods in this paper

...For relatively thick , the symmetrical DG MOSFET operates with two distinct channels, and decreases with increasing due to the electric field-governed confinement as in the bulk-Si MOSFET [ 3 ], [14]; for a given is virtually independent of . For relatively thin , the DG device operates with volume inversion, and independent of , even below the onset condition in (14)....
[...]
...For all devices, because of the restricted momentum in the direction normal to the surface, inversion carriers must be treated quantum-mechanically as a two-dimensional (2-D) gas [ 3 ], [4]....
[...]
...For bulk-Si and PD/SOI MOSFETs , in strong inversion where virtually only one 2-D subband is occupied due to the high transverse electric-field confinement, a variational approach gives a good analytical approximation [ 3 ] for the ground-state energy and average inversion layer depth....
[...]
...In bulk-Si and partially depleted (PD) SOI (n)MOSFETs, the confinement is in the potential well defined by the gate-oxide barrier (which is virtually infinite) and the silicon conduction (or valence) band, the steep gradient of which defines the high transverse electric field which controls the effect [ 3 ]....
[...]
...Most previous studies of quantum effects in MOSFET inversion layers have been based on the conventional model for single-gate bulk-Si devices developed by Stern [ 3 ], or on numerical simulations [5]‐[7]....
[...]

Journal Article•DOI•

Double-gate silicon-on-insulator transistor with volume inversion: A new device with greatly enhanced performance

[...]

Francis Balestra¹, Sorin Cristoloveanu², M. Benachir², J. Brini², T. Elewa² - Show less +1 more•Institutions (2)

Grenoble Institute of Technology¹, École nationale supérieure d'électronique et de radioélectricité de Grenoble²

01 Sep 1987-IEEE Electron Device Letters

TL;DR: The double-gate control of silicon-on-insulator (SOI) transistors is used to force the whole silicon film (interface layers and volume) in strong inversion as discussed by the authors.

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Abstract: The double-gate control of silicon-on-insulator (SOI) transistors is used to force the whole silicon film (interface layers and volume) in strong inversion. This original method of transistor operation offers excellent device performance, in particular great increases in subthreshold slope, transconductance, and drain current. A simulation program and experiments on SIMOX structures are used to study the new device.

...read moreread less

729 citations

"Analytical modeling of quantization..." refers background in this paper

...Further, for the symmetrical DG device, the condition of “volume inversion” [ 2 ] can be beneficial with regard to carrier mobility and source-drain transport....
[...]
...It is difficult to define the effective operation-region boundaries between volume inversion [ 2 ], [7] and two-channel inversion in symmetrical DG MOSFETs....
[...]

Journal Article•DOI•

Negative Field-Effect Mobility on (100) Si Surfaces

[...]

F. F. Fang¹, W. E. Howard¹•Institutions (1)

IBM¹

02 May 1966-Physical Review Letters

375 citations