Proceedings ArticleDOI
Application of alternating phase-shifting masks to 140-nm gate patterning: linewidth control improvements and design optimization
Hua-Yu Liu,Linard Karklin,Yao-Ting Wang,Yagyensh C. Pati +3 more
- Vol. 3236, pp 328-337
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TLDR
In this article, the problem of intra-field line width variations can be effectively solved through a novel application of alternating phase-shifting mask (PSM) technology, which is applied to produce 140 nm transistor gates using DUV (248 nm wavelength, KrF) lithography.Abstract:
In this paper we show that the problem of intrafield line width variations can be effectively solved through a novel application of alternating phase-shifting mask (PSM) technology. To illustrate its advantages, we applied this approach to produce 140 nm transistor gates using DUV (248 nm wavelength, KrF) lithography. We show that: systematic intrafield line width variations can be controlled to within 10 nm (3 (sigma) ), and variations across the wafer held to within 15 nm (3 (sigma) ), with a target k1 factor of K1 equals 0.237 (140 nm target gate lengths).read more
Citations
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Proceedings ArticleDOI
Process and environmental variation impacts on ASIC timing
TL;DR: In this paper, the authors introduce the concepts of systematic interdie variation, systematic intra-die variation and intra die random variation and show that by treating these forms of variations differently, they can achieve design closure with less guard-banding than traditional methods.
Patent
Lithographic apparatus and method for optimizing an illumination source using photolithographic simulations
TL;DR: In this article, a method for optimizing the illumination conditions of a lithographic apparatus by computer simulation, including an illuminator and a projection system, is presented, based on a single or series of simulations using the simulation model.
Journal ArticleDOI
Limitations and challenges of computer-aided design technology for CMOS VLSI
R.E. Bryant,Kwang-Ting Cheng,Andrew B. Kahng,Kurt Keutzer,W. Maly,Richard Newton,Larry Pileggi,Jan M. Rabaey,Alberto Sangiovanni-Vincentelli +8 more
TL;DR: Limits to how design technology can enable the implementation of single-chip microelectronic systems that take full advantage of manufacturing technology with respect to such criteria as layout density performance, and power dissipation are explored.
Patent
Lithographic apparatus and method for optimizing illumination using a photolithographic simulation
TL;DR: In this article, a method of configuring a transfer of an image of a patterning device pattern onto a substrate with a lithographic apparatus is presented, which includes determining an intermediate illumination arrangement parameter and an intermediate Patterning Device parameter by varying an initial illumination arrangement and an initial Patterning device parameter using a calibrated model until the calculated image of the pattern printed on the substrate is within predetermined specification.
Proceedings ArticleDOI
Subwavelength lithography and its potential impact on design and EDA
Andrew B. Kahng,Y. C. Pati +1 more
TL;DR: This tutorial paper surveys the potential implications of subwavelength optical lithography for new tools and flows in the interface between layout design and manufacturability and addresses the necessary changes in the design-to-manufacturing flow.
References
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Journal ArticleDOI
Effect of Reticle Erros on Systematic Intrafield Line Width Variations
Hua–yu Liu,Crid Yu,Bob Gleason +2 more
TL;DR: In this paper, the contributions of reticle line width (CD) errors to systematic intrafield CD variations for 0.35 µ m i-line lithography by measuring electrical resistance of lines patterned in polysilicon films were analyzed.