Aspects and Reduction of Miller Capacitance of Lateral Tunnel FETs
01 Jun 2018-
TL;DR: In this paper, the gate-to-drain capacitance (Miller capacitance) of lateral tunnel FETs is discussed and how to reduce the mirror capacitance of LTFETs.
Abstract: This paper discusses aspects of gate-to-drain capacitance (Miller capacitance) of lateral tunnel FETs (LTFETs). It is considered how to reduce the mirror capacitance of LTFET.
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12 Sep 2022
TL;DR: In this article , the design and analysis of a dual material TFET-based digital inverter with dual material interface trap charges is presented. And the transient characteristics of the inverter in appearance and non-appearance of interface trap charge are analyzed.
Abstract: AbstractThe paper reports design and analysis of the non-uniform body with dual material TFET-based digital inverter. The analysis includes the transient characteristics of the inverter in appearance and non-appearance of interface trap charges. Gaussian distribution of interface trap charge with various concentrations has been taken into account. Further, different delay parameters of the circuit have been calculated, and it is observed that fall time delay of the circuit is less than that of rise time delay. Finally, it is found that the propagation delays of the proposed TFET-based digital inverter are 9.75 ps and 6 ps in occurrence and non-occurrence of interface trap charges, respectively.KeywordsTFETDigital inverterTrap chargesTransient characteristics
01 Jan 2016
TL;DR: In this paper, the authors discuss various promising MOS devices applicable to low-energy environmental and biomedical uses, and demonstrate the physical effects (quantum, tunneling) of these devices.
Abstract: Helps readers understand the physics behind MOS devices for low-voltage and low-energy applications • Based on timely published and unpublished work written by expert authors • Discusses various promising MOS devices applicable to low-energy environmental and biomedical uses • Describes the physical effects (quantum, tunneling) of MOS devices • Demonstrates the performance of devices, helping readers to choose right devices applicable to an industrial or consumer environment • Addresses some Ge-based devices and other compound-material-based devices for high-frequency applications and future development of high performance devices. "Seemingly innocuous everyday devices such as smartphones, tablets and services such as on-line gaming or internet keyword searches consume vast amounts of energy. Even when in standby mode, all these devices consume energy. The upcoming 'Internet of Things' (IoT) is expected to deploy 60 billion electronic devices spread out in our homes, cars and cities.
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25 Oct 2010
TL;DR: This review introduces and summarizes progress in the development of the tunnel field- effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges.
Abstract: Steep subthreshold swing transistors based on interband tunneling are examined toward extending the performance of electronics systems. In particular, this review introduces and summarizes progress in the development of the tunnel field-effect transistors (TFETs) including its origin, current experimental and theoretical performance relative to the metal-oxide-semiconductor field-effect transistor (MOSFET), basic current-transport theory, design tradeoffs, and fundamental challenges. The promise of the TFET is in its ability to provide higher drive current than the MOSFET as supply voltages approach 0.1 V.
1,389 citations
"Aspects and Reduction of Miller Cap..." refers background in this paper
...INTRODUCTION Tunnel FETs are considered as promising devices for future low-energy and high-speed devices [1]....
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TL;DR: In this paper, a numerical simulation study of gate capacitance components in a tunneling field effect transistor (TFET) was performed, showing key differences in the partitioning of gate capacitor between the source and drain as compared with a MOSFET.
Abstract: We report a numerical simulation study of gate capacitance components in a tunneling field-effect transistor (TFET), showing key differences in the partitioning of gate capacitance between the source and drain as compared with a MOSFET. A compact model for TFET capacitance components, including parasitic and inversion capacitances, was built and calibrated with computer-aided design data. This model should be useful for further investigation of performance of circuits containing TFETs. The dependence of gate-drain capacitance Cgd on drain design and gate length was further investigated for reduction of switching delay in TFETs.
201 citations
"Aspects and Reduction of Miller Cap..." refers background in this paper
...Although efforts have been made to estimate switching performance of such devices by assuming a device model [2], further advancement is necessary for accurate analysis....
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...The reason for such behavior has not been discussed in detail in [2]....
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...However, lateral TFETs are found to have a large Miller capacitance regardless of materials [2]....
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...It is seen that Cgd (Miller capacitance) roughly traces Cgg as demonstrated in [2]....
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...A possible solution has been suggested in [2]....
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Book•
28 Feb 2017
11 citations
"Aspects and Reduction of Miller Cap..." refers background in this paper
...In designing the device structure, we must carefully determine the gate-offset length so that the switching performance is not degraded significantly [5]....
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TL;DR: In this article, the threshold voltage of TFETs is defined based on the peak of normalized transconductance and shown to be valid for different structures of the TFET and the short-channel effect.
5 citations
"Aspects and Reduction of Miller Cap..." refers background in this paper
...Device Structure Assumed Figure 1 shows the lateral TFET device structure assumed here [3]....
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...Transfer characteristics reveal that threshold voltage is sub-one volt [3]....
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