Automatic Assignment of Computations in a Variable Structure Computer System
TL;DR: A numerical experiment on a problem from the area of the x-ray diffraction analysis of crystal structures indicates that the assignment procedure is computationally practical, and demonstrates that execution of the problem in a variable structure system leads to a considerable gain over a system of three modern high-speed general purpose computers.
Abstract: The problem of optimal assignment of subcomputations of a computational task to autonomous computing structures of a variable structure computing system is investigated. In particular, it is desired to determine which computing structures should be constructed from the hardware inventory of the variable structure computing system and which subcomputations should be executed on which computing structures, and in what sequence, so as to minimize the total cost of computation (cost of restructuring of the system and the cost of the actual execution time). A successive approximation assigmnent procedure is formulated. The procedure requires representation of the computational task by a directed graph and an estimate of the number of traversals of each computational loop, as well as the branching probabilities of each conditional branching operation. Computer programs for automatic execution of the assignment procedure have been written. A numerical experiment on a problem from the area of the x-ray diffraction analysis of crystal structures indicates that the procedure is computationally practical, and also demonstrates that execution of the problem in a variable structure system leads to a considerable gain over a system of three modern high-speed general purpose computers.
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Book•
02 Nov 2007
TL;DR: This book is intended as an introduction to the entire range of issues important to reconfigurable computing, using FPGAs as the context, or "computing vehicles" to implement this powerful technology.
Abstract: The main characteristic of Reconfigurable Computing is the presence of hardware that can be reconfigured to implement specific functionality more suitable for specially tailored hardware than on a simple uniprocessor. Reconfigurable computing systems join microprocessors and programmable hardware in order to take advantage of the combined strengths of hardware and software and have been used in applications ranging from embedded systems to high performance computing. Many of the fundamental theories have been identified and used by the Hardware/Software Co-Design research field. Although the same background ideas are shared in both areas, they have different goals and use different approaches.This book is intended as an introduction to the entire range of issues important to reconfigurable computing, using FPGAs as the context, or "computing vehicles" to implement this powerful technology. It will take a reader with a background in the basics of digital design and software programming and provide them with the knowledge needed to be an effective designer or researcher in this rapidly evolving field.
· Treatment of FPGAs as computing vehicles rather than glue-logic or ASIC substitutes
· Views of FPGA programming beyond Verilog/VHDL
· Broad set of case studies demonstrating how to use FPGAs in novel and efficient ways
531 citations
375 citations
Book•
01 Jan 1979
TL;DR: A number of Petri Net problems are shown to be recursively equivalent to the Reachability Problem for Vector Addition Systems, and the equality of Reachability Sets and the equivalence of two Petri Nets in terms of their language-generating capability are recursive undecidable.
Abstract: An understanding of the mathematical properties of Petri Nets is essential when one wishes to use Petri Nets as an abstract model for concurrent systems The decidability of various problems which arise in this context is an important aspect of this question The fact that these problems also arise in the context of other mathematical theories, such as commutative semigroups, closure under linear relations, Matrix Context-Free grammars, or Weak Counter Automata, provides further motivation The Reachability Problem for Vector Addition Systems - whose decidability is still an open question - is of central importance We show that a number of Petri Net problems are recursively equivalent to this problem These include the Liveness Problem (eg can a system reach a deadlocked state?), the persistence problem (can a given transition ever be disabled by the firing of another transition?), and the membership and emptiness problems for certain classes of languages generated by Petri Nets The power of the unrestricted Petri Net model is illustrated by various undecidable equivalence results In particular, we show that the equality of Reachability Sets and the equivalence of two Petri Nets in terms of their language-generating capability are recursive undecidable It is hoped that the constructions used to prove our results will shed some light on the source of the complexities of the unrestricted Petri Net model, and may eventually permit us to achieve an optimal balance between representational transparency and analytical power of the Petri Net model
258 citations
Patent•
06 Jun 1995TL;DR: In this paper, the authors describe a memory device having a plurality of memory banks and configurable logic units associated with the memory banks, which can be configured to the needs of the specific application.
Abstract: A single chip microprocessor or memory device has reprogrammable characteristics according to the invention. In the case of the microprocessor, a fixed processing cell is provided as is common to perform logic calculations. A portion of the chip silicon real-estate, however, is dedicated a programmable gate array. This feature enables application-specific configurations to allow adaptation to the particular time-changing demands of the microprocessor and provide the functionality required to best serve those demands. This yields application acceleration and in system-specific functions. In other cases the configurable logic acts as network interface, which allows the same basic processor design to function in any environment to which the interface can adapt. The invention also concerns a memory device having a plurality of memory banks and configurable logic units associated with the memory banks. An interconnect is provided to enable communication between the configurable logic units. These features lessen the impact of the data bottle-neck associated with bus communications, since the processing capability is moved to the memory in the form programmable logic, which can be configured to the needs of the specific application. The inherently large on-chip bandwidth can then be utilized to increase the speed at which bulk data is processed.
203 citations
Book•
19 Nov 2010
TL;DR: The introduction and the conclusion are the main chapters of the book, which provide a very strong theoretical and practical background to the field of reconfigurable computing, from the early Estrins machine to the very modern architecture like coarse-grained reconfigured device and the embedded logic devices.
Abstract: Introduction to Reconfigurable Computing provides a comprehensive study of the field Reconfigurable Computing. It provides an entry point to the novice willing to move in the research field reconfigurable computing, FPGA and system on programmable chip design. The book can also be used as teaching reference for a graduate course in computer engineering, or as reference to advance electrical and computer engineers. It provides a very strong theoretical and practical background to the field of reconfigurable computing, from the early Estrins machine to the very modern architecture like coarse-grained reconfigurable device and the embedded logic devices. Apart from the introduction and the conclusion, the main chapters of the book are Architecture of reconfigurable systems, Design and implementation, High-Level Synthesis for Reconfigurable Devices, Temporal placement, On-line and Dynamic Interconnection, Designing a reconfigurable application on Xilinx Virtex FPGA, System on programmable chip, Applications.
190 citations
Cites background or methods from "Automatic Assignment of Computation..."
...” To implement its vision, Estrin designed a computing system, the fix-plus machine [81]....
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...The following fragment of an Estrin publication in 1960 [81] the fix-plus machine, defines the concept of reconfigurable computing paradigm....
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References
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IBM1
TL;DR: It is shown that it is practical, in problems of small size, to generate the complete set of all active schedules and to pick the optimal schedules directly from this set and, when this is not practical, to random sample from the bet of allactive schedules.
Abstract: Algorithms are developed for solving problems to minimize the length of production schedules. The algorithms generate anyone, or all, schedules of a particular subset of all possible schedules, called the active schedules. This subset contains, in turn, a subset of the optimal schedules. It is further shown that every optimal schedule is equivalent to an active optimal schedule. Computational experience with the algorithms shows that it is practical, in problems of small size, to generate the complete set of all active schedules and to pick the optimal schedules directly from this set and, when this is not practical, to random sample from the bet of all active schedules and, thus, to produce schedules that are optimal with a probability as close to unity as is desired. The basic algorithm can also generate the particular schedules produced by well-known machine loading rules.
757 citations
03 May 1960
TL;DR: The past decade has seen the development of productive fast electronic digital computers, but a growing number of important problems have been recorded which are not practicably computable by existing systems.
Abstract: The past decade has seen the development of productive fast electronic digital computers. Significant problems have been solved and significant numerical experiments have been executed. Moreover, as expected, a growing number of important problems have been recorded which are not practicably computable by existing systems. These latter problems have provided the incentive for the present development of several large scale digital computers with the goal of one or two orders of magnitude increase in overall computational speed.
271 citations
01 Dec 1959
TL;DR: Questions concerning order of operations, location and disposition of transfers, identification of subroutines, internal consistency, redundancy and equivalence, all involve a knowledge of the structure of the program under study and must be handled effectively by any automatic programming system.
Abstract: Any serious attempt at automatic programming of large-scale digital computing machines must provide for some sort of analysis of program structure. Questions concerning order of operations, location and disposition of transfers, identification of subroutines, internal consistency, redundancy and equivalence, all involve a knowledge of the structure of the program under study, and must be handled effectively by any automatic programming system.
107 citations
IBM1
TL;DR: A concise scheduling algorithm is described which tends to minimize the time for executing the entire pending workload (or any subset of it), subject to external constraints such as precedence, urgency, etc.
Abstract: In order to exploit fully a fast computer which possesses simultaneous processing abilities, it should to a large extent schedule its own workload. The scheduling routine must be capable of extremely rapid execution if it is not to prove self-defeating.The construction of a schedule entails determining which programs are to be run concurrently and which sequentially with respect to each other. A concise scheduling algorithm is described which tends to minimize the time for executing the entire pending workload (or any subset of it), subject to external constraints such as precedence, urgency, etc. The algorithm is applicable to a wide class of machines.
31 citations
IBM1
TL;DR: It is shown that properties of directed graphs and the associated connection matrices can be used to detect errors and eliminate redundancies in programs.
Abstract: A graph-theoretic model for the description of flowcharts and programs is defined. It is shown that properties of directed graphs and the associated connection matrices can be used to detect errors and eliminate redundancies in programs. These properties are also used in the synthesis of composite programs. Finally, the model is expanded to take into account frequencies of execution of portions of a program, and a problem concerning optimum arrangement of a program in storage is solved.
31 citations