AZKA cell, the current-mode alternative of Wheatstone bridge
01 Sep 2000-IEEE Transactions on Circuits and Systems I-regular Papers (IEEE)-Vol. 47, Iss: 9, pp 1277-1284
TL;DR: In this paper, a new circuit topology based on duality of the well known voltage-mode Wheatstone bridge is described, which can implement ratiometric current measurement which is a vital aspect of current-mode instrumentation and signal processing.
Abstract: This paper describes a new circuit topology based on duality of the well known voltage-mode Wheatstone bridge. This topology can implement ratiometric current measurement which is a vital aspect of current-mode instrumentation and signal processing. The theory of the proposed circuit is developed and its advantages and limitations are discussed. The new circuit (called AZKA cell) may be thought of as the current-mode alternative of traditional voltage-mode Wheatstone bridge. It presents the current-mode circuit designers and engineers their own relevant interface cell. The advantages of the new circuit are stated and some conditioning circuits for its output signal are proposed. Finally, a linearization circuit based on CCII+ is introduced.
Citations
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TL;DR: A power-aware instrumentation amplifier (IA) based on differential difference amplifier (DDA) dedicated to a resistive Wheatstone bridge sensor system that incorporates a proposed current source replica (CSR) circuit that facilitates the pair matching layout for all critical pairs in DDA input stage.
Abstract: This paper presents a power-aware instrumentation amplifier (IA) based on differential difference amplifier (DDA) dedicated to a resistive Wheatstone bridge sensor system. The design incorporates a proposed current source replica (CSR) circuit that facilitates the pair matching layout for all critical pairs in DDA input stage. This is in contrast with the conventional design where the stated layout technique can only be applied to the input transistor pairs. Besides, a new analysis on common-mode signals and differential common-mode signal in chopper-stabilized DDA is given. It has shown that the differential common-mode signal is not modulated in chopping DDA. The relationship between dc offset and differential common-mode rejection ratio (CMRRd) is illustrated. Enhancing CMRRd will lead to reduction of dc offset and offset drift in DDA. Fabricated by a 0.18-μm CMOS process, the experimental results have shown that the maximum input-referred offset for the injection-nulling switch chopper DDA with CSR circuit is 3 μV, while the input-referred dc offset is 1.78 μV (mean + standard deviation) at a chopping frequency of 10 kHz from eight fabricated samples. For a closed-loop gain of 40.17 dB, its output ripple is reduced by three times with respect to itself without CSR. The IA powered with a high-power supply rejection regulator has been tested with a resistive Wheatstone bridge. The transducer achieves an input-referred noise of 3.76 μVrms for 2-kHz bandwidth.
51 citations
Cites background from "AZKA cell, the current-mode alterna..."
...Several recent examples of small-area IAs are given in [9]–[12]....
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...As current mode IAs [19]–[21] are more complex, this leads to high-power consumption than the voltage mode counterparts [4], [22]....
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...Apart from being miniature, also critical for precision IAs are low power, low offset, low noise and high common-mode rejection ratio (CMRR)....
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...The prior arts of the low offset and ripple reduction techniques for chopping IAs are reviewed in Section II....
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...For the sensor noise consideration, the noise at the IAs inputs contributed by the strain gauge resistors is vn,strain−gauge = √ 4kT R f (18) where f is the signal bandwidth....
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TL;DR: A novel signal conditioning scheme, which provides a linear-digital output directly from the resistive sensor(s) that are connected in such bridge configurations, and drastically reduces the effect on the output due to the lead wires that connect the Wheatstone bridge and the DSADC.
Abstract: Output of a typical Wheatstone bridge, when it is connected to measure from a single or a dual resistive element, possesses non-linear characteristic. This paper presents a novel signal conditioning scheme, which provides a linear-digital output directly from the resistive sensor(s) that are connected in such bridge configurations. In the present scheme, the input stage of a dual-slope analog-to-digital converter (DSADC) is suitably augmented to incorporate the quarter-bridge and (or) half-bridge containing the resistive sensor as an integral part of the DSADC. A combination of the current mode excitation and wisely selected integration and de-integration operations of the DSADC enable to achieve linearization in the digitization process itself, leading to an overall reduction in the complexity level and number of blocks used keeping the high accuracy unaltered. A detailed analysis has been conducted to quantify the effect of various sources of errors in the output of the DSADC. The details are presented in the paper. The proposed method not only provides a linear digital output but also drastically reduces the effect on the output due to the lead wires that connect the Wheatstone bridge and the DSADC. Thus, the proposed scheme is well suited for the situations where the sensor(s) is (are) remotely located at a distance. Simulation studies as well as results from a prototype developed and tested establish the practicality of the proposed scheme. The inherent non-linearity of the Wheatstone bridge is reduced by nearly two orders of magnitude.
49 citations
TL;DR: A new topology for a current-mode Wheatstone bridge (CMWB) that uses an operational floating current conveyor (OFCC) as a basic building block and offers a significant improvement in accuracy compared to other CMWBs is presented.
Abstract: This paper presents a new topology for a current-mode Wheatstone bridge (CMWB) that uses an operational floating current conveyor (OFCC) as a basic building block. The proposed CMWB has been analyzed, simulated, implemented, and experimentally tested. The experimental results verify that the proposed CMWB outperforms existing CMWBs in terms of accuracy. A new CMWB linearization technique based on OFCC has been proposed, used, analyzed, and tested. The advantages of the proposed CMWB are fourfold. Firstly, it reduces the number of sensing passive elements; i.e., we can use two resistors instead of four and get the same performance as the traditional voltage-mode implementation. Secondly, we can apply the superposition principle without adding signal conditioning circuitry; therefore, the addition of sensor effects is possible. Thirdly, it has a higher common-mode cancellation. Finally, the proposed CMWB topology offers a significant improvement in accuracy compared to other CMWBs
37 citations
Cites background or methods from "AZKA cell, the current-mode alterna..."
...The second approach, used in [4] to implement a CMWB using operational floating current conveyor (OFCC), has a higher accuracy, as the output current does not depend on (as we will prove later in Section II-B)....
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...Recently, a method based on the circuit duality concept [3] has been developed to develop a current-mode Wheatstone bridge (CMWB) [4]....
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...In [4], two different topologies to implement a CMWB have been proposed....
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...Experimental results for R = R = 1 k to compare between the CMR of the proposed CMWB and the CMWB based on CCII in [4]....
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...On the other hand, the common-mode current of the CMWB based on CCII in [4], also shown in Fig....
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TL;DR: In this paper, a low-voltage CMOS interface circuit with digital output for piezo-resistive transducers is proposed, which can achieve an equivalent output resolution of 967 bits with less than 023% nonlinearity error.
Abstract: A new low-voltage CMOS interface circuit with digital output for piezo-resistive transducer is proposed An input current sensing configuration is used to detect change in piezo-resistance due to applied pressure and to allow lowvoltage circuit operation A simple 1-bit first-order deltasigma modulator is used to produce an output digital bitstream The proposed interface circuit is realized in a 0 35 µm CMOS technology and draws less than 200 μA from a single 15 V power supply voltage Simulation results show that the circuit can achieve an equivalent output resolution of 967 bits with less than 023% nonlinearity error
33 citations
Cites background or methods from "AZKA cell, the current-mode alterna..."
...AZKA Cell: A Current-Mode Wheatstone Bridge As an alternative to the traditional voltage-mode Wheatstone bridge, a current-mode Wheatstone bridge has been proposed based on the circuit dualilty concept [6]....
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...73 circuitarrangements with operational amplifiers, secondgeneration current conveyors (CCII), or operational floating current conveyors (OFCC) [6], [7]....
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...One end of both resistors is tied together, while the other end is forced to be equipotential, that is, V1 = V2, by a differential current or transimpedance instrumentation amplifier, which can be implemented by a number of ETRI Journal, Volume 29, Number 1, February 2007 Apinunt Thanachayanont et al. 73 circuitarrangements with operational amplifiers, secondgeneration current conveyors (CCII), or operational floating current conveyors (OFCC) [6], [7]....
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...3(b), has been proposed in [6] and is called the AZKA cell....
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...Compared with the traditional voltage-mode Wheatstone bridge, the AZKA cell offers a number of advantages, including reduction of resistive sensing elements, summation of sensors’ effects (namely, superposition ability), and simple linearization technique [6]....
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TL;DR: The circuit presented is based on an operational transconductance amplifier with n output stages, and allows to cascade n Wheatstone-bridge-like sensors, and it is shown that the maximal number of bridges which can be efficiently cascaded is limited by the output resistance of the output stages.
Abstract: Many sensitive devices are based on Wheatstone bridge structures or can be modeled as Wheatstone bridges like Hall effect magnetic sensors. These sensors require a biasing circuit, and many solutions were proposed. However, up to now, none of them gives the opportunity to cascade several sensors, while such a cascade can help in improving the signal-to-noise-ratio (SNR) or in removing some parasitic effects through the direct summing/subtraction of sensing/parasitic effects. The circuit this paper presents is based on an operational transconductance amplifier with n output stages, and allows to cascade n Wheatstone-bridge-like sensors. It is shown that the maximal number of bridges which can be efficiently cascaded is limited by the output resistance of the output stages. Nevertheless, this number remains sufficient in practical cases, easily up to n=10. To remove the 1/f noise coming from the output stages, a chopper stabilization is used. We also establish formulas which allow quick hand calculation of the main parameters of the circuit. A prototype where 10 Hall effect sensors are cascaded is presented as well as experimental results.
24 citations
Cites background from "AZKA cell, the current-mode alterna..."
...In his paper on the AZKA cell [6]—AZKA stands for the authors’ names, Azhari-Kaabi—Azhari introduced the dual circuit of a four resistors bridge....
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References
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TL;DR: This correspondence introduces another new building block embodying the current conveying concept, but with different and more versatile terminal characteristics, considered to be a secondgeneration current conveyor.
Abstract: A recent publication [l] introduced the concept of current conveying and an implementation in the form of a circuit building block termed the current conveyor (CC). This block has proven to be useful in many inst.rumentation applications, some of which have already been test)ed and reported [2], [3], while others are still under investigation. This correspondence introduces another new building block embodying the current conveying concept, but with different and more versatile terminal characteristics. This new block is considered to be a secondgeneration current conveyor,1 and h.ence is termed CC II.2 Application of CC II to the areas of active network synthesis and analog computation will be considered..
1,386 citations
10 May 1994
TL;DR: In this paper, a new five-port general purpose analogue building block, termed as an operational floating current conveyor (OFCC), is described, which combines the features of current feedback (CFB) operational amplifier, second generation current conveyors and operational floating conveyor.
Abstract: A new five-port general purpose analogue building block, termed as an operational floating current conveyor (OFCC), is described. The OFCC combines the features of current feedback (CFB) operational amplifier, second generation current conveyor and operational floating conveyor (OFC). A simple implementation scheme of the OFCC is described and its terminal operational characteristics are used to yield a working model. The OFCC is then used as a single block to realize the four main amplifier types and the current conveyors (CCII+ and CCII-). Computer simulation results are presented and discussed. >
34 citations
TL;DR: It is demonstrated, that the single-input, differential-output COA as the adjoint element to the differentialinput, single-output voltage operational amplifier (VOA) is employable in current processing circuits alike the VOAs in voltage processing circuits.
Abstract: This review paper describes all major considerations of the design of current operational amplifiers (COAs). It is demonstrated, that the single-input, differential-output COA as the adjoint element to the differentialinput, single-output voltage operational amplifier (VOA) is employable in current processing circuits alike the VOAs in voltage processing circuits. On an example of a basic one-high-gain-stage current-operational-amplifier architecture the procedure and the strategy of the design is explained and the main first and second order properties of this device are described. The paper is concluded showing elementary approaches of the derivation of the exploitation of the COAs in current processing circuits interreciprocal to voltage processing circuits and discussing the considerations of the exploitation of the COAs in VLSI designs.
34 citations
01 Jan 1981
32 citations