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Journal ArticleDOI

Band structure, deformation potentials, and carrier mobility in strained Si, Ge, and SiGe alloys

15 Aug 1996-Journal of Applied Physics (American Institute of Physics)-Vol. 80, Iss: 4, pp 2234-2252
TL;DR: In this article, the authors compute the band structure and shear deformation potentials of strained Si, Ge, and SiGe alloys, and fit the theoretical results to experimental data on the phonon-limited carrier mobilities in bulk Si and Ge.
Abstract: Using nonlocal empirical pseudopotentials, we compute the band structure and shear deformation potentials of strained Si, Ge, and SiGe alloys. Fitting the theoretical results to experimental data on the phonon‐limited carrier mobilities in bulk Si and Ge, the dilatation deformation potential Ξd is found to be 1.1 eV for the Si Δ minima, −4.4 eV for the Ge L minima, corresponding to a value for the valence band dilatation deformation potential a of approximately 2 eV for both Si and Ge. The optical deformation potential d0 is found to be 41.45 and 41.75 eV for Si and Ge, respectively. Carrier mobilities in strained Si and Ge are then evaluated. The results show a large enhancement of the hole mobility for both tensile and compressive strain along the [001] direction, but only a modest enhancement (approximately 60%) of the electron mobility for tensile biaxial strain in Si. Finally, from a fit to carrier mobilities in relaxed SiGe alloys, the effective alloy scattering potential is determined to be about 0...
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Book
Yuan Taur1, Tak H. Ning1
01 Jan 2016
TL;DR: In this article, the authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices.
Abstract: Learn the basic properties and designs of modern VLSI devices, as well as the factors affecting performance, with this thoroughly updated second edition. The first edition has been widely adopted as a standard textbook in microelectronics in many major US universities and worldwide. The internationally-renowned authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices. Equations and parameters provided are checked continuously against the reality of silicon data, making the book equally useful in practical transistor design and in the classroom. Every chapter has been updated to include the latest developments, such as MOSFET scale length theory, high-field transport model, and SiGe-base bipolar devices.

2,680 citations

Journal ArticleDOI
TL;DR: This Review focuses on manipulation of the electronic and atomic structural features which makes up the thermoelectric quality factor, and the principles used are equally applicable to most good thermoeLECTric materials that could enable improvement of thermoelectedric devices from niche applications into the mainstream of energy technologies.
Abstract: Lead chalcogenides have long been used for space-based and thermoelectric remote power generation applications, but recent discoveries have revealed a much greater potential for these materials. This renaissance of interest combined with the need for increased energy efficiency has led to active consideration of thermoelectrics for practical waste heat recovery systems—such as the conversion of car exhaust heat into electricity. The simple high symmetry NaCl-type cubic structure, leads to several properties desirable for thermoelectricity, such as high valley degeneracy for high electrical conductivity and phonon anharmonicity for low thermal conductivity. The rich capabilities for both band structure and microstructure engineering enable a variety of approaches for achieving high thermoelectric performance in lead chalcogenides. This Review focuses on manipulation of the electronic and atomic structural features which makes up the thermoelectric quality factor. While these strategies are well demonstrated in lead chalcogenides, the principles used are equally applicable to most good thermoelectric materials that could enable improvement of thermoelectric devices from niche applications into the mainstream of energy technologies.

1,243 citations

Journal ArticleDOI
TL;DR: A review of the history and current progress in highmobility strained Si, SiGe, and Ge channel metal-oxide-semiconductor field effect transistors (MOSFETs) can be found in this article.
Abstract: This article reviews the history and current progress in high-mobility strained Si, SiGe, and Ge channel metal-oxide-semiconductor field-effect transistors (MOSFETs). We start by providing a chronological overview of important milestones and discoveries that have allowed heterostructures grown on Si substrates to transition from purely academic research in the 1980’s and 1990’s to the commercial development that is taking place today. We next provide a topical review of the various types of strain-engineered MOSFETs that can be integrated onto relaxed Si1−xGex, including surface-channel strained Si n- and p-MOSFETs, as well as double-heterostructure MOSFETs which combine a strained Si surface channel with a Ge-rich buried channel. In all cases, we will focus on the connections between layer structure, band structure, and MOS mobility characteristics. Although the surface and starting substrate are composed of pure Si, the use of strained Si still creates new challenges, and we shall also review the litera...

918 citations

Journal ArticleDOI
TL;DR: In this paper, a leading-edge 90-nm technology with 1.2-nm physical gate oxide, 45-nm gate length, strained silicon, NiSi, seven layers of Cu interconnects, and low/spl kappa/CDO for high-performance dense logic is presented.
Abstract: A leading-edge 90-nm technology with 1.2-nm physical gate oxide, 45-nm gate length, strained silicon, NiSi, seven layers of Cu interconnects, and low-/spl kappa/ CDO for high-performance dense logic is presented. Strained silicon is used to increase saturated n-type and p-type metal-oxide-semiconductor field-effect transistors (MOSFETs) drive currents by 10% and 25%, respectively. Using selective epitaxial Si/sub 1-x/Ge/sub x/ in the source and drain regions, longitudinal uniaxial compressive stress is introduced into the p-type MOSEFT to increase hole mobility by >50%. A tensile silicon nitride-capping layer is used to introduce tensile strain into the n-type MOSFET and enhance electron mobility by 20%. Unlike all past strained-Si work, the hole mobility enhancement in this paper is present at large vertical electric fields in nanoscale transistors making this strain technique useful for advanced logic technologies. Furthermore, using piezoresistance coefficients it is shown that significantly less strain (/spl sim/5 /spl times/) is needed for a given PMOS mobility enhancement when applied via longitudinal uniaxial compression versus in-plane biaxial tension using the conventional Si/sub 1-x/Ge/sub x/ substrate approach.

728 citations


Cites background or result from "Band structure, deformation potenti..."

  • ...The physical mechanism for the large hole mobility enhancement at low stress and large vertical field has not been highlighted previously but can be inferred from the data using previous experimental and theoretical work [34]–[40]....

    [...]

  • ...11, which is consistent with the published data in references [17], [38], [40] for biaxial tensile and [34], [35] for uniaxial compressive stress....

    [...]

  • ...Summarizing references [34]–[40], the strain enhanced hole mobility understanding has lagged behind electron [38], [41] and much of the understanding, as in this paper, has first been driven by experimental data....

    [...]

Journal ArticleDOI
Hon-Sum Philip Wong1
TL;DR: In this paper, the authors focus on approaches to continue CMOS scaling by introducing new device structures and new materials, including high-dielectric-constant (high-k) gate dielectric, metal gate electrode, double-gate FET and strained-silicon FET.
Abstract: This paper focuses on approaches to continuing CMOS scaling by introducing new device structures and new materials. Starting from an analysis of the sources of improvements in device performance, we present technology options for achieving these performance enhancements. These options include high-dielectric-constant (high-k) gate dielectric, metal gate electrode, double-gate FET, and strained-silicon FET. Nanotechnology is examined in the context of continuing the progress in electronic systems enabled by silicon microelectronics technology. The carbon nanotube field-effect transistor is examined as an example of the evaluation process required to identify suitable nanotechnologies for such purposes.

644 citations

References
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Journal ArticleDOI

23,110 citations

Book
01 Jan 1953
TL;DR: In this paper, the Hartree-Fock Approximation of many-body techniques and the Electron Gas Polarons and Electron-phonon Interaction are discussed.
Abstract: Mathematical Introduction Acoustic Phonons Plasmons, Optical Phonons, and Polarization Waves Magnons Fermion Fields and the Hartree-Fock Approximation Many-body Techniques and the Electron Gas Polarons and the Electron-phonon Interaction Superconductivity Bloch Functions - General Properties Brillouin Zones and Crystal Symmetry Dynamics of Electrons in a Magnetic Field: de Haas-van Alphen Effect and Cyclotron Resonance Magnetoresistance Calculation of Energy Bands and Fermi Surfaces Semiconductor Crystals I: Energy Bands, Cyclotron Resonance, and Impurity States Semiconductor Crystals II: Optical Absorption and Excitons Electrodynamics of Metals Acoustic Attenuation in Metals Theory of Alloys Correlation Functions and Neutron Diffraction by Crystals Recoilless Emission Green's Functions - Application to Solid State Physics Appendix: Perturbation Theory and the Electron Gas Index.

21,954 citations

Journal ArticleDOI
TL;DR: In this paper, the basic principles of the Monte Carlo method, as applied to the solution of transport problems in semiconductors, are presented in a comprehensive and tutorial form, with the aim of showing the power of the method in obtaining physical insights into the processes under investigation.
Abstract: This review presents in a comprehensive and tutorial form the basic principles of the Monte Carlo method, as applied to the solution of transport problems in semiconductors. Sufficient details of a typical Monte Carlo simulation have been given to allow the interested reader to create his own Monte Carlo program, and the method has been briefly compared with alternative theoretical techniques. Applications have been limited to the case of covalent semiconductors. Particular attention has been paid to the evaluation of the integrated scattering probabilities, for which final expressions are given in a form suitable for their direct use. A collection of results obtained with Monte Carlo simulations is presented, with the aim of showing the power of the method in obtaining physical insights into the processes under investigation. Special technical aspects of the method and updated microscopic models have been treated in some appendixes.

2,081 citations

Journal ArticleDOI
Van de Walle Cg1
TL;DR: In this paper, a theoretical model is presented to predict the band offsets at both lattice-matched and pseudomorphic strained-layer interfaces, based on the local density functional pseudopotential formalism and the ''model solid approach'' of Van de Walle and Martin.
Abstract: Semiconductor heterojunctions and superlattices have recently shown tremendous potential for device applications because of their flexibility for tailoring the electronic band structure. A theoretical model is presented to predict the band offsets at both lattice-matched and pseudomorphic strained-layer interfaces. The theory is based on the local-density-functional pseudopotential formalism and the ``model-solid approach'' of Van de Walle and Martin. This paper is intended as a self-contained description of the model, suitable for practical application. The results can be most simply expressed in terms of an ``absolute'' energy level for each semiconductor and deformation potentials that describe the effects of strain on the electronic bands. The model predicts reliable values for the experimentally observed lineups in a wide variety of test cases and can be used to explore which combinations of materials and configurations of the strains will lead to the desired electronic properties.

1,807 citations

Journal ArticleDOI
TL;DR: In this paper, an empirical nonlocal pseudopotential scheme was employed to calculate the electronic structure of eleven semiconductors: Si, Ge, $\ensuremath{\alpha}\ensure Math{-}\mathrm{Sn}$, GaP, GaAs, GaSb, InP, InAs, InSb and CdTe.
Abstract: An empirical nonlocal pseudopotential scheme is employed to calculate the electronic structure of eleven semiconductors: Si, Ge, $\ensuremath{\alpha}\ensuremath{-}\mathrm{Sn}$, GaP, GaAs, GaSb, InP, InAs, InSb, ZnSe, and CdTe. Band structures, reflectivity spectra, electronic densities of states, and valence charge densities are presented and compared to experimental results. Improved optical gaps, optical critical-point topologies, valence-band widths, and valence charge distributions are obtained as compared to previous local pseudopotential results.

1,446 citations